Patents by Inventor James J. Rathburn
James J. Rathburn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10667410Abstract: A method of making a fusion bonded circuit structure. Each major surface of an LCP substrate is provided with a seed layers of a conductive material. Resist layers are deposited on the seed layers. The resist layers are processed to create recesses corresponding to a desired circuitry layers on each side of the LCP substrate. The recesses expose portions of the seed layers of conductive material. The LCP substrate is electroplated to simultaneously create conductive traces defined by the first recesses on both sides of the LCP substrate. The resist layers are removed to reveal the conductive traces. The LCP substrate is etched to remove exposed portions of the seed layers adjacent the conductive traces. LCP layers are fusion bonded to the major surfaces of the LCP substrate to encapsulate the conductive traces in an LCP material. The LCP layers can be laser drilled to expose the conductive traces.Type: GrantFiled: December 14, 2017Date of Patent: May 26, 2020Assignee: HSIO Technologies, LLCInventor: James J. Rathburn
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Hybrid printed circuit assembly with low density main core and embedded high density circuit regions
Patent number: 10609819Abstract: A high density region for a low density circuit. At least a first liquid dielectric layer is deposited on the first surface of a first circuitry layer. The dielectric layer is imaged to create plurality of first recesses. Surfaces of the first recesses are plated electro-lessly with a conductive material to form first conductive structures electrically coupled to, and extending generally perpendicular to, the first circuitry layer. A plating resist is applied. A conductive material is electro-plated to the first conductive structure to substantially fill the first recesses, and the plating resist is removed.Type: GrantFiled: May 31, 2017Date of Patent: March 31, 2020Assignee: HSIO Technologies, LLCInventor: James J. Rathburn -
Patent number: 10506722Abstract: A method of making a fusion bonded circuit structure. A substrate is provided with a seed layer of a conductive material. A first resist layer is deposited on the seed layer. The first resist layer is processed to create first recesses corresponding to a desired first circuitry layer. The first recesses expose, portions of the seed layer of conductive material. The substrate is electroplated to create first conductive traces defined by the first recesses. The first resist layer is removed to reveal the first conductive traces. The substrate is etched to remove exposed portions of the seed layer adjacent the first conductive traces. A portion of the seed layer is interposed between the first conductive traces and the substrate. A first layer of LCP is fusion boned to the first major surface of the substrate to encapsulate the first conductive traces in an LCP material. The first LCP layer can be laser drilled to expose the conductive traces.Type: GrantFiled: March 15, 2016Date of Patent: December 10, 2019Assignee: HSIO Technologies, LLCInventor: James J. Rathburn
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Patent number: 10453789Abstract: An electrical connectors with electrodeposited terminals that are grown in place by electroplating cavities formed in a series of resist layers. The resist layers are subsequently stripped away. The resulting terminal shape is defined by the shape of the cavity created in the resist layers. Complex terminal shapes are possible. The present conductive terminals are particularly useful for electrical interconnects and semiconductor packaging substrates.Type: GrantFiled: September 7, 2017Date of Patent: October 22, 2019Assignee: HSIO Technologies, LLCInventor: James J. Rathburn
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Publication number: 20180124928Abstract: A method of making a fusion bonded circuit structure. Each major surface of an LCP substrate is provided with a seed layers of a conductive material. Resist layers are deposited on the seed layers. The resist layers are processed to create recesses corresponding to a desired circuitry layers on each side of the LCP substrate. The recesses expose portions of the seed layers of conductive material. The LCP substrate is electroplated to simultaneously create conductive traces defined by the first recesses on both sides of the LCP substrate. The resist layers are removed to reveal the conductive traces. The LCP substrate is etched to remove exposed portions of the seed layers adjacent the conductive traces. LCP layers are fusion bonded to the major surfaces of the LCP substrate to encapsulate the conductive traces in an LCP material. The LCP layers can be laser drilled to expose the conductive traces.Type: ApplicationFiled: December 14, 2017Publication date: May 3, 2018Inventor: James J. Rathburn
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Publication number: 20180012832Abstract: An electrical connectors with electrodeposited terminals that are grown in place by electroplating cavities formed in a series of resist layers. The resist layers are subsequently stripped away. The resulting terminal shape is defined by the shape of the cavity created in the resist layers. Complex terminal shapes are possible. The present conductive terminals are particularly useful for electrical interconnects and semiconductor packaging substrates.Type: ApplicationFiled: September 7, 2017Publication date: January 11, 2018Inventor: James J. Rathburn
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HYBRID PRINTED CIRCUIT ASSEMBLY WITH LOW DENSITY MAIN CORE AND EMBEDDED HIGH DENSITY CIRCUIT REGIONS
Publication number: 20170303401Abstract: A high density region for a low density circuit. At least a first liquid dielectric layer is deposited on the first surface of a first circuitry layer. The dielectric layer is imaged to create plurality of first recesses. Surfaces of the first recesses are plated electro-lessly with a conductive material to form first conductive structures electrically coupled to, and extending generally perpendicular to, the first circuitry layer. A plating resist is applied. A conductive material is electro-plated to the first conductive structure to substantially fill the first recesses, and the plating resist is removed.Type: ApplicationFiled: May 31, 2017Publication date: October 19, 2017Inventor: James J. Rathburn -
Patent number: 9761520Abstract: An electrical connectors with electrodeposited terminals that are grown in place by electroplating cavities formed in a series of resist layers. The resist layers are subsequently stripped away. The resulting terminal shape is defined by the shape of the cavity created in the resist layers. Complex terminal shapes are possible. The present conductive terminals are particularly useful for electrical interconnects and semiconductor packaging substrates.Type: GrantFiled: March 6, 2016Date of Patent: September 12, 2017Assignee: HSIO Technologies, LLCInventor: James J. Rathburn
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Patent number: 9755335Abstract: An electrical interconnect and a method of making the same. A plurality of contact members are located in through holes in a substrate so distal portions of the contact members extend above a first surface of the substrate in a cantilevered configuration and proximal portions of the contact members are accessible along a second surface of the substrate. A flowable polymeric material located on the second surface of the substrate is fusion bonded to the proximal portions of the contact members so the flowable polymeric material substantially seals the through holes in the substrate. An insulator housing is bonded to the first surface of the substrate with the distal portions of the contact members located in through holes in an insulator housing, so the distal portions are accessible from a second surface of the insulator housing.Type: GrantFiled: March 6, 2016Date of Patent: September 5, 2017Assignee: HSIO Technologies, LLCInventor: James J. Rathburn
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Patent number: 9559447Abstract: An electrical connector and a method of make the same. The electrical connector includes an insulator housing formed with a plurality of through holes extending from a first surface to a second surface of the insulator housing. A flowable polymeric material is located adjacent at least one retention region in each of the through holes. Contact members are positioned within each of the through holes. Energy and/or pressure is applied to the electrical connector so the flowable polymeric material flows into engagement with retention features on the contact members. The electrical connector is cooled so the flowable polymeric material fuses to the contact members in a retention regions.Type: GrantFiled: March 6, 2016Date of Patent: January 31, 2017Assignee: HSIO Technologies, LLCInventor: James J. Rathburn
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Publication number: 20160276763Abstract: An electrical interconnect and a method of making the same. A plurality of contact members are located in through holes in a substrate so distal portions of the contact members extend above a first surface of the substrate in a cantilevered configuration and proximal portions of the contact members are accessible along a second surface of the substrate. A flowable polymeric material located on the second surface of the substrate is fusion bonded to the proximal portions of the contact members so the flowable polymeric material substantially seals the through holes in the substrate. An insulator housing is bonded to the first surface of the substrate with the distal portions of the contact members located in through holes in an insulator housing, so the distal portions are accessible from a second surface of the insulator housing.Type: ApplicationFiled: March 6, 2016Publication date: September 22, 2016Inventor: James J. Rathburn
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Publication number: 20160276762Abstract: An electrical connector and a method of make the same. The electrical connector includes an insulator housing formed with a plurality of through holes extending from a first surface to a second surface of the insulator housing. A flowable polymeric material is located adjacent at least one retention region in each of the through holes. Contact members are positioned within each of the through holes. Energy and/or pressure is applied to the electrical connector so the flowable polymeric material flows into engagement with retention features on the contact members. The electrical connector is cooled so the flowable polymeric material fuses to the contact members in a retention regions.Type: ApplicationFiled: March 6, 2016Publication date: September 22, 2016Inventor: James J. Rathburn
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Publication number: 20160212862Abstract: A method of making a fusion bonded circuit structure. A substrate is provided with a seed layer of a conductive material. A first resist layer is deposited on the seed layer. The first resist layer is processed to create first recesses corresponding to a desired first circuitry layer. The first recesses expose, portions of the seed layer of conductive material. The substrate is electroplated to create first conductive traces defined by the first recesses. The first resist layer is removed to reveal the first conductive traces. The substrate is etched to remove exposed portions of the seed layer adjacent the first conductive traces. A portion of the seed layer is interposed between the first conductive traces and the substrate. A first layer of LCP is fusion boned to the first major surface of the substrate to encapsulate the first conductive traces in an LCP material. The first LCP layer can be laser drilled to expose the conductive traces.Type: ApplicationFiled: March 15, 2016Publication date: July 21, 2016Inventor: James J. Rathburn
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Publication number: 20160192507Abstract: An electrical connectors with electrodeposited terminals that are grown in place by electroplating cavities formed in a series of resist layers. The resist layers are subsequently stripped away. The resulting terminal shape is defined by the shape of the cavity created in the resist layers. Complex terminal shapes are possible. The present conductive terminals are particularly useful for electrical interconnects and semiconductor packaging substrates.Type: ApplicationFiled: March 6, 2016Publication date: June 30, 2016Inventor: James J. Rathburn
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Patent number: 8232632Abstract: An electrical interconnect assembly for electrically interconnecting terminals on a first circuit member with terminals on a second circuit member. The electrical interconnect assembly includes a housing having a plurality of through openings extending between a first surface and a second surface. A plurality of composite contacts are positioned in a plurality of the through openings. The composite contacts include a conductive member having a central portion and at least first and second interface portions. One or more polymeric layers extend along at least the central portion conductive member. One or more coupling features on the composite contacts engage with the housing. At least one engagement feature formed in the polymeric layers proximate the first interface portion mechanically couples with the terminals on the first circuit member.Type: GrantFiled: October 20, 2011Date of Patent: July 31, 2012Assignee: R&D Sockets, Inc.Inventor: James J. Rathburn
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Publication number: 20120088378Abstract: An electrical interconnect assembly for electrically interconnecting terminals on a first circuit member with terminals on a second circuit member. The electrical interconnect assembly includes a housing having a plurality of through openings extending between a first surface and a second surface. A plurality of composite contacts are positioned in a plurality of the through openings. The composite contacts include a conductive member having a central portion and at least first and second interface portions. One or more polymeric layers extend along at least the central portion conductive member. One or more coupling features on the composite contacts engage with the housing. At least one engagement feature formed in the polymeric layers proximate the first interface portion mechanically couples with the terminals on the first circuit member.Type: ApplicationFiled: October 20, 2011Publication date: April 12, 2012Applicant: R&D Sockets, Inc.Inventor: James J. Rathburn
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Patent number: 8044502Abstract: An electrical interconnect assembly for electrically interconnecting terminals on a first circuit member with terminals on a second circuit member. The electrical interconnect includes a housing having a plurality of through openings extending between a first surface and a second surface. A plurality of composite contacts are positioned in a plurality of the through openings. The composite contacts include a conductive member having a central portion and at least first and second interface portions. One or more polymeric layers extend along at least the central portion conductive member. One or more coupling features on the composite contacts engage with the housing. At least one engagement feature formed in the polymeric layers proximate the first interface portion mechanically couples with the terminals on the first circuit member.Type: GrantFiled: March 19, 2007Date of Patent: October 25, 2011Assignee: Gryphics, Inc.Inventor: James J. Rathburn
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Patent number: 7900347Abstract: An apparatus and method for making a compliant interconnect assembly adapted to electrically couple a first circuit member to a second circuit member. The first dielectric layer has a first major surface and a plurality of through openings. A plurality of electrical traces are positioned against the first major surface of the first dielectric layer. The electric traces include a plurality of conductive compliant members having first distal ends aligned with a plurality of the openings in the first dielectric layer. The first distal ends are adapted to electrically couple with the first circuit member. The second dielectric layer has a first major surface positioned against the electric traces and the first major surface of the first dielectric layer. The second dielectric layer has a plurality of through openings through which the electric traces electrically couple with the second circuit member.Type: GrantFiled: March 7, 2006Date of Patent: March 8, 2011Assignee: Cascade Microtech, Inc.Inventor: James J. Rathburn
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Patent number: 7537461Abstract: An electrical assembly including a socket assembly, a first circuit member electrically coupled to contact members along a first side of a socket assembly, and a second circuit member electrically coupled to the contact members along a second side of the socket assembly. A flexible circuit member is interposed between the socket assembly and the second circuit member. The flexible circuit member comprises a plurality of electrical traces electrically coupled with the contact members on the socket assembly. In one embodiment the flexible circuit member comprises a distal portion extending the electrical traces beyond the socket assembly.Type: GrantFiled: April 1, 2008Date of Patent: May 26, 2009Assignee: Gryphics, Inc.Inventor: James J. Rathburn
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Publication number: 20090127698Abstract: An electrical interconnect assembly for electrically interconnecting terminals on a first circuit member with terminals on a second circuit member. The electrical interconnect includes a housing having a plurality of through openings extending between a first surface and a second surface. A plurality of composite contacts are positioned in a plurality of the through openings. The composite contacts include a conductive member having a central portion and at least first and second interface portions. One or more polymeric layers extend along at least the central portion conductive member. One or more coupling features on the composite contacts engage with the housing. At least one engagement feature formed in the polymeric layers proximate the first interface portion mechanically couples with the terminals on the first circuit member.Type: ApplicationFiled: March 19, 2007Publication date: May 21, 2009Inventor: James J. Rathburn