Abstract: A fastener strip is disclosed having a permanently sealed, airtight portion and a reclosable portion capable of maintaining an airtight seal when closed. The permanently sealed portion is generally planar and essentially impervious to air flow. The reclosable portion includes a ridge and a trough joined at their adjacent ends to a plug, which prevents air from leaking from the adjacent end of the reclosable portion. Additionally, a dam joins the plug to the first backing in an essentially airtight seal, and joins the plug to the second backing in an essentially airtight seal. A method and apparatus for sealing portions of a thermoplastic fastener strip are also disclosed. A method is additionally disclosed for vibrating and molding thermoplastic materials in which a flow of malleable thermoplastic material is initiated and molded with an effectively dimensioned vibrator that is unitary with a first matrix for guiding and molding the malleable polymer.

Abstract: A fastener strip is disclosed having a permanently sealed, airtight portion and a reclosable portion capable of maintaining an airtight seal when closed. The permanently sealed portion is generally planar and essentially impervious to air flow. The reclosable portion includes a ridge and a trough joined at their adjacent ends to a plug, which prevents air from leaking from the adjacent end of the reclosable portion. Additionally, a dam joins the plug to the first backing in an essentially airtight seal, and joins the plug to the second backing in an essentially airtight seal. A method and apparatus for sealing portions of a thermoplastic fastener strip are also disclosed. A method is additionally disclosed for vibrating and molding thermoplastic materials in which a flow of malleable thermoplastic material is initiated and molded with an effectively dimensioned vibrator that is unitary with a first matrix for guiding and molding the malleable polymer.

Abstract: A fastener strip is disclosed having permanently sealed, airtight portion and a reclosable portion capable of maintaining an airtight seal when closed. The permanently sealed portion is generally planar and essentially impervious to air flow. The reclosable portion includes a ridge and a trough, joined at their adjacent ends to a plug, which prevents air from leaking from the adjacent end of the reclosable portion. Additionally, a dam joins the plug to the first backing in an essentially airtight seal, and joins the plug to the second backing in an essentially airtight seal. A method and apparatus for sealing portions of a thermoplastic fastener strip are also disclosed. A method is additionally disclosed for vibrating and molding thermoplastic materials, in which a flow of malleable thermoplastic material is initiated and molded with an effectively dimensioned vibrator that is unitary, with a first matrix for guiding and molding the malleable polymer.

Abstract: An EEPROM memory cell comprising a transistor on a first conductivity type semiconductor substrate and a capacitor formed on a second conductivity type semiconductor substrate. The capacitor comprises first and second injector regions of third conductivity type, a channel region of second conductivity type separating the first and second injector regions and a first electrically floating structure disposed above the channel region, wherein a first edge portion of the floating structure overlaps a portion of the first injector region and a second edge portion of the first floating structure overlaps a portion of the second injector region, and a control gate region of fourth conductivity type located within the second conductivity type semiconductor substrate region. The gate structure and first floating structure are electrically connected together. In different aspects of the present invention, the EEPROM memory cell may also include a second capacitor.

Abstract: An EEPROM memory cell comprising a transistor on a first conductivity type semiconductor substrate and a capacitor formed on a second conductivity type semiconductor substrate. The capacitor comprises first and second injector regions of third conductivity type, a channel region of second conductivity type separating the first and second injector regions and a first electrically floating structure disposed above the channel region, wherein a first edge portion of the floating structure overlaps a portion of the first injector region and a second edge portion of the first floating structure overlaps a portion of the second injector region, and a control gate region of fourth conductivity type located within the second conductivity type semiconductor substrate region. The gate structure and first floating structure are electrically connected together. In different aspects of the present invention, the EEPROM memory cell may also include a second capacitor.

Abstract: An EEPROM memory cell comprising a transistor on a first conductivity type semiconductor substrate and a capacitor formed on a second conductivity type semiconductor substrate. The capacitor comprises first and second injector regions of third conductivity type, a channel region of second conductivity type separating the first and second injector regions and a first electrically floating structure disposed above the channel region, wherein a first edge portion of the floating structure overlaps a portion of the first injector region and a second edge portion of the first floating structure overlaps a portion of the second injector region, and a control gate region of fourth conductivity type located within the second conductivity type semiconductor substrate region. The gate structure and first floating structure are electrically connected together. In different aspects of the present invention, the EEPROM memory cell may also include a second capacitor.

Abstract: An EEPROM memory cell comprising a transistor on a first conductivity type semiconductor substrate and a capacitor formed on a second conductivity type semiconductor substrate. The capacitor comprises first and second injector regions of third conductivity type, a channel region of second conductivity type separating the first and second injector regions and a first electrically floating structure disposed above the channel region, wherein a first edge portion of the floating structure overlaps a portion of the first injector region and a second edge portion of the first floating structure overlaps a portion of the second injector region, and a control gate region of fourth conductivity type located within the second conductivity type semiconductor substrate region. The gate structure and first floating structure are electrically connected together. In different aspects of the present invention, the EEPROM memory cell may also include a second capacitor.

Abstract: A loose bale accumulator is disclosed in which bales may be accumulated individually from the ground in a set of side-by-side bale-receiving bays each of which has its individual bale entry point, and means are provided to facilitate entry of bales directly into the respective entry points rather than employing marshalling means interposed between a single entry point and a set of bale-receiving bays.