Abstract: A soft flying game disc comprising a limp, generally circular fabric locally annularly stiffened inwardly of the fabric peripheral edge margin in central air foil and peripheral spoiler skirt structure defining relation.

Abstract: A container useful in immunochemical and enzymatical determinations or procedures.

Abstract: Apparatus for detecting a serial binary number includes a flip-flop connected to receive the words among which the word to be detected is contained at an input, and connected to receive the complement of the word to be detected at a reset terminal. The flip-flop operates to present a first output state when the word to be detected is applied to its input and a second output state when another word is applied to its input. A second flip-flop is connected to receive the output from the first flip-flop and is clocked by a signal to test the output state of the first flip-flop at the termination of each word applied to its input. The output of the second flip-flop is, therefore, indicative of the presence of the word to be detected at the input of the first flip-flop.

Abstract: A case for storing a group of smaller boxes, such as boxes containing magnetic tape cassettes, includes a container for receiving the boxes in a side-by-side arrangement, and a keyboard having a plurality of levers for elevating selectively and individually the boxes through an open mouth in the container. The keyboard includes a plurality of pivotally mounted keys extending under the boxes through an opening in the container and outwardly from the interior thereof. The keys terminate in finger engageable distal end portions so that when a selected one of the keys is pushed downwardly by the finger of the user to select a given cassette box, the selected key pivots about its intermediate portion to cause the selected cassette box to be elevated above the remaining boxes to permit the user to grasp in a convenient manner the selected box and remove it from the case.

Abstract: A holder for cassette tape cartridges includes a pair of parallel spaced-apart fingers for receiving a pair of spaced-apart openings in the cassette cartridges, and a member connecting the rear end portions of the fingers to the base. In one embodiment of the present invention, the connecting member swivelly connects the pair of parallel spaced-apart fingers to the base and detents secure releaseably the fingers in adjusted positions.

Abstract: An analog-to-digital converter utilizing a pulse density concept wherein a pulse generator is used and the rate of generation of pulses is a function of the difference between the analog input and the indicated digital output. The pulses are utilized in an adding/accumulation circuit for adjusting the output value upwardly or downwardly to minimize the error input. A digital-to-analog converter is used between the output of the accumulator and an algebraic summing network in a feedback manner to compare with the analog input and produce the error signal.

Abstract: An analog-to-digital integrator utilizing a voltage to pulse frequency converter which has an analog integrator that charges and upon exceeding predetermined thresholds provides an output pulse and simultaneously discharges the integrator for a predetermined time. The output pulse also actuates a serial adder which sums a scale word with the previous accumulated result; this accumulated result is the digital word output of the integrator.

Abstract: A serial data input to analog voltage output converter uses an R adder for continually adding a given digital input word to an accumulated result and providing either a positive or negative overflow whenever the accumulated result exceeds the capacity of the adding device. The frequency of occurrence of overflow is filtered to provide the analog output signal. Compensation techniques provide high accuracy despite temperature dependent resistances and current leakages incurred in MOS or other switch and filtering circuitry.

Abstract: A differentiating circuit comprising an operational amplifier with capacitance feedback utilizes an analog-to-digital integrator and a digital-to-analog converter in the feedback loop. Digital rate information is obtained by digitalizing the differentiator output while a digital signal indicative of the analog is obtained by summing the output of the integrator with a portion of the digital rate signal to compensate for lag occurring in the integrator output digital signal.

Abstract: An improved, simplified radioimmunoassay method for the in vitro determination of cardiotonic glycosides in unextracted blood serum involves the use of a reagent constituting a buffer solution containing a radioactive hapten for such glycosides. Packaged test kits for use in conveniently carrying out the radioimmunoassay are also provided.

Abstract: A radioimmunoassay method for the in vitro determination of the renin activity of an unknown plasma sample. In this method an unknown generation sample is provided by mixing the unknown plasma sample with a generation buffer solution and an inhibitor for enzymes which convert angiotensin I to other substances. The unknown generation sample is incubated to generate angiotensin I therein by action of renin upon angiotensinogen, thereby producing a generated unknown sample. A generated unknown radioimmunoassay reaction mixture is provided by mixing the generated unknown plasma sample with a predetermined amount of radioactively labeled angiotensin I, a predetermined amount of an antibody for angiotensin I, and an amount of an assay buffer solution sufficient to provide in the unknown reaction mixture renin and angiotensinogen concentrations at which there is no substantial angiotensin I generation at the temperatures to which the generated unknown radioimmunoassay reaction mixture is subsequently exposed.

Abstract: Computer addressing hardware and a method of address development which utilizes the concept of a segment as the unit of addressability is disclosed.The fundamental vehicle for addressing is the segment wherein an address space is defined for a process and is included as part of the controlled information of the logical processor (the collection of hardware resources and control information necessary for the execution of a process.) The address space defines a predetermined number of different segments in which instructions can access operands. Within a segment, access is by relative location to the beginning of the segment, and is computed during address development. Any attempt to access information beyond the upper bound of the segment is detected by hardware and an exception condition occurs.