Patents by Inventor James Mathews

James Mathews has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210056945
    Abstract: An acoustic damper has a sound pickup unit defining a plurality of pickup unit passageways. Hollow flexible tubes are connected to exit openings of the pickup unit passageways and extend outwardly therefrom. The hollow flexible tubes and pickup unit passageways define acoustic paths.
    Type: Application
    Filed: August 20, 2020
    Publication date: February 25, 2021
    Inventor: James Mathew Manimala
  • Patent number: 10926591
    Abstract: An inflation system for tubeless bicycle tires may include a valve, a sealant canister, a pump head, and/or a valve core adapter. The valve, sealant canister, and pump head may collectively facilitate sealant injection into a tire by a user. The valve has an external valve seat, and includes a valve body, a valve stem extending through the length of the valve body, and a retaining mechanism for the valve stem disposed interior to the valve body. The valve stem is configured to move relative to the valve body, such that a resilient seating surface disposed at a proximal end of the valve stem is displaced relative to a valve seat formed by an exterior surface of a proximal end of the valve body.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: February 23, 2021
    Assignee: Santa Cruz Bicycles, LLC
    Inventors: Brett Robert Courtney, James Mathew Amaral
  • Publication number: 20200331311
    Abstract: An inflation system for tubeless bicycle tires may include a valve, a sealant canister, a pump head, and/or a valve core adapter. The valve, sealant canister, and pump head may collectively facilitate sealant injection into a tire by a user. The valve has an external valve seat, and includes a valve body, a valve stem extending through the length of the valve body, and a retaining mechanism for the valve stem disposed interior to the valve body. The valve stem is configured to move relative to the valve body, such that a resilient seating surface disposed at a proximal end of the valve stem is displaced relative to a valve seat formed by an exterior surface of a proximal end of the valve body.
    Type: Application
    Filed: April 17, 2020
    Publication date: October 22, 2020
    Applicant: Santa Cruz Bicycles, LLC
    Inventors: Brett Robert COURTNEY, James Mathew AMARAL
  • Patent number: 10784144
    Abstract: A disclosed example to modulate slit stress in a semiconductor substrate includes a first controller to, after obtaining a wafer stress measurement of the semiconductor substrate, control a first process to apply a first material to the semiconductor substrate based on the wafer stress measurement, the semiconductor substrate including a slit between adjacent stacked transistor layers, the first material coating walls of the slit to reduce a first width of the slit between the adjacent stacked transistor layers to a second width; and a second controller to control a second process to apply a second material to the semiconductor substrate, the second material to be deposited in the second width of the slit, the first material and the second material to form a solid structure in the slit between the adjacent stacked transistor layers.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: September 22, 2020
    Assignee: Intel Corporation
    Inventors: James Mathew, Yunjun Ho, Zhiqiang Xie, Hyun Sik Kim
  • Publication number: 20200176471
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Application
    Filed: February 6, 2020
    Publication date: June 4, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Patent number: 10580792
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: March 3, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Publication number: 20190381255
    Abstract: An automatic injector dispenses a predetermined dose of medicament without a user having to manually force the needle into an injection site. The automatic injector includes a needle cover having a locked retracted position with respect to the injector housing prior to a medicament dispensing operation. The needle cover is operative to engage an injection site prior to a medicament dispensing operation.
    Type: Application
    Filed: July 26, 2019
    Publication date: December 19, 2019
    Inventors: Matthew Egerton Young, Sophie Rebecca Raven, Christopher John Hurlstone, Craig Malcolm Rochford, Colin James Mathews, John G. Wilmot, Robert L. Hill
  • Patent number: 10453829
    Abstract: In one embodiment, an apparatus comprises a tier comprising alternating first and second layers, wherein the first layers comprise a first conductive material and the second layers comprise a first dielectric material; a lower metal layer below the tier; a bond pad above the tier, the bond pad coupled to the lower metal layer by a via extending through the tier; and a first channel formed through a portion of the tier, the first channel surrounding the via, the first channel comprising a second dielectric material.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: October 22, 2019
    Assignee: Intel Corporation
    Inventors: Merri Lyn Carlson, Hongbin Zhu, Gordon A. Haller, James E. Davis, Kevin G. Duesman, James Mathew, Michael P. Violette
  • Patent number: 10441818
    Abstract: A patient monitoring system for monitoring a patient undergoing radiotherapy comprising a projector operable to project a pattern of light onto a patient undergoing radiation treatment, a patient restraint operable to restrain the patient relative to a treatment apparatus, an image detector operable to obtain images of the patient, and a model generation module operable to process images of the patient obtained by the image detector to generate a model of the surface of a portion of the patient, wherein at least a portion of the patient restraint is colored and the model generation module is inhibited from generating a model of the colored portion of the patient restraint.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: October 15, 2019
    Assignee: VISION RT LIMITED
    Inventors: Michael James Tallhamer, Adrian Roger William Barrett, James Mathew Hughes, II, Edward William Mead, Ivan Daniel Meir
  • Publication number: 20190203253
    Abstract: Methods for identifying a subject with a cancer eligible for treatment with an inhibitor of a Table 1 molecule, optionally a SRC kinase inhibitor or a MET kinase inhibitor, are provided. The methods comprise testing a biological sample from the subject for a deficiency in EPHB6 receptor levels, wherein the subject is eligible for treatment with an inhibitor of a Table 1 molecule, optionally a SRC kinase inhibitor or a MET kinase inhibitor, if EPHB6 receptor levels in the biological sample are deficient.
    Type: Application
    Filed: July 5, 2017
    Publication date: July 4, 2019
    Inventors: Franco Joseph Vizeacoumar, Andrew Freywald, James Mathew Paul, Frederick Sagayaraj Vizeacoumar
  • Patent number: 10327159
    Abstract: Convergence times associated with simulated annealing based (SA-based) optimization in wireless networks can be reduced by introducing an additional local or cell-level evaluation step into the evaluation of global solutions. In particular, new local solutions may be evaluated based on local performance criteria when the new solutions are in a global solution deemed to have satisfied a global performance criteria. New local solutions that satisfy their corresponding local performance criteria remain in the new global solution. New local solutions that do not satisfy their corresponding local performance criteria are replaced with a corresponding current local solution from a current global solution, thereby modifying the new global solution. The resulting modified global solution includes both new local solutions and current local solutions prior to being accepted as the current global solution for the next iteration.
    Type: Grant
    Filed: January 5, 2016
    Date of Patent: June 18, 2019
    Assignee: Futurewei Technologies, Inc.
    Inventors: Yongxi Tan, Jin Yang, Nandu Gopalakrishnan, Yan Xin, James Mathew, Kamalaharan Dushyanthan, Iyad Alfalujah, Yanjie Fu
  • Publication number: 20180366453
    Abstract: In one embodiment, an apparatus comprises a tier comprising alternating first and second layers, wherein the first layers comprise a first conductive material and the second layers comprise a first dielectric material; a lower metal layer below the tier; a bond pad above the tier, the bond pad coupled to the lower metal layer by a via extending through the tier; and a first channel formed through a portion of the tier, the first channel surrounding the via, the first channel comprising a second dielectric material.
    Type: Application
    Filed: June 16, 2017
    Publication date: December 20, 2018
    Applicant: Intel Corporation
    Inventors: Merri Lyn Carlson, Hongbin Zhu, Gordon A. Haller, James E. Davis, Kevin G. Duesman, James Mathew, Michael P. Violette
  • Publication number: 20180358378
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Applicant: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Patent number: 10083984
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: September 25, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Publication number: 20180174890
    Abstract: A disclosed example to modulate slit stress in a semiconductor substrate includes a first controller to, after obtaining a wafer stress measurement of the semiconductor substrate, control a first process to apply a first material to the semiconductor substrate based on the wafer stress measurement, the semiconductor substrate including a slit between adjacent stacked transistor layers, the first material coating walls of the slit to reduce a first width of the slit between the adjacent stacked transistor layers to a second width; and a second controller to control a second process to apply a second material to the semiconductor substrate, the second material to be deposited in the second width of the slit, the first material and the second material to form a solid structure in the slit between the adjacent stacked transistor layers.
    Type: Application
    Filed: February 15, 2018
    Publication date: June 21, 2018
    Inventors: James Mathew, Yunjun Ho, Zhiqiang Xie, Hyun Sik Kim
  • Publication number: 20180094543
    Abstract: An apparatus and system for injecting fluid into a boundary layer of a flow of fluid are provided. The boundary layer injection insert assembly includes an insert body and a central bore extending through the insert body from an inlet opening positioned at a first end to an outlet opening positioned at a second end of the insert body opposite the first end. The insert body is approximately cylindrical about a longitudinal axis and includes a thickness in a radial direction orthogonal to the longitudinal axis. The first end includes a plurality of injection holes extending through the thickness for a first distance, the first distance being less than the length. The boundary layer injection insert assembly also includes an annular spacer at least partially surrounding the second end and including a radially inner surface and a radially outer surface spaced apart by a thickness of the annular spacer.
    Type: Application
    Filed: October 2, 2017
    Publication date: April 5, 2018
    Inventors: Ning Fang, Gary Paul Moscarino, Bala Corattiyil, Ramon Themudo, Prasad Laxman Kane, James Mathew Suding
  • Patent number: 9935000
    Abstract: A disclosed example to modulate slit stress in a semiconductor substrate includes controlling a first process to apply a first material to a semiconductor substrate. The semiconductor substrate includes a slit between adjacent stacked transistor layers. The first material coats walls of the slit to reduce a first width of the slit between the adjacent stacked transistor layers to a second width. A second process is controlled to apply a second material to the semiconductor substrate. The second material is to be deposited in the second width of the slit. The first material and the second material are to form a solid structure in the slit between the adjacent stacked transistor layers.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: April 3, 2018
    Assignee: Intel Corporation
    Inventors: James Mathew, Yunjun Ho, Zhiqiang Xie, Hyun Sik Kim
  • Patent number: 9897289
    Abstract: A light fixture includes a housing with a skylight aperture, and one or more louver blades spanning the skylight aperture. When open, the one or more movable louver blades block little of the light passing through the skylight aperture; in intermediate positions, the louver blades block a portion of the light; when closed, the louver blades block most light from passing through the skylight aperture. The light fixture also includes: a dimmable artificial light source configured to project artificial light toward the illuminated space; a light sensor that detects light illuminating the space; and a control unit that is integrated with the housing and communicates with the light sensor. The light sensor detects intensity and chromaticity information of the light illuminating the space. The control unit controls position of the louver blades and brightness and chromaticity of the dimmable artificial light source, in response to the light sensor.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: February 20, 2018
    Assignee: ABL IP Holdings LLC
    Inventors: Phoebus Biron, James Mathew Ernst, Ryan Zaveruha
  • Publication number: 20170372617
    Abstract: A registration authority (RA) server registers unmanned aerial vehicles (UAVs) and their owners/operators (O/O). A UAV is maintained in a flight lock state until a flight plan request from the O/O is approved by the RA, which sends an key-signed approval to unlock the UAV's flight lock. The RA server evaluates a UAV's proposed flight plan based on the attributes of the O/O and UAV, the location and time of the requested flight plan, and a set of flight rules and exclusion zones that are developed in view of privacy assurance, security assurance, flight safety assurance, and ground safety assurance. The flight plan key-signed approval supplied to the UAV by the RA server specifies an inclusion zone that corresponds to a flight plan trajectory to be followed. Once in flight, the UAV maintains real-time knowledge of its position and time to ensure its flight remains within the approved inclusion zone.
    Type: Application
    Filed: August 11, 2017
    Publication date: December 28, 2017
    Inventors: Ronald BRUNO, James Mathew KELLER, Christian RAMSEY
  • Publication number: 20170368370
    Abstract: A patient monitoring system for monitoring a patient undergoing radiotherapy comprising a projector operable to project a pattern of light onto a patient undergoing radiation treatment, a patient restraint operable to restrain the patient relative to a treatment apparatus, an image detector operable to obtain images of the patient, and a model generation module operable to process images of the patient obtained by the image detector to generate a model of the surface of a portion of the patient, wherein at least a portion of the patient restraint is colored and the model generation module is inhibited from generating a model of the colored portion of the patient restraint.
    Type: Application
    Filed: September 7, 2017
    Publication date: December 28, 2017
    Inventors: Michael James TALLHAMER, Adrian Roger William BARRETT, James Mathew HUGHES, II, Edward William MEAD, Ivan Daniel MEIR