Abstract: Aspects of this disclosure relate to systems and methods of performing dynamic impedance tuning. Certain aspects may be performed by or include a dynamic impedance matching network. The dynamic impedance matching network can determine a desired output power for a power amplifier, true power information for the power amplifier, and an output power delivered to a load by the power amplifier. In addition, the dynamic impedance matching network can determine whether the output power satisfies the true power information. Responsive to this determination, the dynamic impedance matching network may modify a load line impedance for the power amplifier using an impedance tuning network.

Abstract: According to one aspect, embodiments of the invention provide a wireless device comprising an overstress indicator circuit including a sense circuit configured to monitor a parameter of the wireless device and generate a sense signal corresponding to the parameter, a detection circuit configured to receive the sense signal from the sense circuit and generate a detection signal in response to a determination that the sense signal is indicative of an overstress condition in the device, an interface circuit, and a memory circuit coupled to the detection circuit and the interface circuit and configured to store an overstress condition indication for access via the interface circuit in response to receiving the detection signal, at least one power amplifier coupled to the interface circuit, and a transceiver coupled to the at least one power amplifier and configured to produce an RF transmit signal and to receive an RF receive signal.

Abstract: According to one aspect, embodiments of the invention provide an overstress indicator circuit comprising a sense circuit configured to monitor a parameter of a device and generate a sense signal corresponding to the parameter, a detection circuit coupled to the sense circuit and configured to receive the sense signal from the sense circuit and generate a detection signal at a first level in response to a determination that the sense signal is indicative of an overstress condition in the device, an interface circuit, and a memory circuit coupled to the detection circuit and the interface circuit and configured to store an overstress condition indication for access via the interface circuit in response to receiving the detection signal at the first level.

Abstract: A switch bias control circuit includes a level shifter and voltage regulator circuitry configured to receive a voltage reference signal, provide a first voltage output at a first node and provide a second voltage output at a second node, the first node and the second node being at least partially isolated from one another. coupling circuitry couples the first node to the level shifter and couples the second node to a negative voltage generator.

Abstract: Aspects of this disclosure relate to systems and methods of performing dynamic impedance tuning. Certain aspects may be performed by or include a dynamic impedance matching network. The dynamic impedance matching network can determine a desired output power for a power amplifier, true power information for the power amplifier, and an output power delivered to a load by the power amplifier. In addition, the dynamic impedance matching network can determine whether the output power satisfies the true power information. Responsive to this determination, the dynamic impedance matching network may modify a load line impedance for the power amplifier using an impedance tuning network.

Abstract: According to one aspect, embodiments of the invention provide an overstress indicator circuit comprising a sense circuit configured to monitor a parameter of a device and generate a sense signal corresponding to the parameter, a detection circuit coupled to the sense circuit and configured to receive the sense signal from the sense circuit and generate a detection signal at a first level in response to a determination that the sense signal is indicative of an overstress condition in the device, an interface circuit, and a memory circuit coupled to the detection circuit and the interface circuit and configured to store an overstress condition indication for access via the interface circuit in response to receiving the detection signal at the first level.

Abstract: Devices and methods related to radio-frequency (RF) filters on silicon-on-insulator (SOI) substrate. In some embodiments, an RF device can include a silicon die such as an SOI die including a first side and a second side. The silicon die can further include a plurality of vias, with each via configured to provide an electrical connection between the first side and the second side of the silicon die. The RF device can further include at least one RF flip chip mounted on the first side of the silicon die. The silicon die can include, for example, an RF circuit such as a switch circuit, and the RF flip chip can include, for example, a filter such as a surface acoustic wave (SAW) filter.

Abstract: Systems, devices and methods related to multi-band power amplifier. In some embodiments, a power amplifier module includes a power amplifier having an output stage and configured to receive a signal. The power amplifier module also includes a first programmable harmonic termination circuit in electrical communication with the output stage of the power amplifier. The first programmable harmonic termination circuit includes a first plurality of capacitors and a first plurality of switches, with at least one of the first plurality of capacitors being in electrical communication with at least one of the first plurality of switches. The power amplifier module further includes a controller configured to modify a configuration of the first plurality of switches of the first programmable harmonic termination circuit based at least in part on a second harmonic frequency of the signal.

Abstract: According to some implementations, a radio-frequency (RF) device includes a communication interface coupled to a serial bus. The RF device also includes a monitoring component coupled to the communication interface, the monitoring component configured to monitor the serial bus for first data transmitted to a first device coupled to the serial bus and configure the RF device based on the first data.

Abstract: Aspects of this disclosure relate to systems and methods of performing dynamic impedance tuning. Certain aspects may be performed by or include a dynamic impedance matching network. The dynamic impedance matching network can determine a desired output power for a power amplifier, true power information for the power amplifier, and an output power delivered to a load by the power amplifier. In addition, the dynamic impedance matching network can determine whether the output power satisfies the true power information. Responsive to this determination, the dynamic impedance matching network may modify a load line impedance for the power amplifier using an impedance tuning network.

Abstract: Apparatus and methods for reducing capacitive loading of an envelope tracker are disclosed. In one embodiment, a wireless device comprises an envelope tracker including an output configured to generate a power amplifier supply voltage, a plurality of power amplifiers, and a power supply network configured to provide the power amplifier supply voltage to the plurality of power amplifiers. The power amplifier supply network includes a first inductor electrically connected between a supply input of a first power amplifier and the output of the envelope tracker, and a second inductor electrically connected between a supply input of a second power amplifier and the output of the envelope tracker. The first inductor resonates with a distributed capacitance of the power supply network at a frequency greater than the envelope tracker's modulation bandwidth of, and the second inductor resonates with the distributed capacitance at a frequency greater than the envelope tracker's modulation bandwidth.

Abstract: Apparatus and methods for reducing capacitive loading of an envelope tracker are disclosed. In one embodiment, a wireless device comprises an envelope tracker including an output configured to generate a power amplifier supply voltage, a plurality of power amplifiers, and a power supply network configured to provide the power amplifier supply voltage to the plurality of power amplifiers. The power amplifier supply network includes a first inductor electrically connected between a supply input of a first power amplifier and the output of the envelope tracker, and a second inductor electrically connected between a supply input of a second power amplifier and the output of the envelope tracker. The first inductor resonates with a distributed capacitance of the power supply network at a frequency greater than the envelope tracker's modulation bandwidth of, and the second inductor resonates with the distributed capacitance at a frequency greater than the envelope tracker's modulation bandwidth.

Abstract: Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes an envelope tracker configured to provide a supply voltage to a plurality of power amplifiers. The power amplifiers include power supply inputs electrically connected in a star configuration so as to reduce a capacitive load of the envelope tracker. The distributed capacitance of the power amplifiers is used to provide RF grounding so as to reduce the size of or eliminated the use of bypass capacitors.

Abstract: Apparatus and methods for oscillation suppression are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers for amplifying an input radio frequency (RF) signal to generate an output RF signal. The plurality of power amplifiers include a first power amplifier, a second power amplifier, and a third power amplifier, each of which are configured to be individually switchable between an enabled state and a disabled state so as to control a power amplification of the power amplifier system. A first capacitor is electrically connected between the outputs of the first and second power amplifiers, and a second capacitor is electrically connected between the outputs of the second and third power amplifiers. The first and second capacitors are configured to allow signals generated using the first, second, and third power amplifiers to combine constructively to generate the output RF signal.

Abstract: Apparatus and methods for oscillation suppression are disclosed. In one embodiment, a power amplifier system includes a plurality of power amplifiers for amplifying an input radio frequency (RF) signal to generate an output RF signal. The plurality of power amplifiers include a first power amplifier, a second power amplifier, and a third power amplifier, each of which are configured to be individually switchable between an enabled state and a disabled state so as to control a power amplification of the power amplifier system. A first capacitor is electrically connected between the outputs of the first and second power amplifiers, and a second capacitor is electrically connected between the outputs of the second and third power amplifiers. The first and second capacitors are configured to allow signals generated using the first, second, and third power amplifiers to combine constructively to generate the output RF signal.

Abstract: Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a power amplifier system includes an envelope tracker configured to provide a supply voltage to a plurality of power amplifiers. The power amplifiers include power supply inputs electrically connected in a star configuration so as to reduce a capacitive load of the envelope tracker. The distributed capacitance of the power amplifiers is used to provide RF grounding so as to reduce the size of or eliminated the use of bypass capacitors.