Patents by Inventor James S. Speck

James S. Speck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10985285
    Abstract: A physical vapor deposition (e.g., sputter deposition) method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and electron cyclotron resonance (ECR) sputtering to grow one or more tunnel junctions. In another method, the surface of the p-type layer is treated before deposition of the tunnel junction on the p-type layer. In yet another method, the whole device (including tunnel junction) is grown using MOCVD and the p-type layers of the III-nitride material are reactivated by lateral diffusion of hydrogen through mesa sidewalls in the III-nitride material, with one or more lateral dimensions of the mesa that are less than or equal to about 200 ?m. A flip chip display device is also disclosed.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: April 20, 2021
    Assignee: The Regents of the University of California
    Inventors: Benjamin P. Yonkee, Asad J. Mughal, David Hwang, Erin C. Young, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20210104504
    Abstract: A flip chip III-Nitride LED which utilizes a dielectric coating backed by a metallic reflector (e.g., aluminum or silver). High reflectivity and low resistance contacts for optoelectronic devices. Low ESD rating optoelectronic devices. A VCSEL comprising a tunnel junction for current and optical confinement.
    Type: Application
    Filed: August 17, 2017
    Publication date: April 8, 2021
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Benjamin P. Yonkee, Erin C. Young, Charles Forman, John T. Leonard, SeungGeun Lee, Dan Cohen, Robert M. Farrell, Michael Iza, Burhan Saifaddin, Abdullah Almogbel, Humberto Foronda, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20200335663
    Abstract: A III-nitride optoelectronic device includes at least one n-type layer, an active region grown on or above the n-type layer, at least one p-type layer grown on or above the active region, and a tunnel junction grown on or above the p-type layer. A conductive oxide may be wafer bonded on or above the tunnel junction, wherein the conductive oxide comprises a transparent conductor and may contain light extraction features on its non-bonded face. The tunnel junction also enables monolithic incorporation of electrically-injected and optically-pumped III-nitride layers, wherein the optically-pumped III-nitride layers comprise high-indium-content III-nitride layers formed as quantum wells (QWs) that are grown on or above the tunnel junction. The optically-pumped high-indium-content III-nitride layers emit light at a longer wavelength than the electrically-injected III-nitride layers.
    Type: Application
    Filed: February 6, 2017
    Publication date: October 22, 2020
    Applicant: The Regents of the University of California
    Inventors: Asad J. Mughal, Stacy J. Kowsz, Robert M. Farrell, Benjamin P. Yonkee, Erin C. Young, Christopher D. Pynn, Tal Margalith, James S. Speck, Shuji Nakamura, Steven P. DenBaars
  • Publication number: 20200244036
    Abstract: A Vertical Cavity Surface Emitting Laser (VCSEL) including a light emitting III-nitride active region including quantum wells (QWs), wherein each of the quantum wells have a thickness of more than 8 nm, a cavity length of at least 7 ?, or at least 20 ?, where lambda is a peak wavelength of the light emitted from the active region, layers with reduced surface roughness, a tunnel junction intracavity contact. The VCSEL is flip chip bonded using In-Au bonding. This is the first report of a VCSEL capable of continuous wave operation.
    Type: Application
    Filed: October 2, 2018
    Publication date: July 30, 2020
    Applicant: The Regents of the University of California
    Inventors: Charles Forman, SeungGeun Lee, Erin C. Young, Jared Kearns, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Publication number: 20200243334
    Abstract: A method for protecting a semiconductor film comprised of one or more layers during processing. The method includes placing a surface of the semiconductor film in direct contact with a surface of a protective covering, such as a separate substrate piece, that forms an airtight or hermetic seal with the surface of the semiconductor film, so as to reduce material degradation and evaporation in the semiconductor film. The method includes processing the semiconductor film under some conditions, such as a thermal annealing and/or controlled ambient, which might cause the semiconductor film's evaporation or degradation without the protective covering.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 30, 2020
    Applicant: The Regents of the University of California
    Inventors: Christian J. Zollner, Michael Iza, James S. Speck, Shuji Nakamura, Steven P. DenBaars
  • Patent number: 10685835
    Abstract: A III-nitride tunnel junction with a modified p-n interface, wherein the modified p-n interface includes a delta-doped layer to reduce tunneling resistance. The delta-doped layer may be doped using donor atoms comprised of Oxygen (O), Germanium (Ge) or Silicon (Si); acceptor atoms comprised of Magnesium (Mg) or Zinc (Zn); or impurities comprised of Iron (Fe) or Carbon (C).
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: June 16, 2020
    Assignees: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY (KACST)
    Inventors: Benjamin P. Yonkee, Erin C. Young, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20200087813
    Abstract: Techniques for processing materials in supercritical fluids including processing in a capsule disposed within a high-pressure apparatus enclosure are disclosed. The disclosed techniques are useful for growing crystals of GaN, AlN, InN, and their alloys, including InGaN, AlGaN, and AlInGaN for the manufacture of bulk or patterned substrates, which in turn can be used to make optoelectronic devices, lasers, light emitting diodes, solar cells, photoelectrochemical water splitting and hydrogen generation devices, photodetectors, integrated circuits, and transistors.
    Type: Application
    Filed: August 26, 2019
    Publication date: March 19, 2020
    Inventors: Mark P. D'Evelyn, James S. Speck, Derrick S. Kamber, Douglas W. Pocius
  • Patent number: 10529892
    Abstract: A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: January 7, 2020
    Assignees: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, Japan Science and Technology Agency
    Inventors: Robert M. Farrell, Jr., Troy J. Baker, Arpan Chakraborty, Benjamin A. Haskell, P. Morgan Pattison, Rajat Sharma, Umesh K. Mishra, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 10400352
    Abstract: Techniques for processing materials in supercritical fluids including processing in a capsule disposed within a high-pressure apparatus enclosure are disclosed. The disclosed techniques are useful for growing crystals of GaN, AlN, InN, and their alloys, including InGaN, AlGaN, and AlInGaN for the manufacture of bulk or patterned substrates, which in turn can be used to make optoelectronic devices, lasers, light emitting diodes, solar cells, photoelectrochemical water splitting and hydrogen generation devices, photodetectors, integrated circuits, and transistors.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: September 3, 2019
    Assignee: SORAA, INC.
    Inventors: Mark P. D'Evelyn, James S. Speck, Derrick S. Kamber, Douglas W. Pocius
  • Publication number: 20190245112
    Abstract: A method for fabricating an (Al,Ga,In,B)N or III-nitride semiconductor device, including performing a growth of III-nitride or (Al,Ga,In,B)N material including a p-n junction with an active region and using metal-organic chemical vapor deposition (MOCVD) or chemical vapor deposition; and performing a subsequent regrowth of n-type (Al,Ga,In,B)N or III-nitride material using MOCVD or chemical vapor deposition while utilizing a pulsed delta n-type doping scheme to realize an abrupt, smoother surface of the n-type material and a higher carrier concentration in the n-type material. In another example, the method comprises forming a mesa having a top surface; and activating magnesium in the p-type GaN of the (Al,Ga,In,B)N material through openings in the top surface that expose the p-type GaN's surface. The openings are formed before or after the subsequent regrowth of the tunnel junction.
    Type: Application
    Filed: February 7, 2019
    Publication date: August 8, 2019
    Inventors: Abdullah Ibrahim Alhassan, James S. Speck, Steven P. DenBaars
  • Publication number: 20190207043
    Abstract: A physical vapor deposition (e.g., sputter deposition) method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and electron cyclotron resonance (ECR) sputtering to grow one or more tunnel junctions. In another method, the surface of the p-type layer is treated before deposition of the tunnel junction on the p-type layer. In yet another method, the whole device (including tunnel junction) is grown using MOCVD and the p-type layers of the III-nitride material are reactivated by lateral diffusion of hydrogen through mesa sidewalls in the III-nitride material, with one or more lateral dimensions of the mesa that are less than or equal to about 200 ?m. A flip chip display device is also disclosed.
    Type: Application
    Filed: August 17, 2017
    Publication date: July 4, 2019
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Benjamin P. Yonkee, Asad J. Mughal, David Hwang, Erin C. Young, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20190165213
    Abstract: A III-Nitride LED which utilizes n-type III-Nitride layers for current spreading on both sides of the device. A multilayer dielectric coating is used underneath the wire bond pads, both LED contacts are deposited in one step, and the p-side wire bond pad is moved off of the mesa. The LED has a wall plug efficiency or External Quantum Efficiency (EQE) over 70%, a fractional EQE droop of less than 7% at 20 A/cm2 drive current and less than 15% at 35 A/cm2 drive current. The LEDs can be patterned into an LED array and each LED can have an edge dimension of between 5 and 50 ?m. The LED emission wavelength can be below 400 nm and aluminum can be added to the n-type III-Nitride layers such that the bandgap of the n-type III-nitride layers is larger than the LED emission photon energy.
    Type: Application
    Filed: August 17, 2017
    Publication date: May 30, 2019
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Benjamin P. Yonkee, Erin C. Young, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 10292220
    Abstract: Disclosed is an improved light-emitting device for an AC power operation. A conventional light emitting device employs an AC light-emitting diode having arrays of light emitting cells connected in reverse parallel. The arrays in the prior art alternately repeat on/off in response to a phase change of an AC power source, resulting in short light emission time during a ½ cycle and the occurrence of a flicker effect. An AC light-emitting device according to the present invention employs a variety of means by which light emission time is prolonged during a ½ cycle in response to a phase change of an AC power source and a flicker effect can be reduced. For example, the means may be switching blocks respectively connected to nodes between the light emitting cells, switching blocks connected to a plurality of arrays, or a delay phosphor.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: May 14, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Chung Hoon Lee, James S. Speck, Hong San Kim, Jae Jo Kim, Sung Han Kim, Jae Ho Lee
  • Publication number: 20190074404
    Abstract: A hybrid growth method for III-nitride tunnel junction devices uses metal-organic chemical vapor deposition (MOCVD) to grow one or more light-emitting or light-absorbing structures and ammonia-assisted or plasma-assisted molecular beam epitaxy (MBE) to grow one or more tunnel junctions. Unlike p-type gallium nitride (p-GaN) grown by MOCVD, p-GaN grown by MBE is conductive as grown, which allows for its use in a tunnel junction. Moreover, the doping limits of MBE materials are higher than MOCVD materials. The tunnel junctions can be used to incorporate multiple active regions into a single device. In addition, n-type GaN (n-GaN) can be used as a current spreading layer on both sides of the device, eliminating the need for a transparent conductive oxide (TCO) layer or a silver (Au) mirror.
    Type: Application
    Filed: July 11, 2016
    Publication date: March 7, 2019
    Applicant: The Regents of the University of California
    Inventors: Erin C. Young, Benjamin P. Yonkee, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20180374699
    Abstract: A III-nitride tunnel junction with a modified p-n interface, wherein the modified p-n interface includes a delta-doped layer to reduce tunneling resistance. The delta-doped layer may be doped using donor atoms comprised of Oxygen (O), Germanium (Ge) or Silicon (Si); acceptor atoms comprised of Magnesium (Mg) or Zinc (Zn); or impurities comprised of Iron (Fe) or Carbon (C).
    Type: Application
    Filed: November 1, 2016
    Publication date: December 27, 2018
    Applicant: The Regents of the University of California
    Inventors: Benjamin P. Yonkee, Erin C. Young, John T. Leonard, Tal Margalith, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 10100425
    Abstract: A large area nitride crystal, comprising gallium and nitrogen, with a non-polar or semi-polar large-area face, is disclosed, along with a method of manufacture. The crystal is useful as a substrate for a light emitting diode, a laser diode, a transistor, a photodetector, a solar cell, or for photoelectrochemical water splitting for hydrogen generation.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: October 16, 2018
    Assignee: SLT TECHNOLOGIES, INC.
    Inventors: Mark P. D'Evelyn, James S. Speck
  • Publication number: 20180152004
    Abstract: An optoelectronic device grown on a miscut of GaN, wherein the miscut comprises a semi-polar GaN crystal plane (of the GaN) miscut x degrees from an m-plane of the GaN and in a c-direction of the GaN, where ?15<x<?1 and 1<x<15 degrees.
    Type: Application
    Filed: January 26, 2018
    Publication date: May 31, 2018
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Po Shan Hsu, Kathryn M. Kelchner, Robert M. Farrell, Daniel A. Haeger, Hiroaki Ohta, Anurag Tyagi, Shuji Nakamura, Steven P. DenBaars, James S. Speck
  • Patent number: 9917422
    Abstract: An optoelectronic device grown on a miscut of GaN, wherein the miscut comprises a semi-polar GaN crystal plane (of the GaN) miscut x degrees from an m-plane of the GaN and in a c-direction of the GaN, where ?15<x<?1 and 1<x<15 degrees.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: March 13, 2018
    Assignee: The Regents of the University of California
    Inventors: Po Shan Hsu, Kathryn M. Kelchner, Robert M. Farrell, Daniel A. Haeger, Hiroaki Ohta, Anurag Tyagi, Shuji Nakamura, Steven P. DenBaars, James S. Speck
  • Publication number: 20180013035
    Abstract: A method for growth and fabrication of semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices, comprising identifying desired material properties for a particular device application, selecting a semipolar growth orientation based on the desired material properties, selecting a suitable substrate for growth of the selected semipolar growth orientation, growing a planar semipolar (Ga,Al,In,B)N template or nucleation layer on the substrate, and growing the semipolar (Ga,Al,In,B)N thin films, heterostructures or devices on the planar semipolar (Ga,Al,In,B)N template or nucleation layer. The method results in a large area of the semipolar (Ga,Al,In,B)N thin films, heterostructures, and devices being parallel to the substrate surface.
    Type: Application
    Filed: September 7, 2017
    Publication date: January 11, 2018
    Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, Japan Science and Technology Agency
    Inventors: Robert M. Farrell, JR., Troy J. Baker, Arpan Chakraborty, Benjamin A. Haskell, P. Morgan Pattison, Rajat Sharma, Umesh K. Mishra, Steven P. DenBaars, James S. Speck, Shuji Nakamura
  • Patent number: 9828695
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: November 28, 2017
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Asako Hirai, Zhongyuan Jia, Makoto Saito, Hisashi Yamada, Kenji Iso, Steven P. DenBaars, Shuji Nakamura, James S. Speck