Patents by Inventor James Wilder
James Wilder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20080094803Abstract: Flexible circuitry is populated with integrated circuitry disposed along one or both of its major sides. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. The circuit-populated flexible circuitry is disposed about an edge of a rigid substrate thus placing the integrated circuitry on one or both sides of the substrate with one or two layers of integrated circuitry on one or both sides of the substrate. The substrate form is preferably devised from thermally conductive materials and includes a high thermal conductivity core or area that is disposed proximal to higher thermal energy devices such as an AMB when the flex circuit is brought about the substrate. Other variations include thermally-conductive clips that grasp respective ICs on opposite sides of the module to further shunt heat from the ICs.Type: ApplicationFiled: December 20, 2007Publication date: April 24, 2008Inventors: James Wehrly, James Wilder, Paul Goodwin, Mark Wolfe
-
Publication number: 20080067662Abstract: An IC die and a flexible circuit structure are integrated into a lower stack element that can be stacked with either further integrated lower stack element iterations or with pre-packaged ICs in any of a variety of package types. A die is positioned above the surface of portions of a pair of flex circuits. Connection is made between the die and the flex circuitry. A protective layer is formed to protect the flex-connected die and its connection to the flex. Connective elements are placed along the flex circuitry to create an array of module contacts along the second side of the flex circuitry. The flex circuitry is positioned above the body-protected die to create an integrated lower stack element. The integrated lower stack element may be stacked either with iterations of the integrated lower stack element or with a pre-packaged IC to create a multi-element stacked circuit module.Type: ApplicationFiled: November 16, 2007Publication date: March 20, 2008Inventors: David Roper, Curtis Hart, James Wilder, Phill Bradley, James Cady, Jeff Buchle, James Wehrly
-
Patent number: 7335975Abstract: The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The invention provides techniques and structures for aggregating chip scale-packaged integrated circuits (CSPs) or leaded packages with other CSPs or with monolithic or stacked leaded packages into modules that conserve PWB or other board surface area. The present invention can be used to advantage with packages of a variety of sizes and configurations ranging from larger packaged base elements having many dozens of contacts to smaller packages such as, for example, die-sized packages such as DSBGA. In a preferred embodiment devised in accordance with the present invention, a base element CSP and a support element CSP are aggregated through a flex circuit having at least two conductive layers that are patterned to selectively connect the two CSP elements.Type: GrantFiled: October 5, 2004Date of Patent: February 26, 2008Assignee: Staktek Group L.P.Inventors: James W. Cady, James Wilder, David L. Roper, Russell Rapport, James Douglas Wehrly, Jr., Jeffrey Alan Buchle
-
Patent number: 7256484Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred embodiment in accordance with the invention, a form standard is disposed between the flex circuitry and the IC package over which a portion of the flex circuitry is laid. The form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the form standard will be devised of heat transference material such as copper to improve thermal performance.Type: GrantFiled: October 12, 2004Date of Patent: August 14, 2007Assignee: Staktek Group L.P.Inventors: Russell Rapport, James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, Jr., Jeff Buchle
-
Publication number: 20070114649Abstract: The present invention provides a system and method that mounts integrated circuit devices onto substrates and a system and method for employing the method is stacked modules. The contact pads of a packaged integrated circuit device are substantially exposed. A solder past that includes higher temperature solder paste alloy is applied to a substrate or to the integrated circuit device to be mounted. The integrated circuit device is positioned to contact the contacts of the substrate. Heat is applied to create high temperature joints between the contacts of the substrate and the integrated circuit device resulting in a device-substrate assembly with high temperature joints. The formed joints are less subject to re-melting in subsequent processing steps. The method may be employed in devising stacked module constructions such as those disclosed herein as preferred embodiments in accordance with the invention. Typically, the created joints are low in profile.Type: ApplicationFiled: January 23, 2007Publication date: May 24, 2007Inventors: Julian Partridge, James Cady, James Wilder, David Roper, James Wehrly
-
Publication number: 20070117262Abstract: The present invention provides a system and method that amounts integrated circuit devices onto substrates and a system and method for employing the method in stacked modules. The contact pads of a packaged integrated circuit device are substantially exposed. A solder paste that includes higher temperature solder paste alloy is applied to a substrate or to the integrated circuit device to be mounted. The integrated circuit device is positioned to contact the contacts of the substrate. Heat is applied to create high temperature joints between the contacts of the substrate and the integrated circuit device resulting in a device-substrate assembly with high temperature joints. The formed joints are less subject to re-melting in subsequent processing steps. The method may be employed in devising stacked module constructions such as those disclosed herein as preferred embodiments in accordance with the invention. Typically, the created joints are low in profile.Type: ApplicationFiled: January 23, 2007Publication date: May 24, 2007Inventors: Julian Partridge, James Cady, James Wilder, David Roper, James Wehrly
-
Patent number: 7202555Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and its application environment. The module has a bailout pattern with a different pitch and/or supplemental module contacts devised to allow combined signaling to the integrated circuits through contacts having a desired ballout footprint.Type: GrantFiled: March 8, 2005Date of Patent: April 10, 2007Assignee: Staktek Group L.P.Inventors: David L. Roper, James W. Cady, James Wilder, James Douglas Wehrly, Jr., Jeff Buchle, Julian Dowden
-
Patent number: 7180167Abstract: The present invention provides a system and method that mounts integrated circuit devices onto substrates and a system and method for employing the method in stacked modules. The contact pads of a packaged integrated circuit device are substantially exposed. A solder paste that includes higher temperature solder paste alloy is applied to a substrate or to the integrated circuit device to be mounted. The integrated circuit device is positioned to contact the contacts of the substrate. Heat is applied to create high temperature joints between the contacts of the substrate and the integrated circuit device resulting in a device-substrate assembly with high temperature joints. The formed joints are less subject to re-melting in subsequent processing steps. The method may be employed in devising stacked module constructions such as those disclosed herein as preferred embodiments in accordance with the invention. Typically, the created joints are low in profile.Type: GrantFiled: December 14, 2004Date of Patent: February 20, 2007Assignee: Staktek Group L. P.Inventors: Julian Partridge, James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, Jr.
-
Patent number: 7094632Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into low profile modules that conserve PWB or other board surface area. Low profile structures provide connection between CSPs of the stacked module and between and to the flex circuitry. Low profile contacts are created by any of a variety of methods and materials including, for example, screen paste techniques and use of high temperature solders, although other application techniques and traditional solders may be employed for creating low profile contacts in the present invention. A consolidated low profile contact structure and technique is provided for use in alternative embodiments of the present invention. The CSPs employed in stacked modules devised in accordance with the present invention are connected with flex circuitry. That flex circuitry may exhibit one or two or more conductive layers.Type: GrantFiled: June 22, 2004Date of Patent: August 22, 2006Assignee: Staktek Group L.P.Inventors: James W. Cady, Julian Partridge, James Douglas Wehrly, Jr., James Wilder, David L. Roper, Jeff Buchle
-
Publication number: 20060131716Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and an application environment such as a printed wiring board (PWB). The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules provided for high-density memories or high capacity computing.Type: ApplicationFiled: December 22, 2005Publication date: June 22, 2006Inventors: James Cady, James Wilder, David Roper, James Wehrly, Julian Dowden, Jeff Buchle
-
Patent number: 7053478Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and its application environment. The module has a ballout pattern with a different pitch and/or supplemental module contacts devised to allow combined signaling to the integrated circuits through contacts having a desired ballout footprint.Type: GrantFiled: August 9, 2004Date of Patent: May 30, 2006Assignee: Staktek Group L.P.Inventors: David L. Roper, James W. Cady, James Wilder, James Douglas Wehrly, Jr., Jeff Buchle, Julian Dowden
-
Publication number: 20060091529Abstract: Flexible circuitry is populated with integrated circuitry disposed along one or both of its major sides. Contacts distributed along the flexible circuitry provide connection between the module and an application environment. The circuit-populated flexible circuitry is disposed about an edge of a rigid substrate thus placing the integrated circuitry on one or both sides of the substrate with one or two layers of integrated circuitry on one or both sides of the substrate. The substrate form is preferably devised from thermally conductive materials and includes a high thermal conductivity core or area that is disposed proximal to higher thermal energy devices such as an AMB when the flex circuit is brought about the substrate. Other variations include thermally-conductive clips that grasp respective ICs on opposite sides of the module to further shunt heat from the ICs.Type: ApplicationFiled: September 21, 2005Publication date: May 4, 2006Inventors: James Wehrly, James Wilder, Paul Goodwin, Mark Wolfe
-
Publication number: 20060091521Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a two-high stack or module devised in accordance with a preferred embodiment of the present invention, a pair of integrated circuits is stacked, with one integrated circuit above the other. The two integrated circuits are connected with a pair of flexible circuit structures. Each of the pair of flexible circuit structures is partially wrapped about a respective opposite lateral edge of the lower integrated circuit of the module. The flex circuit pair connects the upper and lower integrated circuits and provides a thermal and electrical path connection path between the module and an application environment such as a printed wiring board (PWB). The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules provided for high-density memories or high capacity computing.Type: ApplicationFiled: December 21, 2005Publication date: May 4, 2006Inventors: James Cady, James Wilder, David Roper, James Wehrly, Julian Dowden, Jeff Buchle
-
Publication number: 20060090102Abstract: Flexible circuitry is populated with integrated circuitry (ICs) disposed along one or both of major sides. Contacts are distributed along the flexible circuitry to provide connection between the module and an application environment. The populated flexible circuitry is disposed about an edge of a rigid substrate thus placing the integrated circuitry on one or both sides of the substrate with one or more layers of integrated circuitry on one or both sides of the substrate. The substrate form is preferably devised from thermally-conductive materials and one or more thermal spreaders are disposed in thermal contact with at least some of the constituent integrated circuitry of the module. Optionally, as an additional thermal management feature, the module may include a high thermal conductivity thermal sink or area that is disposed proximal to, higher thermal energy IC devices.Type: ApplicationFiled: November 18, 2005Publication date: April 27, 2006Inventors: James Wehrly, James Wilder, Mark Wolfe, Paul Goodwin
-
Patent number: 7026708Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into low profile modules that conserve PWB or other board surface area. Low profile contacts are created by any of a variety of methods and materials. A consolidated low profile contact structure and technique is provided for use in alternative embodiments of the present invention. Multiple numbers of CSPs may be stacked in accordance with the present invention. The CSPs employed in stacked modules devised in accordance with the present invention are connected with flex circuitry that exhibit one or two or more conductive layers.Type: GrantFiled: July 11, 2003Date of Patent: April 11, 2006Assignee: Staktek Group L.P.Inventors: James W. Cady, Julian Partridge, James Douglas Wehrly, Jr., James Wilder, David L. Roper, Jeff Buchle
-
Publication number: 20060043558Abstract: Abstract of the Disclosure Integrated circuits (ICs) are stacked into modules that conserve PCB or other board surface area. The modules provide for lower capacitance memory signaling systems and methods for connecting stacked CSPs in a serial cascade arrangement. In one preferred embodiment, on-die terminations are used selectively to terminate a cascaded series of conductive paths. In another preferred embodiment, a form standard provides a physical form that allows many of the varying package sizes found in a broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.Type: ApplicationFiled: September 1, 2004Publication date: March 2, 2006Applicant: Staktek Group L.P.Inventors: James Cady, Russell Rapport, James Wilder
-
Publication number: 20060033187Abstract: A rugged CSP module system and method are disclosed. In one embodiment of the present invention, a unitary mount is attached to a chip scale integrated circuit (CSP) to provide a CSP module with improved temperature cycle performance. In an exemplary system, the mount comprises a two metal layer flexible circuit attached to the CSP. Contacts are distributed along the flexible circuit for attachment to a printed circuit board (PCB). The body of the CSP then stands off from the PCB by the sum of the heights of the CSP contacts, the flex circuit, and the diameter of the contacts distributed along the flex circuit. Consequently, the forces arising from mismatched temperature coefficients of the PCB and CSP are distributed along a longer axis thus improving temperature cycle performance.Type: ApplicationFiled: August 12, 2004Publication date: February 16, 2006Inventors: James Wilder, James Wehrly
-
Publication number: 20060008945Abstract: The present invention stacks integrated circuits (ICs) into modules that conserve PWB or other board surface area. In another aspect, the invention provides a lower capacitance memory expansion addressing system and method and preferably with the CSP stacked modules provided herein. In a preferred embodiment in accordance with the invention, a form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design. In a preferred embodiment, the form standard will be devised of heat transference material such as copper to improve thermal performance. In an alternative embodiment, the form standard may include a heat spreader portion with mounting feet. In a preferred embodiment of the memory addressing system, a high speed switching system selects a data line associated with each level of a stacked module to reduce the loading effect upon data signals in memory access.Type: ApplicationFiled: September 7, 2005Publication date: January 12, 2006Inventors: James Cady, James Wilder, David Roper, James Wehrly
-
Publication number: 20050280135Abstract: The present invention stacks chip scale-packaged integrated circuits (CSPs) into modules that conserve PWB or other board surface area. In a two-high CSP stack or module devised in accordance with a preferred embodiment of the present invention, two CSPs are stacked, with one CSP disposed above the other. The two CSPs are connected with flex circuitry. A form standard is disposed between the flex circuitry and a CSP in the stack. The form standard can take many configurations and may be used where flex circuits are used to connect CSPs to one another in stacked modules having two or more constituent CSPs. For example, in stacked modules that include four CSPs, three form standards are employed in preferred embodiments, although fewer may be used. The form standard provides a thermally conductive physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design.Type: ApplicationFiled: August 4, 2005Publication date: December 22, 2005Inventors: Russell Rapport, James Cady, James Wilder, David Roper, James Wehrly, Jeff Buchle, Julian Dowden
-
Publication number: 20050263872Abstract: A form standard provides a physical form that allows many of the varying package sizes found in the broad family of CSP packages to be used to advantage while employing a standard connective flex circuitry design that is disposed about the form. In a preferred embodiment, the form standard will be devised of heat transference material such as copper to improve thermal performance.Type: ApplicationFiled: July 1, 2005Publication date: December 1, 2005Inventors: James Cady, James Wilder, David Roper, James Wehrly