Abstract: Microorganisms comprising a maltose-inducible promoter and methods of use in producing biologics and introducing biologics to sites in a maltose-dependent manner. The microorganisms include a maltose-inducible promoter operably connected to a coding sequence of a biologic. The biologic may be a polypeptide or a nucleic acid. Polypeptide biologics may include lytic proteins and/or secreted proteins. Nucleic acid biologics may include antisense RNA, other types of RNA, or other types of nucleic acids. The microorganisms can be used to produce the biologics and/or introduce the biologics to in vitro or in vivo sites in a maltose-dependent manner. The microorganisms can also be used in maltose-dependent gene silencing.

Abstract: An example method includes stressing, under different circuit-stress test conditions, a plurality of different types of regional circuits susceptible to time dependent dielectric breakdown (TDDB), and in response, monitoring for levels of reliability failure associated with the plurality of different types of regional circuits. The method includes storing a set of stress-test data based on each of the levels of reliability failure, the set of stress-test data being stored within the integrated circuit to indicate reliability-threshold test data specific to the integrated circuit. Within the integrated circuit, an on-chip monitoring circuit indicates operational conditions of suspect reliability associated with dielectric breakdown of at least one of the plurality of different types of regional circuits.

Abstract: The disclosure relates to voltage regulators and more specially voltage regulators including error detection and correction mechanisms. Example embodiments include a voltage regulator comprising: an input arranged to receive a trim signal used to specify a target voltage at an output of the regulator; a comparator arranged to compare a voltage derived from the trim signal to the voltage at the output of the regulator; a filter arranged to filter an output of the comparator; a checksum module comprising first and second portions arranged to calculate first and second checksums respectively from a plurality of states associated with the voltage regulator and to provide an error signal equal to the difference between the first and second checksums; and an adjustment module arranged to receive the error signal and adjust one or more of the plurality of states if the error signal is non-zero.

Abstract: A driving authorization system for a vehicle includes a connectivity unit for communication at least with a key and a keyless access authorization system. A server has an access lock, which can be activated or deactivated by the key and/or the keyless access authorization system. The keyless access authorization system is an application on a mobile device, further having an immobilizer. The immobilizer is designed in such a way that it is activated when the access lock is activated by the application and is deactivated again in this case only when the access lock is deactivated by the application.

Abstract: A method for operating an actuator regulation system which is designated to regulate a regulation variable of an actuator to a pre-definable target variable, the actuator regulation system being designated to generate a correcting variable according to a variable characterizing a regulation strategy, and to control the actuator according to the correcting variable, the variable characterizing the regulation strategy being determined according to a value function.

Abstract: An example apparatus includes a circuit and calibration circuitry. The circuit has complementary input ports to receive input signals including a monotonously rising and/or falling wave reference signal and a voltage-test signal to test at least one direct current (DC) voltage associated with the circuit by comparing the input signals using a first polarity and second polarity associated with the circuit to produce a first output signal and a second output signal. During operation, the circuit manifests an input voltage offset and a signal delay with each comparison of the input signals. The calibration circuitry processes the first and second output signals and, in response, calibrates or sets an adjustment for at least one signal path associated with the circuit in order to account for the input offset voltage and signal delay during normal operation of the circuit.

Abstract: A test system is provided. The test system includes a printed circuit board (PCB) and a plurality of integrated circuits (ICs) mounted on the PCB. A first IC of the plurality includes a first test circuit having a first test access port (TAP) controller. A second IC of the plurality includes a second test circuit having a second TAP controller and an embedded tester having a test data output coupled to a test data input of the first TAP controller by way of a link circuit. The embedded tester is configured to provide test control signals to the first TAP controller and the second TAP controller.

Abstract: A mechanism is provided for detecting errors and parametric deviations in phase-locked loops (PLLs) by measuring the effectiveness of a PLL in recovering from an introduced delay in phase at a phase comparator of the PLL. Embodiments measure a proxy for the area under a phase difference recovery curve of the PLL. If the phase difference recovery is out of predefined thresholds for the PLL, then an error in the PLL is flagged or responded to. In some embodiments, the PLL is automatically re-trimmed to bring the PLL back within the predefined thresholds.

Abstract: An example analog-test-bus (ATB) apparatus includes a plurality of comparator circuits, each having an output port, and a pair of input ports of opposing polarity including an inverting port and a non-inverting port, a plurality of circuit nodes to be selectively connected to the input ports of a first polarity, and at least one digital-to-analog converter (DAC) to drive the input ports of the plurality of comparator circuits. The apparatus further includes data storage and logic circuitry that accounts for inaccuracies attributable to the plurality of comparator circuits by providing, for each comparator circuit, a set of calibration data indicative of the inaccuracies for adjusting comparison operations performed by the plurality of comparator circuits.

Abstract: The present invention provides a mass spectrometer comprising a first ion trap, a second ion trap, a lens stack for directing ions from the first ion trap to the second ion trap and a housing. The first ion trap is arranged to form a linear or curved potential well and the second ion trap is an electrostatic ion trap, for example, an orbital ion trap, arranged to form an annular potential well. The mass spectrometer further comprises a unitary insert comprising a first cavity which holds the lens stack and a second cavity which holds the second ion trap, wherein the insert is inserted within the housing.

Abstract: Embodiments of a method, an IC device, and a circuit board are disclosed. In an embodiment, the method involves at an IC device of the system, monitoring activity on a bus interface of the IC device, wherein the bus interface is connected to a bus on the system that communicatively couples the IC device to at least one other IC device on the system, applying machine learning to data corresponding to the monitored activity to generate an activity profile, monitoring subsequent activity on the bus interface of the IC device, comparing data corresponding to the to subsequently monitored activity to the machine learning generated activity profile to determine if a system-level Trojan is detected, and generating a notification when it is determined from the comparison that a system-level Trojan has been detected.

Abstract: Certain aspects of the disclosure are directed to methods and apparatuses of intrusion detection for integrated circuits. An example apparatus can include a wired communications bus configured and arranged to carry data and a plurality of integrated circuits. The plurality of integrated circuits can include a first integrated circuit configured and arranged to operate in a scan mode during which the first integrated circuit performs a scan test to detect one or more faults in circuitry of the plurality of integrated circuits. The plurality of integrated circuits can further include a second integrated circuit configured and arranged to operate in a mission mode and supervise data traffic by monitoring communications including data patterns and accesses on the wired communications bus. In response to identifying a suspected illegitimate access, the second integrated circuit can perform a security action to mitigate a suspect illegitimate action in the plurality of integrated circuits.

Abstract: The present invention provides an electrode arrangement 10, 10? for an ion trap, ion filter, an ion guide, a reaction cell or an ion analyser. The electrode arrangement 10, 10? comprises an RF electrode 12a, 12b, 12a?, 12b? mechanically coupled to a dielectric material 11 . The RF electrode 12a, 12b, 12a?, 12b? is mechanically coupled to the dielectric material 11 by a plurality of separators 13 that are spaced apart and configured to define a gap between the RF electrode 12a, 12b, 12a?, 12b? and the dielectric material 11. Each of the plurality of separators 13 comprises a projecting portion 13b and the dielectric material 11 comprises corresponding receiving portions 11a such that on coupling of the RF electrode 12a, 12b, 12a?, 12b? to the dielectric material 11, the projecting portion 13b of each separator 13 is received within the corresponding receiving portion 11a of the dielectric material 11.

Abstract: An apparatus includes integrated circuitry (IC) and a further circuit. The IC includes internal circuits having sensitive/secret data (SSD) to be maintained as confidential relative to a suspect Hardware Trojan (HT) and including access ports through which information associated with the internal circuits is accessible by external circuitry associated with the HT. The further circuit to learn behavior of the internal circuits that is unique to the integrated circuitry under different operating conditions involving the internal circuits, involving the SSD and involving other data that is functionally associated with an application of the integrated circuitry.

Abstract: An ion trap 1 comprises one ejection electrode 2 for ion trapping having an opening 4, through which ions in the ion trap 1 can be ejected in an ejection direction E and further electrodes 3 for ion trapping, wherein the ejection electrode 2 and the further electrodes 3 are elongated in a longitudinal direction L. The angle ? between the longitudinal direction L and the ejection direction E is nearly 90°. The ion trap 1 comprises a primary winding 5 connected to an RF power supply 6, a secondary winding 7 coupling with the primary winding 5 for transforming the RF voltage of the RF power supply 6 supplying the transformed RF signals to the ejection electrode 2 and secondary windings 7? coupling with the primary winding 5 for transforming the RF voltage of the RF power supply 6 supplying the transformed RF signals to the further electrodes 3.

Abstract: A cleaning device for cleaning electrodes of an ion optical multipole device comprises at least one substantially longitudinal cleaning section, at least one handling section extending axially from the at least one cleaning section and at least one direction section extending axially from the at least one cleaning section. The at least one cleaning section has a larger cross section than the at least one handling section.

Abstract: The invention relates to a method for producing microcapsules, comprising the following steps: (a) providing a first aqueous preparation containing at least one prepolymer; (b) providing a second non-aqueous preparation containing the active substance to be encapsulated; (c) mixing the aqueous and the non-aqueous phases in the presence of at least one emulsifier and/or stabilizer in order to form an emulsion; (d) polymerizing the at least one prepolymer contained in the emulsion from step (c) in order to obtain a dispersion of microcapsules that enclose the active substance; (e) hardening and cross-linking the microcapsules obtained in step (d); and optionally (f) removing the microcapsules from the dispersion and drying the microcapsules, the method being characterized in that the emulsion is formed in the presence of at least one 1,2-diol in step (c).

Abstract: An apparatus in accordance with embodiments includes front-end radar circuitry and storage circuitry. The front-end radar circuitry generates a digital data stream that represents received radar wave signals and provides a cryptographic hash using the digital data stream, timing information, and apparatus-specific data. The storage circuitry stores the digital data stream and the cryptographic hash indicative of authenticity of the digital data stream.