Patents by Inventor Janet R. Easton
Janet R. Easton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120221757Abstract: One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications. Each I/O adapter event notification includes the setting of one or more specific indicators in system memory and an interruption request, the first of which results in a pending I/O adapter interruption request. While a request for an I/O adapter interruption is pending, subsequent message signaled interruption requests are converted to I/O adapter event notifications, but do not result in additional requests for I/O adapter interruptions.Type: ApplicationFiled: May 2, 2012Publication date: August 30, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Craddock, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Eric N. Lais, Gustav E. Sittmann, III, Cynthia Sitmann
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Publication number: 20120216198Abstract: Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.Type: ApplicationFiled: May 3, 2012Publication date: August 23, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Janet R. Easton, William A. Holder, Bernd Nerz, Damian L. Osisek, Gustav E. Sittmann, Cynthia Sittmann, Richard P. Tarcza, Leslie W. Wyman
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Publication number: 20120198114Abstract: One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications while retaining the message vector indication. An I/O adapter event notification may be routed and presented to a host or to a guest that the host is executing. To present the notification to the correct host or to the correct guest, various data structures in host and/or guest memory are used.Type: ApplicationFiled: April 13, 2012Publication date: August 2, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Frank W. Brice, JR., David Craddock, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Damian L. Osisek, Gustav E. Sittmann, III, Cynthia Sittmann
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Publication number: 20120191942Abstract: Host page management assist functions are employed to manage storage of a pageable mode virtual environment. These functions enable storage to be managed by a processor of the environment absent intervention of a host of the environment. The functions include a resolve host page function; a pin function; and unpin functions.Type: ApplicationFiled: March 21, 2012Publication date: July 26, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Geoffrey O. Blandy, Janet R. Easton, Lisa C. Heller, William A. Holder, Damian L. Osisek, Gustav E. Sittmann, Richard P. Tarcza, Leslie W. Wyman
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Patent number: 8214622Abstract: Host page management assist functions are employed to manage storage of a pageable mode virtual environment. These functions enable storage to be managed by a processor of the environment absent intervention of a host of the environment. The functions include a resolve host page function; a pin function; and unpin functions.Type: GrantFiled: May 27, 2004Date of Patent: July 3, 2012Assignee: International Business Machines CorporationInventors: Geoffrey O. Blandy, Janet R. Easton, Lisa C. Heller, William A. Holder, Damian L. Osisek, Gustav E. Sittmann, Richard P. Tarcza, Leslie W. Wyman
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Patent number: 8196139Abstract: Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.Type: GrantFiled: March 28, 2011Date of Patent: June 5, 2012Assignee: International Business Machines CorporationInventors: Janet R. Easton, William A. Holder, Bernd Nerz, Damian L. Osisek, Gustav E. Sittmann, Richard P. Tarcza, Leslie W. Wyman
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Publication number: 20110320663Abstract: One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications while retaining the message vector indication. An I/O adapter event notification may be routed and presented to a host or to a guest that the host is executing. To present the notification to the correct host or to the correct guest, various data structures in host and/or guest memory are used.Type: ApplicationFiled: June 23, 2010Publication date: December 29, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Frank W. Brice, JR., David Craddock, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Damian L. Osisek, Gustav E. Sittmann, III
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Publication number: 20110320664Abstract: The conditions under which adapter interruptions are made pending are controlled. Responsive to an interruption being presented to an operating system, subsequent interruptions are suppressed on all central processing units in the configuration. The operating system processes the interruption, including examining and processing indicators of reported events until the operating system discontinues the suppression. This enables the operating system to control the number of pending interruptions and the number of processors processing those interruptions.Type: ApplicationFiled: June 23, 2010Publication date: December 29, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brenton F. Belmar, David Craddock, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Damian L. Osisek, Donald W. Schmidt, Gustav E. Sittmann, III, Richard P. Tarcza
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Publication number: 20110321061Abstract: One or more message signaled interruption requests from one or more input/output (I/O) adapters are converted to I/O adapter event notifications. Each I/O adapter event notification includes the setting of one or more specific indicators in system memory and an interruption request, the first of which results in a pending I/O adapter interruption request. While a request for an I/O adapter interruption is pending, subsequent message signaled interruption requests are converted to I/O adapter event notifications, but do not result in additional requests for I/O adapter interruptions.Type: ApplicationFiled: June 23, 2010Publication date: December 29, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Craddock, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Eric N. Lais, Gustav E. Sittmann, III
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Publication number: 20110320662Abstract: A source identification facility is provided that enables identification of the one or more types of adapters requesting an interrupt in order to facilitate processing of the interrupt. The adapter types are accessible to the operating system and are used to tailor processing by the operating system of the interrupt.Type: ApplicationFiled: June 23, 2010Publication date: December 29, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: David Craddock, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Damian L. Osisek, Donald W. Schmidt, Gustav E. Sittmann, III
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Patent number: 7996585Abstract: Disclosed are a method and system of tracking real time use of I/O control blocks on a processing unit basis, in a multiprocessing system, such that in the case of a processing unit failure, a list accurately and concisely identifies the control blocks that need to be recovered. This eliminates the need to scan all the I/O control blocks, greatly reducing the overall system recovery time and minimizing impact to the rest of the running system. The preferred embodiment of the invention uses a task control block structure to record which I/O control blocks are in use by each Processing Unit. Also, the lock word structure defined in the I/O control blocks is provided with an index back into the task control block to facilitate managing the task control block entries.Type: GrantFiled: September 9, 2005Date of Patent: August 9, 2011Assignee: International Business Machines CorporationInventors: Janet R. Easton, Elke Nass, Kenneth J. Oakes, Andrew W. Piechowski, Martin Taubert, John S. Trotter, Ambrose Verdibello, Joachim von Buttlar, Robert Whalen, Jr.
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Publication number: 20110173615Abstract: Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.Type: ApplicationFiled: March 28, 2011Publication date: July 14, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Janet R. Easton, William A. Holder, Bernd Nerz, Damian L. Osisek, Gustav E. Sittmann, Richard P. Tarcza, Leslie W. Wyman
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Patent number: 7954099Abstract: A method, system, program product and computer data structure for providing for two levels of server virtualization. A first hypervisor enables multiple logical partitions to share a set of resources and provides a first level of virtualization. A second hypervisor enables multiple, independent virtual machines to share the resources that are assigned to a single logical partition and provides a second level of virtualization. All events for all of the virtual machines within said single logical partition are grouped into a single partition-owned event queue for receiving event notifications from the shared resources for that single logical partition. A request for an interrupt is signaled for the grouped events from the partition-owned event queue for the demultiplexing of grouped events, by the machine, from the partition-owned event queue into individual, virtualized event queues that are allocated on a per virtual machine basis.Type: GrantFiled: May 17, 2006Date of Patent: May 31, 2011Assignee: International Business Machines CorporationInventors: Janet R. Easton, Charles W. Gainey, Jr., Tan Lu, Ugochukwu C. Njoku, Gustav E. Sittmann, III, Stephen G. Wilkins, Frank W. Brice, Jr., Damian L. Osisek, Donald W. Schmidt
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Patent number: 7941799Abstract: Input/output (I/O) operation requests from pageable storage mode guests are interpreted without host intervention. In a pageable mode virtual environment, requests issued by pageable storage mode guests are processed by one or more processors of the environment absent intervention from one or more hosts of the environment. Processing of the requests includes manipulating, by at least one processor on behalf of the guests, buffer state information stored in host storage. The manipulating is performed via instructions initiated by the guests and processed by one or more of the processors.Type: GrantFiled: May 27, 2004Date of Patent: May 10, 2011Assignee: International Business Machines CorporationInventors: Janet R. Easton, William A. Holder, Bernd Nerz, Damian L. Osisek, Gustav E. Sittmann, Richard P. Tarcza, Leslie W. Wyman
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Patent number: 7752497Abstract: Disclosed are a method and system for detecting errors in a computer system including a processing unit to perform tasks to change items. The method comprises the steps of assigning a task control block to the processing unit, and using the task control block to keep track of items being changed by the processing unit. The method comprises the further steps of at defined times, checking the task control block to identify items being changed by the processing unit, and checking the states of said identified items to determine if those states are correct. The preferred embodiment of the invention detects an error when it arises (where possible), and utilizes an infrastructure that allows simple and periodic consistency checks (for example, at designated code points) that detect the error before it causes follow-on problems.Type: GrantFiled: September 9, 2008Date of Patent: July 6, 2010Assignee: International Business Machines CorporationInventors: Joachim von Buttlar, Janet R. Easton, Kenneth J. Oakes, Andrew W. Piechowski, Martin Taubert, John S. Trotter
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Patent number: 7587531Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. An input/output subsystem image is identified by an input/output subsystem image identifier, which is used by various programs to designate the particular input/output subsystem image for which an I/O operation is to be performed. An input/output subsystem image includes, for instance, one or more input/output paths. An input/output path of an input/output subsystem image is identified by an input/output path identifier, as well as a physical input/output path identifier.Type: GrantFiled: October 29, 2007Date of Patent: September 8, 2009Assignee: International Business Machines CorporationInventors: Frank W. Brice, Jr., Janet R. Easton, Charles W. Gainey, Jr., Steven G. Glassen, Beth Glendening, Marten J. Halma, Jeffrey P. Kubala, Hans-Helge Lehmann, Tan Lu, Allan S. Meritt, Kenneth J. Oakes, Charles E. Shapley, John S. Trotter, Leslie W. Wyman, Harry M. Yudenfriend
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Patent number: 7543095Abstract: Input/output interruptions are managed in computing environments that do not use dedicated per-guest interruption hardware to present interruptions. Dispatchable guest programs in the environment receive I/O interruptions directly without hypervisor intervention. This is facilitated by using one or more interruption controls stored in memory and associated with each guest program. For those guest programs that are not currently dispatchable, interruptions can be posted for the guests and notifications to the hypervisor can be aggregated. The hypervisor can then process a plurality of notifications for the plurality of guests in a single invocation.Type: GrantFiled: May 23, 2008Date of Patent: June 2, 2009Assignee: International Business Machines CorporationInventors: Brenton F. Belmar, Janet R. Easton, Tan Lu, Damian L. Osisek, Richard P. Tarcza, Leslie W. Wyman
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Patent number: 7478185Abstract: The setting of interruption initiatives is directly initiated by external adapters. An adapter external to the processors at which the initiative is to be made pending sends a request directly to a system controller coupled to the adapter and the processors. The system controller then broadcasts a command to the processors instructing the processors to set the interruption initiative.Type: GrantFiled: January 5, 2007Date of Patent: January 13, 2009Assignee: International Business Machines CorporationInventors: Douglas G. Balazich, Michael D. Campbell, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Kulwant M. Pandey, Gary E. Strait, Charles F. Webb
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Publication number: 20090006892Abstract: Disclosed are a method and system for detecting errors in a computer system including a processing unit to perform tasks to change items. The method comprises the steps of assigning a task control block to the processing unit, and using the task control block to keep track of items being changed by the processing unit. The method comprises the further steps of at defined times, checking the task control block to identify items being changed by the processing unit, and checking the states of said identified items to determine if those states are correct. The preferred embodiment of the invention detects an error when it arises (where possible), and utilizes an infrastructure that allows simple and periodic consistency checks (for example, at designated code points) that detect the error before it causes follow-on problems.Type: ApplicationFiled: September 9, 2008Publication date: January 1, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Joachim von Buttlar, Janet R. Easton, Kenneth J. Oakes, Andrew W. Piechowski, Martin Taubert, John S. Trotter
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Patent number: 7457985Abstract: Disclosed is a method for detecting errors in a computer system including a processing unit to perform tasks to change items. The method comprises the steps of assigning a task control block to the processing unit, and using the task control block to keep track of items being changed by the processing unit. The method comprises the further steps of at defined times, checking the task control block to identify items being changed by the processing unit, and checking the states of said identified items to determine if those states are correct. The preferred embodiment of the invention detects an error when it arises (where possible), and utilizes an infrastructure that allows simple and periodic consistency checks (for example, at designated code points) that detect the error before it causes follow-on problems.Type: GrantFiled: September 9, 2005Date of Patent: November 25, 2008Assignee: International Business Machines CorporationInventors: Joachim von Buttlar, Janet R. Easton, Kenneth J. Oakes, Andrew W. Piechowski, Martin Taubert, John Trotter