Patents by Inventor Janet R. Easton

Janet R. Easton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7454548
    Abstract: Input/output interruptions are managed in computing environments that do not use dedicated per-guest interruption hardware to present interruptions. Dispatchable guest programs in the environment receive I/O interruptions directly without hypervisor intervention. This is facilitated by using one or more interruption controls stored in memory and associated with each guest program. For those guest programs that are not currently dispatchable, interruptions can be posted for the guests and notifications to the hypervisor can be aggregated. The hypervisor can then process a plurality of notifications for the plurality of guests in a single invocation.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: November 18, 2008
    Assignee: International Business Machines Corporation
    Inventors: Brenton F. Belmar, Janet R. Easton, Tan Lu, Damian L. Osisek, Richard P. Tarcza, Leslie W. Wyman
  • Publication number: 20080263238
    Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. An input/output subsystem image is identified by an input/output subsystem image identifier, which is used by various programs to designate the particular input/output subsystem image for which an I/O operation is to be performed. An input/output subsystem image includes, for instance, one or more input/output paths. An input/output path of an input/output subsystem image is identified by an input/output path identifier, as well as a physical input/output path identifier.
    Type: Application
    Filed: October 29, 2007
    Publication date: October 23, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Frank W. Brice, Janet R. Easton, Charles W. Gainey, Steven G. Glassen, Beth Glendening, Marten J. Halma, Jeffrey P. Kubala, Hans-Helge Lehmann, Tan Lu, Allan S. Meritt, Kenneth J. Oakes, Charles E. Shapley, John S. Trotter, Leslie W. Wyman, Harry M. Yudenfriend
  • Publication number: 20080235425
    Abstract: Input/output interruptions are managed in computing environments that do not use dedicated per-guest interruption hardware to present interruptions. Dispatchable guest programs in the environment receive I/O interruptions directly without hypervisor intervention. This is facilitated by using one or more interruption controls stored in memory and associated with each guest program. For those guest programs that are not currently dispatchable, interruptions can be posted for the guests and notifications to the hypervisor can be aggregated. The hypervisor can then process a plurality of notifications for the plurality of guests in a single invocation.
    Type: Application
    Filed: May 23, 2008
    Publication date: September 25, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Brenton F. Belmar, Janet R. Easton, Tan Lu, Damian L. Osisek, Richard P. Tarcza, Leslie W. Wyman
  • Publication number: 20080168202
    Abstract: The setting of interruption initiatives is directly initiated by external adapters. An adapter external to the processors at which the initiative is to be made pending sends a request directly to a system controller coupled to the adapter and the processors. The system controller then broadcasts a command to the processors instructing the processors to set the interruption initiative.
    Type: Application
    Filed: January 5, 2007
    Publication date: July 10, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Douglas G. Balazich, Michael D. Campbell, Janet R. Easton, Mark S. Farrell, Thomas A. Gregg, Kulwant M. Pandey, Gary E. Strait, Charles F. Webb
  • Patent number: 7380041
    Abstract: Input/output interruptions are managed in computing environments that do not use dedicated per-guest interruption hardware to present interruptions. Dispatchable guest programs in the environment receive I/O interruptions directly without hypervisor intervention. This is facilitated by using one or more interruption controls stored in memory and associated with each guest program. For those guest programs that are not currently dispatchable, interruptions can be posted for the guests and notifications to the hypervisor can be aggregated. The hypervisor can then process a plurality of notifications for the plurality of guests in a single invocation.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: May 27, 2008
    Assignee: International Business Machines Corporation
    Inventors: Brenton F. Belmar, Janet R. Easton, Tan Lu, Damian L. Osisek, Richard P. Tarcza, Leslie W. Wyman
  • Publication number: 20070271559
    Abstract: A method, system, program product and computer data structure for providing for two levels of server virtualization. A first hypervisor enables multiple logical partitions to share a set of resources and provides a first level of virtualization. A second hypervisor enables multiple, independent virtual machines to share the resources that are assigned to a single logical partition and provides a second level of virtualization. All events for all of the virtual machines within said single logical partition are grouped into a single partition-owned event queue for receiving event notifications from the shared resources for that single logical partition. A request for an interrupt is signaled for the grouped events from the partition-owned event queue for the demultiplexing of grouped events, by the machine, from the partition-owned event queue into individual, virtualized event queues that are allocated on a per virtual machine basis.
    Type: Application
    Filed: May 17, 2006
    Publication date: November 22, 2007
    Applicant: International Business Machines Corporation
    Inventors: Janet R. Easton, Charles W. Gainey, Tan Lu, Ugochukwu C. Njoku, Gustav E. Sittmann, Stephen G. Wilkins, Frank W. Brice, Damian L. Osisek, Donald W. Schmidt
  • Patent number: 7290070
    Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. An input/output subsystem image is identified by an input/output subsystem image identifier, which is used by various programs to designate the particular input/output subsystem image for which an I/O operation is to be performed. An input/output subsystem image includes, for instance, one or more input/output paths. An input/output path of an input/output subsystem image is identified by an input/output path identifier, as well as a physical input/output path identifier.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: October 30, 2007
    Assignee: International Business Machines Corporation
    Inventors: Frank W. Brice, Jr., Janet R. Easton, Charles W. Gainey, Jr., Steven G. Glassen, Beth Glendening, Marten J. Halma, Jeffrey P. Kubala, Hans-Helge Lehmann, Tan Lu, Allan S. Meritt, Kenneth J. Oakes, Charles E. Shapley, John S. Trotter, Leslie W. Wyman, Harry M. Yudenfriend
  • Patent number: 7277968
    Abstract: Input/output (I/O) communications subadapters, such as subchannels, of an I/O subsystem are dedicated to components, such as I/O devices, of the I/O subsystem. The subadapters provide information about the associated components, in response to the execution of I/O instructions. To enhance I/O connectivity, a plurality of sets of I/O subadapters is provided to an operating system image. This allows programs of the operating system image to access a same component via different sets of I/O communications subadapters. Further, it enables an operating system image to use more than 64 k subchannels.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: October 2, 2007
    Assignee: International Business Machines Corporation
    Inventors: Frank W. Brice, Jr., Janet R. Easton, Charles W. Gainey, Jr., Jeffrey P. Kubala, Hans-Helge Lehmann, Tan Lu, Ugochukwu Njoku-Charles, Kenneth J. Oakes, Dale F. Riedy, Jr., Charles E. Shapley, Gustav E. Sittmann, Leslie W. Wyman, Harry M. Yudenfriend
  • Patent number: 7177961
    Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. In response to an operating system image submitting an input/output (I/O) request requesting access to an input/output subsystem image, a determination is made as to whether the operating system image is authorized to access the input/output subsystem image. In response to the access being authorized, the I/O request is authorized.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: February 13, 2007
    Assignee: International Business Machines Corporation
    Inventors: Frank W. Brice, Jr., Scott M. Carlson, Janet R. Easton, Charles W. Gainey, Jr., Marten J. Halma, Jeffrey P. Kubala, Tan Lu, Kenneth J. Oakes, Charles E. Shapley, Leslie W. Wyman, Harry M. Yudenfriend
  • Patent number: 7130949
    Abstract: Input/output interruptions are managed in computing environments that do not use dedicated per-guest interruption hardware to present interruptions. Dispatchable guest programs in the environment receive I/O interruptions directly without hypervisor intervention. This is facilitated by using one or more interruption controls stored in memory and associated with each guest program. For those guest programs that are not currently dispatchable, interruptions can be posted for the guests and notifications to the hypervisor can be aggregated. The hypervisor can then process a plurality of notifications for the plurality of guests in a single invocation.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: October 31, 2006
    Assignee: International Business Machines Corporation
    Inventors: Brenton F. Belmar, Janet R. Easton, Tan Lu, Damian L. Osisek, Richard P. Tarcza, Leslie W. Wyman
  • Patent number: 6996638
    Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. An input/output subsystem image is identified by an input/output subsystem image identifier, which is used by various programs to designate the particular input/output subsystem image for which an I/O operation is to be performed. An operating system is provided with access to a plurality of input/output subsystem images of the input/output subsystem. One or more controls are provided to the operating system image to enable the operating system image to access the plurality of input/output subsystem images.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: February 7, 2006
    Assignee: International Business Machines Corporation
    Inventors: Frank W. Brice, Jr., Scott M. Carlson, Janet R. Easton, Charles W. Gainey, Jr., Marten J. Halma, Jeffrey P. Kubala, Hans-Helge Lehmann, Tan Lu, Kenneth J. Oakes, Charles E. Shapley, Leslie W. Wyman, Harry M. Yudenfriend
  • Patent number: 6880021
    Abstract: An apparatus, method and program product for controlling the transfer of data in a data processing system having a processor handling an I/O request in an I/O operation, main storage controlled by the processor for storing data, and one or more I/O devices for sending data to or receiving data from said main storage. The apparatus includes a vector mechanism operable to register I/O requests by the devices to send or receive data from said main storage. A dispatcher is included which is operable to poll the vector mechanism to determine if there is an outstanding I/O request. An override bit has a first condition when an immediate interrupt is to be sent to the processor for handling an I/O request from the I/O device(s), and a second condition when the dispatcher is to poll the vector mechanism to determine if there is an outstanding I/O request. The override bit is set to its first condition or reset to its second condition by the processor.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: April 12, 2005
    Assignee: International Business Machines Corporation
    Inventors: Janet R. Easton, Jeffrey P. Kubala, Donald W. Schmidt
  • Patent number: 6854021
    Abstract: Method and apparatus for sending data from one partition to a second partition within a logically partitioned computer. In a data processing system having multiple logical partitions, a send queue is established in the first logical partition, and a receive queue is established in the second logical partition. The send queue is registered in the send queue in a lookup table available to all of the logical partitions. The send queue is registered using as a key the logical partition identification of the first logical partition and the subchannel number (LPAR-ID.SUBCHANNEL#) of the subchannel assigned to the partition. The receive queue is registered in the lookup table using as a key, the internet protocol address of the receive queue in the second partition. A send instruction from the first logical partition is executed which interrogates the lookup table using the LPAR-ID.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: February 8, 2005
    Assignee: International Business Machines Corporation
    Inventors: Donald W. Schmidt, John A. Aiken, Jr., Frank W. Brice, Jr., Janet R. Easton, Wolfgang Eckert, Marcus Eder, Steven G. Glassen, Jeffrey P. Kubala, Jeffrey M. Nick, Jerry W. Stevens, Ambrose A. Verdibello, Jr., Harry M. Yudenfriend, Heinrich K. Lindner
  • Publication number: 20040230757
    Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. In response to an operating system image submitting an input/output (I/O) request requesting access to an input/output subsystem image, a determination is made as to whether the operating system image is authorized to access the input/output subsystem image. In response to the access being authorized, the I/O request is authorized.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Frank W. Brice, Scott M. Carlson, Janet R. Easton, Charles W. Gainey, Marten J. Halma, Jeffrey P. Kubala, Tan Lu, Kenneth J. Oakes, Charles E. Shapley, Leslie W. Wyman, Harry M. Yudenfriend
  • Publication number: 20040230714
    Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. An input/output subsystem image is identified by an input/output subsystem image identifier, which is used by various programs to designate the particular input/output subsystem image for which an I/O operation is to be performed. An operating system is provided with access to a plurality of input/output subsystem images of the input/output subsystem. One or more controls are provided to the operating system image to enable the operating system image to access the plurality of input/output subsystem images.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Frank W. Brice, Scott M. Carlson, Janet R. Easton, Charles W. Gainey, Marten J. Halma, Jeffrey P. Kubala, Hans-Helge Lehmann, Tan Lu, Kenneth J. Oakes, Charles E. Shapley, Leslie W. Wyman, Harry M. Yudenfriend
  • Publication number: 20040230712
    Abstract: Input/output interruptions are managed in computing environments that do not use dedicated per-guest interruption hardware to present interruptions. Dispatchable guest programs in the environment receive I/O interruptions directly without hypervisor intervention. This is facilitated by using one or more interruption controls stored in memory and associated with each guest program. For those guest programs that are not currently dispatchable, interruptions can be posted for the guests and notifications to the hypervisor can be aggregated. The hypervisor can then process a plurality of notifications for the plurality of guests in a single invocation.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Brenton F. Belmar, Janet R. Easton, Tan Lu, Damian L. Osisek, Richard P. Tarcza, Leslie W. Wyman
  • Publication number: 20040230721
    Abstract: An input/output subsystem is configured as a plurality of input/output subsystem images, each of which appears to a program as an independent input/output subsystem. An input/output subsystem image is identified by an input/output subsystem image identifier, which is used by various programs to designate the particular input/output subsystem image for which an I/O operation is to be performed. An input/output subsystem image includes, for instance, one or more input/output paths. An input/output path of an input/output subsystem image is identified by an input/output path identifier, as well as a physical input/output path identifier.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Applicant: International Business Machines Corporation
    Inventors: Frank W. Brice, Janet R. Easton, Charles W. Gainey, Steven G. Glassen, Beth Glendening, Marten J. Halma, Jeffrey P. Kubala, Hans-Helge Lehmann, Tan Lu, Allan S. Meritt, Kenneth J. Oakes, Charles E. Shapley, John S. Trotter, Leslie W. Wyman, Harry M. Yudenfriend
  • Patent number: 6754738
    Abstract: An apparatus, method and program product for sending data to or receiving data from one or more I/O devices in an I/O operation with a main storage controlled by a processor in a data processing system. The apparatus includes a time-of-day (TOD) register for containing a TOD value, a clock for containing a current TOD value, and a summary register having a first condition when any one of said devices requests an I/O operation and a second condition when no devices have an outstanding I/O request, each device having an outstanding I/O request sets the summary register to its first condition only when the summary register is in its second condition, and further places the current TOD value in the TOD register. A checking program determines if a specified time delay has been exceeded between the value in said TOD register and the current TOD for each requested I/O operation. The checking program drives an interrupt to the processor when the specified time delay has been exceeded.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: June 22, 2004
    Assignee: International Business Machines Corporation
    Inventors: Frank W. Brice, Jr., Janet R. Easton, Steven G. Glassen, Kenneth J. Oakes, Donald W. Schmidt, Harry M. Yudenfriend
  • Publication number: 20040093452
    Abstract: An apparatus, method and program product for controlling the transfer of data in a data processing system having a processor handling an I/O request in an I/O operation, main storage controlled by the processor for storing data, and one or more I/O devices for sending data to or receiving data from said main storage. The apparatus includes a vector mechanism operable to register I/O requests by the devices to send or receive data from said main storage. A dispatcher is included which is operable to poll the vector mechanism to determine if there is an outstanding I/O request. An override bit has a first condition when an immediate interrupt is to be sent to the processor for handling an I/O request from the I/O device(s), and a second condition when the dispatcher is to poll the vector mechanism to determine if there is an outstanding I/O request. The override bit is set to its first condition or reset to its second condition by the processor.
    Type: Application
    Filed: September 28, 2001
    Publication date: May 13, 2004
    Applicant: International Business Machines Corporation
    Inventors: Janet R. Easton, Jeffrey P. Kubala, Donald W. Schmidt
  • Patent number: 6714997
    Abstract: Method and means to provide a mechanism by which a hypervisor can permit a real machine to interpretively execute certain I/O instructions independently of the value of an I-bit in the subchannel. This is necessary as the I-bit covers all I/O instructions that can be interpretively executed; however, there can be instances where the hypervisor cannot allow the interpretive execution of other I/O instructions but can permit the interpretive execution of the SIGA instruction.
    Type: Grant
    Filed: May 19, 2000
    Date of Patent: March 30, 2004
    Assignee: International Business Machines Corporation
    Inventors: Frank W. Brice, Jr., Janet R. Easton, Steven Messinger, Richard P. Tarcza, Leslie W. Wyman