Abstract: A semiconductor device includes a chip select signal flip-flop configured to: latch a chip select signal in-sync with a first propagation clock signal, and output a first chip select enable signal, and latch the chip select signal in-sync with a second propagation clock signal having a phase opposite to a phase of the first propagation clock signal, and output a second chip select enable signal; and a clock control circuit configured to generate the first propagation clock signal and the second propagation clock signal based on a clock signal, and selectively output one of the first propagation clock signal and the second propagation clock signal based on an enable level of the first chip select enable signal and an enable level of the second chip select enable signal.

Abstract: A solid electrolyte, including sulfide-based solid electrolyte particles and a coating layer disposed on the surface of the sulfide-based solid electrolyte particles and including a metal alkoxide.

Abstract: The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients.

Abstract: The present invention provides a specific acrylate compound component for a pressure-sensitive adhesive composition where it has excellent wettability, light resistance, and heat resistance. Moreover, it provides the pressure-sensitive adhesive composition which can cover step differences and defects and can minimize air bubbles or liftings between laminated layers while satisfying fundamentally required physical properties such as durability and pressure-sensitive adhesive. Especially, it provides the pressure-sensitive adhesive composition capable of minimizing air bubbles or liftings between laminated layers while satisfying fundamentally required physical properties such as durability and pressure-sensitive adhesive even when left at high temperature for a long time. It also provides an optical pressure-sensitive adhesive product which can cover defects located between laminated layers for a display module or a transparent electrode product.

Abstract: A capacitor component includes a body including dielectric layers, first and second internal electrodes, laminated in a first direction, facing each other, and first and second cover portions, disposed on outermost portions of the first and second internal electrodes, and first and second external electrodes, respectively disposed on both external surfaces of the body in a second direction, perpendicular to the first direction, and respectively connected to the first and second internal electrodes. An indentation including a glass is disposed at at least one of boundaries between the first internal electrodes and the first external electrode or one of boundaries between the second internal electrodes and the second external electrode.

Abstract: A semiconductor structure, comprising a redistribution layer (RDL) including a dielectric layer and a conductive trace within the dielectric layer; a first conductive member disposed over the RDL and electrically connected with the conductive trace; a second conductive member disposed over the RDL and electrically connected with the conductive trace; a first die disposed over the RDL; a second die disposed over the first die, the first conductive member and the second conductive member; and a connector disposed between the second die and the second conductive member to electrically connect the second die with the conductive trace, wherein the first conductive member is electrically isolated from the second die.

Abstract: Methods, systems, and media for presenting media content in response to a channel change request are provided. In some implementations, methods for presenting media content in response to a channel change request are provided, the methods comprising: causing media content provided on a first channel to be presented in a first display area on a first screen; receiving, at a hardware processor, a request to switch to a second channel; in response to receiving the request to switch to the second channel, causing thumbnail content corresponding to the second channel to be presented in the first display area; determining whether media content provided on the second channel is ready for presentation; and in response to determining that the media content provided on the second channel is ready for presentation, causing the media content provided on the second channel to be presented in the first display area.

Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.

Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.

Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.

Abstract: Disclosed is a radar device capable of operating in a dual mode, which includes a transmitter that includes a first signal generator that generates a Doppler radar signal and a second signal generator that generates a Frequency Modulated Continuous Wave (FMCW) radar signal, a receiver that receives a reflected signal reflected from a target and converts the reflected signal to a digital signal, a signal processing circuit that processes the digital signal differently depending on the dual mode to output an output signal, a signal analysis circuit that analyzes the output signal, and a controller that controls operations of the transmitter, the receiver, the signal processing circuit, and the signal analysis circuit, and the dual mode includes a first mode in which the first signal generator is activated and a second mode in which the second signal generator is activated.

Abstract: Provided is a drive amplifier. A drive amplifier may include: a main circuit configured to receive an RF input signal and output a first RF output signal; and a selective bias adjustment circuit comprising a first common gate transistor to which a first common gate bias voltage is applied and a second common gate transistor to which a second common gate bias voltage is applied, and configured to output a second RF output signal using the first common gate transistor and the second common gate transistor.

Abstract: Disclosed is a radar. The radar comprises a transmitter configured to radiate an output signal to an outside. The transmitter includes the phase shifter including a first oscillator configured to generate a first signal, based on a first external signal and a second oscillator configured to generate a second signal, based on a second external signal having a phase different from that of the first external signal, and wherein the first oscillator further receives the second signal to generate the first signal and the second oscillator further receives the first signal to generate the second signal, and configured to generate an oscillation signal of which phase is shifted based on the first signal and the second signal, and the signal amplifier configured to amplify the phase-shifted oscillation signal to generate the output signal.

Abstract: Provided is a transmitter. The transmitter includes a signal combiner configured to amplify a first differential radio frequency (RF) signal modulated to be transmitted through a first frequency band and a second differential RF signal modulated to be transmitted through a second frequency band non-adjacent to the first frequency band and summate the amplified first differential RF signal and the amplified second differential RF signal in a current mode to generate an RF signal and a power amplifier configured to amplify the generated RF signal.

Abstract: An apparatus includes a user input unit, a display unit, a control unit, and a buffer unit. The display unit includes a speed setting menu. The control unit selects a mode from the speed setting menu in response to the selection signal of the user, and controls a compression ratio of a voice codec and a transfer rate of a modem corresponding to a transmission-side radio, and a reception rate of a modem and a restoration rate of a voice codec corresponding to a reception-side radio, based on the selected mode. The buffer unit performs a storage function if there is a difference between the compression ratio of the voice codec and the transfer rate of the modem or if there is a difference between the reception rate of the modem and the restoration rate of the voice codec.

Abstract: A method and device for calibrating a DC offset and an I-Q imbalance component of an RF transceiver, the method including inputting a test signal into a transmitter, and converting the test signal into an analogue test signal; converting the analogue test signal using a transmitting mixer; sub-sampling a signal output from the transmitting mixer; and computing a DC offset calibrating constant number and an I-Q imbalance calibrating constant number from a sub-sampled signal.

Abstract: A method and device for calibrating a DC offset and an I-Q imbalance component of an RF transceiver, the method including inputting a test signal into a transmitter, and converting the test signal into an analogue test signal; converting the analogue test signal using a transmitting mixer; sub-sampling a signal output from the transmitting mixer; and computing a DC offset calibrating constant number and an I-Q imbalance calibrating constant number from a sub-sampled signal.

Abstract: Provided is a power amplifier installed in wireless communication terminals and systems. According to one aspect of the present invention, a reconfigurable power amplifier capable of selecting a wide band frequency is provided. The reconfigurable power amplifier includes input transistors receiving a radio frequency (RF) signal and a reconfigurable adaptive power cell configured to select the wide band frequency by applying a common-gate bias voltage to a plurality of common-gate transistors with a plurality of separate common gates to amplify the RF signal.

Abstract: Disclosed is an interpolation filter based on time assignment algorithm. An interpolation filter comprises an enable signal generating part generating enable signals for operation of the interpolation filter, an input value generating part generating input values, a first calculating part generating a first output value based on a first enable signal and a first input value, a second calculating part generating a second output value based on a second enable signal and a second input value, and an output value selecting part selecting a final output value among the first output value and the second output value. Thus, continuity of output data can be guaranteed, and hardware can be shared by using time assignment algorithm so that a total size of the interpolation filter can be reduced.

Abstract: Provided is a transmitter. The transmitter includes a signal combiner configured to amplify a first differential radio frequency (RF) signal modulated to be transmitted through a first frequency band and a second differential RF signal modulated to be transmitted through a second frequency band non-adjacent to the first frequency band and summate the amplified first differential RF signal and the amplified second differential RF signal in a current mode to generate an RF signal and a power amplifier configured to amplify the generated RF signal.