Patents by Inventor Jang-hwan Kim

Jang-hwan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100287333
    Abstract: A data storage device comprises a plurality of memory devices, a buffer memory, and a controller. The plurality of memory devices are connected to a plurality of channels and a plurality of ways. The buffer memory temporarily stores data to be written in the memory devices. The controller stores the data in the buffer memory based on channel and way information of the memory devices.
    Type: Application
    Filed: May 3, 2010
    Publication date: November 11, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin-Hyuk LEE, Jang hwan KIM, Han-Chan JO, Yeong-Jae WOO, Dong hyun SONG
  • Patent number: 7774541
    Abstract: A storage apparatus using a non-volatile memory, which retains data even after power interruption, as its cache and a method of managing the same are provided. The storage apparatus includes a main storage medium, a non-volatile memory used as a cache of the main storage medium, a region of the non-volatile memory being divided into a fixed region and a non-fixed region according to whether or not data is fixed, and a block management unit managing physical blocks by means of virtual addresses, the physical blocks being allocated to the non-volatile memory.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: August 10, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-kun Shin, Shea-yun Lee, Jang-hwan Kim, Dong-hyun Song
  • Publication number: 20100148753
    Abstract: A phase current prediction method is disclosed. The phase current prediction method predicts current representative of a PWM period using a motor model which receives current measured through a single current sensor as an input, instead of the measured current, and determines the predicted current to be phase current.
    Type: Application
    Filed: October 2, 2009
    Publication date: June 17, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung Ik Ha, Jong Ho Kim, Ho Sun Yoo, Hyung Sun You, Jang Hwan Kim
  • Patent number: 7716422
    Abstract: Provided are a storage apparatus using a non-volatile memory as a cache and a method of operating the same, in which the non-volatile memory is used as the cache so as to preserve data even when electricity is interrupted. The storage apparatus using a non-volatile memory as a cache includes a main storage medium, the non-volatile memory being used as the cache of the main storage medium and having a stationary region and a non-stationary region divided according to whether data are fixed, and a block management unit managing blocks allocated in the non-volatile memory.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: May 11, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-kun Shin, Sang-lyul Min, Shea-yun Lee, Jang-hwan Kim, Dong-hyun Song, Jeong-eun Kim
  • Patent number: 7636807
    Abstract: A storage apparatus using a nonvolatile memory as a cache and a mapping information recovering method for the storage apparatus are provided. The storage apparatus includes a mapping information storage module which stores in the nonvolatile memory mapping information of the nonvolatile memory and a first physical block address allocated when the mapping information is stored; a scan module which scans the first physical block address through a second physical block address allocated currently; and a mapping information recovery module which recovers the mapping information between the first physical block address and the second physical block address based on a result of the scan by the scan module.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: December 22, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-kun Shin, Jang-hwan Kim, Jeong-eun Kim
  • Patent number: 7613982
    Abstract: A data processing apparatus and method for a flash memory, which make it easy to determine whether data stored in the flash memory is valid, are provided. The data processing apparatus includes a user request unit which issues a request for performing a data operation on a flash memory using a predetermined logical address, a conversion unit which converts the logical address into a physical address, and a control unit which performs the data operation on the physical address and writes inverted data obtained by inverting error correction code (ECC) corresponding to data used in the data operation to a region indicating whether the ECC is erroneous.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: November 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-kyu Kim, Min-young Kim, Jang-hwan Kim, Song-ho Yoon
  • Publication number: 20080147994
    Abstract: A command scheduling method and apparatus for reducing the complexity of a virtual file system embodied in a nonvolatile data storage device and performing efficient interleaving by setting a preparation phase of a command schedule in the virtual file system embodied in the nonvolatile data storage device is provided. The method includes setting a preparation phase in which a plurality of metadata commands for data management are executed, and if the plurality of metadata commands are completely executed in the preparation phase, executing data read/write commands. Accordingly, by simplifying the scheduling structure of the virtual file system (FTL), code size and resource use can be reduced. In addition, by performing exact interleaving, burst data transmission between a host and a memory storage device can be achieved even without using a large capacity buffer.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 19, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seong-hun JEONG, Sung-hwan BAE, Jang-hwan KIM, Nam-hyun YUN, Young-bong KIM, Houng-sog MIN, Dong-woo LEE, Shin-wook KANG, Hyang-suk PARK
  • Publication number: 20080109590
    Abstract: Example embodiments provide a garbage collection method which includes applying a weight to each of at least two or more factors to calculate garbage collection costs; configuring a hash table using the calculated garbage collection costs; searching a block having the lowest garbage collection cost from the hash table; and performing garbage collection on the searched block.
    Type: Application
    Filed: December 28, 2006
    Publication date: May 8, 2008
    Inventors: Myung-Jin Jung, Jang-Hwan Kim, Dong-Hyun Song, Shea-Yun Lee, Yeon-Jin Mo, Jae-Hyun Hwang
  • Publication number: 20080104308
    Abstract: A method is for recovering a block mapping table in a system including a flash memory device, where the block mapping table utilizes address mapping in accordance with a wear-leveling scheme. The method includes reading block arrangement information from the flash memory device for the wear-leveling scheme, restoring the block mapping table with reference to allocation block information included in the block arrangement information and scanning address allocation information included in spare regions of erased blocks of the flash memory device with reference to erased block information included in the block arrangement information and updating the block mapping table in accordance with the scanned address allocation information.
    Type: Application
    Filed: January 17, 2007
    Publication date: May 1, 2008
    Inventors: Yeon-Jin Mo, Jang-Hwan Kim, Dong-Hyun Song, Shea-Yun Lee, Jae-Hyun Hwang, Myung-Jin Jung
  • Publication number: 20080016428
    Abstract: A memory device detects and corrects bit errors. The memory device includes cyclic redundancy check (CRC) and error correction code (ECC) circuits. The CRC circuit generates a write CRC code corresponding to data to be stored in memory cells. The ECC circuit generates an ECC code corresponding to the data and detecting and correcting a bit error of the data by means of the ECC code during a read operation. The CRC circuit generates a read CRC code corresponding to data corrected by the ECC circuit during the read operation, and corrects a bit error of the data according to a comparison of the read CRC code and the write CRC code.
    Type: Application
    Filed: October 17, 2006
    Publication date: January 17, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Shea-Yun Lee, Dong-Hyun Song, Jang-Hwan Kim, Sang-Lyul Min
  • Publication number: 20080001886
    Abstract: A circuit for stabilizing a common voltage of a liquid crystal display device includes a data driving unit for providing video data to a liquid crystal display panel and a gate driving unit for providing scan pulses to the liquid crystal display panel, a timing controller for outputting various control signals for controlling the data driving unit and the gate driving unit, and outputting the video data, and a common voltage output unit for controlling outputting of a common voltage provided to the liquid crystal display panel according to a gate output enable signal inputted from the timing controller to thereby minimize the common voltage from being unstable.
    Type: Application
    Filed: December 11, 2006
    Publication date: January 3, 2008
    Inventors: Jang-Hwan Kim, Kyoung-Hun Lee
  • Patent number: 7295479
    Abstract: A method and an apparatus for managing bad blocks generated while a flash memory is being used. A method for managing a bad block in a flash memory includes (a) allocating a used area having a plurality of used blocks and a spare area having a plurality of spare blocks in the flash memory, and providing a block map page group including a plurality of block map pages in which mapping information to map a bad block generated in either of the used area or the spare block to a spare block, (b) having mapping information of the block map page reside among the block map page groups in the memory, and (c) mapping the bad block generated during a flash operation to an unused spare block found through the mapping information, updating the mapping information, and recording the updated mapping information on the block map page.
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: November 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Song-ho Yoon, Jang-hwan Kim, Bum-soo Kim, Tae-sun Chung, Ji-hyun In
  • Publication number: 20070226588
    Abstract: A memory device detects and correct bit errors. The memory device includes cyclic redundancy check (CRC) and error correction code (ECC) circuits. The CRC circuit generates a write CRC code corresponding to data to be stored in memory cells. The ECC circuit generates an ECC code corresponding to the data and detecting and correcting a bit error of the data by means of the ECC code during a read operation. The CRC circuit generates a read CRC code corresponding to data corrected by the ECC circuit during the read operation, and detects a bit error of the data according to a comparison of the read CRC code and the write CRC code.
    Type: Application
    Filed: May 15, 2007
    Publication date: September 27, 2007
    Inventors: Shea-Yun Lee, Dong-Hyun Song, Jang-Hwan Kim, Sang-Lyul Min
  • Publication number: 20070204100
    Abstract: A storage apparatus using a nonvolatile memory as a cache and a mapping information recovering method for the storage apparatus are provided. The storage apparatus includes a mapping information storage module which stores in the nonvolatile memory mapping information of the nonvolatile memory and a first physical block address allocated when the mapping information is stored; a scan module which scans the first physical block address through a second physical block address allocated currently; and a mapping information recovery module which recovers the mapping information between the first physical block address and the second physical block address based on a result of the scan by the scan module.
    Type: Application
    Filed: January 23, 2007
    Publication date: August 30, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-kun Shin, Jang-hwan Kim, Jeong-eun Kim
  • Publication number: 20070186065
    Abstract: An embodiment of a data storage apparatus includes a storage medium, a flash memory buffer configured to store write data to be written in the storage medium, and a controller configured to compare the amount of unused space in the flash memory buffer to a first reference value, compare the amount of valid data in the flash memory buffer to a second reference value, and in response to the comparisons, conducts either a block reclaim operation on the flash memory buffer or a buffer flash operation to transfer valid data from the flash memory buffer to the storage medium. An embodiment of a method for managing a data storage apparatus includes determining when to perform a reclaim operation on a nonvolatile memory buffer, and performing the reclaim operation by moving data either physically or virtually within the nonvolatile memory buffer.
    Type: Application
    Filed: January 29, 2007
    Publication date: August 9, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shea-Yun LEE, Dong-Kun SHIN, Dong-Hyun SONG, Jang-Hwan KIM, Jeong-Eun KIM
  • Publication number: 20070150654
    Abstract: A storage apparatus using a non-volatile memory, which retains data even after power interruption, as its cache and a method of managing the same are provided. The storage apparatus includes a main storage medium, a non-volatile memory used as a cache of the main storage medium, a region of the non-volatile memory being divided into a fixed region and a non-fixed region according to whether or not data is fixed, and a block management unit managing physical blocks by means of virtual addresses, the physical blocks being allocated to the non-volatile memory.
    Type: Application
    Filed: November 20, 2006
    Publication date: June 28, 2007
    Inventors: Dong-kun Shin, Shea-yun Lee, Jang-hwan Kim, Dong-hyun Song
  • Publication number: 20070150647
    Abstract: Provided are a storage apparatus using a non-volatile memory as a cache and a method of operating the same, in which the non-volatile memory is used as the cache so as to preserve data even when electricity is interrupted. The storage apparatus using a non-volatile memory as a cache includes a main storage medium, the non-volatile memory being used as the cache of the main storage medium and having a stationary region and a non-stationary region divided according to whether data are fixed, and a block management unit managing blocks allocated in the non-volatile memory.
    Type: Application
    Filed: November 20, 2006
    Publication date: June 28, 2007
    Inventors: Dong-kun Shin, Sang-lyul Min, Shea-yun Lee, Jang-hwan Kim, Dong-hyun Song, Jeong-eun Kim
  • Publication number: 20060120166
    Abstract: A data processing apparatus and method for a flash memory, which make it easy to determine whether data stored in the flash memory is valid, are provided. The data processing apparatus includes a user request unit which issues a request for performing a data operation on a flash memory using a predetermined logical address, a conversion unit which converts the logical address into a physical address, and a control unit which performs the data operation on the physical address and writes inverted data obtained by inverting error correction code (ECC) corresponding to data used in the data operation to a region indicating whether the ECC is erroneous.
    Type: Application
    Filed: November 16, 2005
    Publication date: June 8, 2006
    Inventors: Jin-Kyu Kim, Min-young Kim, Jang-hwan Kim, Song-ho Yoon
  • Publication number: 20060109725
    Abstract: A method and an apparatus for managing bad blocks generated while a flash memory is being used. A method for managing a bad block in a flash memory includes (a) allocating a used area having a plurality of used blocks and a spare area having a plurality of spare blocks in the flash memory, and providing a block map page group including a plurality of block map pages in which mapping information to map a bad block generated in either of the used area or the spare block to a spare block, (b) having mapping information of the block map page reside among the block map page groups in the memory, and (c) mapping the bad block generated during a flash operation to an unused spare block found through the mapping information, updating the mapping information, and recording the updated mapping information on the block map page.
    Type: Application
    Filed: January 3, 2006
    Publication date: May 25, 2006
    Inventors: Song-ho Yoon, Jang-hwan Kim, Bum-soo Kim, Tae-sun Chung, Ji-hyun In
  • Patent number: 7009896
    Abstract: A method and an apparatus for managing bad blocks generated while a flash memory is being used. A method for managing a bad block in a flash memory includes (a) allocating a used area having a plurality of used blocks and a spare area having a plurality of spare blocks in the flash memory, and providing a block map page group including a plurality of block map pages in which mapping information to map a bad block generated in either of the used area or the spare block to a spare block, (b) having mapping information of the block map page reside among the block map page groups in the memory, and (c) mapping the bad block generated during a flash operation to an unused spare block found through the mapping information, updating the mapping information, and recording the updated mapping information on the block map page.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: March 7, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Song-ho Yoon, Jang-hwan Kim, Bum-soo Kim, Tae-sun Chung, Ji-hyun In