Abstract: A device and corresponding method of fabrication thereof are disclosed, where the device provides a contact for semiconductor and display devices, the device including a substrate, a first wiring line assembly formed on the substrate, an under-layer formed on the first wiring line assembly, an organic insulating layer formed on the under-layer such that the organic insulating layer covers the under-layer, a pattern on the organic insulating layer for contact holes to expose the under-layer, etched contact holes formed in the under-layer in correspondence with the pattern such that the underlying first wiring line assembly is exposed to the outside, a cured organic insulating layer formed on the under-layer, and a second wiring line assembly formed on the organic insulating layer such that the second wiring line assembly is connected to the first wiring line assembly through the etched contact holes, and the corresponding method of fabrication including forming a first wiring line assembly on a substrate, form

Abstract: In a method of forming a metal line and a method of manufacturing a display substrate, a channel layer and a metal layer are successively formed on a base substrate. A photoresist pattern is formed in a wiring area. The metal layer is etched by using the photoresist pattern to form a metal line. The photoresist pattern is removed by a predetermined thickness to form a residual photoresist pattern on the metal line. The channel layer is etched by using the metal line to form an undercut under the metal line. The protruding portion of the metal line is removed by using the residual photoresist pattern. The protruding portion relatively protrudes by formation of the undercut. Thus, an aperture ratio is increased, an afterimage is prevented, and the display quality is improved.

Abstract: A display substrate includes a plurality of transistors, a plurality of color filters, a plurality of pixel electrodes, a plurality of supporting members, and a plurality of filling members. The transistors are connected to a plurality of gate lines extending in a first direction on a base substrate and a plurality of data lines extending in a second direction crossing the first direction. The color filters are disposed over the transistors, and have a plurality of holes. The pixel electrodes are disposed on the color filters, and electrically connect to the transistors. The supporting members are disposed on the color filters, and maintain a gap between the base substrate and a substrate opposing the base substrate. The filling members are comprised of the same material as the supporting members, and fill the holes.

Abstract: A method of manufacturing a display substrate is described. In the method, a gate line and a gate electrode are formed on a base substrate. A source metal layer is formed on the base substrate having the gate line and the gate electrode. A data line, a source electrode and a drain electrode are formed by etching the source metal layer by using an etching gas. An additive gas is provided to the base substrate having the drain electrode so that the additive gas reacts with an etching component of the etching gas to remove a by-product formed at an exposed portion of the data line, the source electrode and drain electrode. Thus, corrosion of the fine pattern due to an etching gas may be prevented and/or reduced.

Abstract: An array substrate includes a base substrate, a gate line, a gate insulation layer, a data line, a thin-film transistor (“TFT”) and a pixel electrode. The gate line includes a gate covering line formed in a first direction on the base substrate and a gate main line protruded from the gate covering line. The gate insulation layer is formed on the base substrate to cover the gate line. The data line is formed on the gate insulation layer in a second direction crossing the first direction. The TFT is electrically connected to the gate line and the data line. The pixel electrode is electrically connected to the TFT. Therefore, a gate line is thicker than a gate covering line and a gate main line having a low resistance is further formed, so that a gate signal may be quickly transferred along the gate line without a signal delay.

Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

Abstract: A manufacturing method of a display device, wherein the manufacturing method for an embodiment includes: forming color filters in a plurality of pixel regions; forming a conductive layer on the color filters; and separating the conductive layer in each of the pixel regions through a photolithography process and forming a pixel electrode; wherein a groove is formed between the adjacent color filters having different colors at boundaries between the pixel regions; and wherein the photolithography process uses a negative photoresist material.

Abstract: A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.

Abstract: “A liquid crystal display of the present invention comprises a first substrate, a second substrate and a liquid crystal layer injected there between. The first substrate has first base plate, a gate line formed on the first base plate, a data line formed over the gate line, a switching element electrically connected to the gate line and the data line, a pixel electrode electrically connected to the switching element, an element dividing LC domains formed on the pixel electrode, first alignment layer formed on the domain dividing element. The second substrate comprises second base plate, a common electrode formed on the second base plate, a first protrusion and a second protrusion formed on the common electrode. The first protrusion and the second protrusion have different heights. A second alignment layer is formed on the protrusions.

Abstract: A conductive layer, including a lower layer made of refractory metal such as chromium, molybdenum, and molybdenum alloy and an upper layer made of aluminum or aluminum alloy, is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode on a substrate. At this time, the upper layer of the gate pad is removed using a photoresist pattern having different thicknesses depending on position as etch mask. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire including a data line, a source electrode, a drain electrode, and a data pad.

Abstract: A method of manufacturing a thin film transistor array panel is provided, The method includes: forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming a data line and a drain electrode on the semiconductor layer; depositing a passivation layer on the data line and the drain electrode; forming a photoresist including a first portion and a second portion thinner than the first portion on the passivation layer; etching the passivation layer using the photoresist as a mask to expose a portion of the drain electrode at least in part; removing the second portion of the photoresist; depositing a conductive film; and removing the photoresist to form a pixel electrode on the exposed portion of the drain electrode.

Abstract: A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode.

Abstract: A thin film transistor array panel includes a substrate, a first gate line and a second gate line formed on the substrate, a storage electrode line between the first gate line and the second gate line, a data line intersecting the first gate line and the second gate line, a first thin film transistor connected to the first gate line and the data line, at least one color filter formed on the first thin film transistor, wherein the color filter comprises a first portion adjacent the first gate line with respect to the storage electrode line, a second portion adjacent the second gate line with respect to the storage electrode line, and a first connection connecting the first portion and the second portion and having a narrower width than that of the first and second portions, a first sub-pixel electrode formed on the color filter and connected to the first thin film transistor, and a second sub-pixel electrode facing the first sub-pixel electrode with respect to a gap, wherein at least one of an edge of the firs

Abstract: A display substrate includes a pixel layer, a color filter layer and a pixel electrode. The pixel layer includes a first storage electrode, a second storage electrode and a third storage electrode respectively associated with a red pixel, a green pixel and a blue pixel. At least one of the first, second and third storage electrodes has a different area from a remainder of the storage electrodes. The color filter layer includes a red color filter, a green color filter and a blue color filter formed on the pixel layer. The red, green and blue color filters respectively correspond to the red pixel, the green pixel and the blue pixel. Pixel electrodes are formed on the color filter layer. The pixel electrodes correspond to the red, green and blue pixels.

Abstract: A method of manufacturing a thin film transistor array panel includes forming a gate line including a gate electrode, forming a gate insulating layer on the gate line, forming a semiconductor stripe on the gate insulating layer; forming ohmic contacts on the semiconductor stripe, forming a data line including a source electrode and a drain electrode on the ohmic contacts, depositing a passivation layer on the data line and the drain electrode, and forming a pixel electrode connected to the drain electrode.

Abstract: A display substrate includes a gate line, a gate insulating layer, a data line, a thin-film transistor (TFT), a storage line, a passivation layer, a color filter layer, a pixel electrode, a first light-blocking layer and a second light-blocking layer. The storage line includes the same material as the gate line. The passivation layer covers the data line. The color filter layer is formed on the passivation layer. The pixel electrode is formed on the color filter layer in each pixel. The first light-blocking layer is formed between adjacent pixel electrodes, and includes the same material as the gate line. The second light-blocking layer is formed between the first light-blocking layer, and includes the same material as the data line. Therefore, an aperture ratio may be increased.

Abstract: The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

Abstract: A display substrate includes a thin-film transistor (TFT) layer, a color filter layer and a pixel electrode formed on a substrate. The TFT layer includes a gate line, a data line electrically insulated from the gate line and extending in a direction different from the gate line, a TFT electrically connected to the gate line and the data line, and a storage electrode formed from the same layer as the gate line in each pixel. The color filter layer includes a storage hole extending to a portion of the TFT layer corresponding to the storage electrode. The storage hole has a horizontal cross-sectional area greater than the storage electrode, wherein the horizontal cross-sectional area is measured in a plane parallel to the substrate. The pixel electrode is formed on the color filter layer and in the storage hole to form a storage capacitor with the storage electrode.

Abstract: A pixel electrode is located in a pixel area defined by the intersections of the two adjacent gate lines and the two adjacent data lines, and has two linear openings extending in the transverse direction, which divide the pixel electrodes into three rectangular portions arranged in the longitudinal direction. The portions are connected in turn, and each portion of the pixel electrode has an X-shaped projection formed by the X-shaped member thereunder, and portions of the gate insulating film and the passivation film on the member. Since the gate insulating film and the passivation film are also located on the gate lines and the data lines, and the layered structure on the wires acts as peripheral projections of the pixel electrode. Each area enclosed by the projections, the openings and the peripheral projections is in a shape of equilateral trapezoid. The areas may be defined as the areas where the pixel electrode is in direct contact with the substrate.