Abstract: A TFT array panel includes an insulating substrate, a gate line, a storage electrode line, a gate insulating layer, a semiconductor island formed on the gate insulating layer, and a data line and a drain electrode formed thereon. The data line and drain electrode are covered with a passivation layer. A pixel electrode is formed on the passivation layer and connected to the drain electrode through a contact hole. The TFT array panel is covered with an alignment layer rubbed approximately in a direction from the upper left corner to lower right corner of the TFT array panel or the pixel electrodes. The pixel electrode overlaps the gate line and data line and has an expansion located near the upper left corner of the pixel electrode to increase the width of the corresponding overlapping area between the pixel electrode and the gate line and/or data line.

Abstract: A display panel includes a first substrate, a second substrate and a spacer disposed there between. The second substrate includes a black matrix pattern, a color filter, a dummy color filter and a common electrode. The black matrix pattern is formed with an opening portion which is filled by the color filter. The dummy color filter is made of same material as the color filter and extends in a vertical direction along which the spacer also extends. The spacer is formed between the first substrate and the second substrate in correspondence with location of the dummy color filter so that the effective spaced apart distance that the spacer provides between the first and second substrates is a function of a thickness of the dummy color filter.

Abstract: The present invention provides a manufacturing method of a thin film transistor array panel, which includes forming a gate line on a substrate; forming a gate insulating layer, a semiconductor layer, and an ohmic contact on the gate line; forming a first conducting film including Mo, a second conducting film including Al, and a third conducting film including Mo on the ohmic contact; forming a first photoresist pattern on the third conducting film; etching the first, second, and third conducting films, the ohmic contact, and the semiconductor layer using the first photoresist pattern as a mask; removing the first photoresist pattern by a predetermined thickness to form a second photoresist pattern; etching the first, second, and third conducting films using the second photoresist pattern as a mask to expose a portion of the ohmic contact; and etching the exposed ohmic contact using a Cl-containing gas and a F-containing gas.

Abstract: A liquid crystal display includes a first insulating substrate, a data insulating layer disposed on a data wire of the first insulating substrate, and a color filter layer, an organic film layer, and a light shielding layer disposed on the data insulating layer. The organic film layer is positioned on the color filter layer, and the light shielding layer is positioned on the organic film layer in the screen display area. The color filter layer and the light shielding layer contact each other in the peripheral area.

Abstract: Provided are a gate-lines driver circuit and a liquid crystal display (LCD) device including the same. The gate-lines driver may be in danger of being subjected to static electricity and it includes: a wiring unit which receives signals from an external source and a circuit unit which outputs driving signals in response to a plurality of control signals received from the wiring unit. The circuit unit includes a plurality of shift registers, each having shift register wirings, wherein the wiring unit includes first through n-th vertical signal lines arranged sequentially in order of distance from the shift registers, with the first vertical signal line being located farthest from the shift registers.

Abstract: A TFT array panel includes a substrate, a first gate line and a second gate line disposed on the substrate, a storage electrode line disposed on the substrate, a first data line intersecting the first and second gate lines, a second data line intersecting the first and second gate lines and spaced apart from the first data line, a drain electrode facing a part of the first data line and the second data line, an organic insulating layer disposed on the first data line and the second data line, the organic insulating layer having a contact hole exposing the drain electrode, a pixel electrode disposed on the organic insulating layer, the pixel electrode electrically connected to the drain electrode, and a storage electrode making a storage conductor with the pixel electrode, wherein the pixel electrode comprises a first part overlapping the first data line, and a second part overlapping the second data line, and wherein the width of the first part is different from that of the second part.

Abstract: A liquid crystal display includes first and second gate lines, a data line crossing the first and second gate lines, a pixel electrode including first and second sub-pixel electrodes electrically disconnected from each other, a first thin film transistor connected to the first gate line, the data line, and the first sub-pixel electrode, a second thin film transistor connected to the first gate line, the data line, and the second sub-pixel electrode, and a third thin film transistor connected to the second gate line, the second sub-pixel electrode, and a charge sharing capacitor including a first and second electrode. A data voltage applied to the second sub-pixel electrode and to a first electrode swings between a negative voltage and a positive voltage with respect to a common voltage, and a voltage smaller than an average value of the negative voltage and the positive voltage is applied to a second electrode.

Abstract: A display substrate includes a plurality of color filters formed on a base substrate, a gate line formed in a trench defined by at least one of the color filters and extended along a first direction, an insulation layer formed on the color filters and the gate line, a data line formed on the insulation layer to be extended along a second direction crossing the first direction, and pixel electrodes formed on the base substrate having the data line formed thereon.

Abstract: The present application relates to a liquid crystal display including a first substrate, a plurality of gate lines, a plurality of data lines, thin film transistors connected to the gate and data lines, a barrier rib formed on the data lines, and pixel electrodes connected to the thin film transistors. The thin film transistors can be formed using a colored organic film that has an optical density in a range of 1 to 3. Color filters fill the regions surrounded by the barrier rib. Pixel electrodes can be formed on the color filters. A common electrode can be formed on the second substrate facing the first substrate. A liquid crystal layer can be situated between the first and second substrates, which are spaced apart at a predetermined distance by spacers.

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract: A display substrate includes a transistor layer, a plurality of color filters, a first blocking member, a supporting member, a circuit part, a second blocking member and a protruding member. The first blocking member is disposed between different color filters. The supporting member maintains a distance between a base substrate and a substrate facing the base substrate. A circuit part is disposed in a peripheral area surrounding a display area, and the circuit part includes a metal pattern and a contact electrode in contact with the metal pattern. The second blocking member includes substantially the same material as the first blocking member and the second blocking member covers the circuit part. The protruding member includes substantially the same material as the second blocking member, and is integrally formed with the second blocking member.

Abstract: A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.

Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.

Abstract: In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.

Abstract: A thin film transistor (“TFT”) array panel includes; a substrate including a display and peripheral area, a display area signal line and a display area TFT disposed in the display area, the display area TFT connected to the display area signal line, a plurality of peripheral area signal lines, a light blocking member disposed on the display area signal line, the display area TFT, and the peripheral area signal lines, a transparent connector connecting one of peripheral area signal lines and another one of the peripheral area signal lines through a contact hole passing through the light blocking member, a pixel electrode connected to the display area TFT, a spacer disposed on a layer above the light blocking member, and a light blocking assistance member composed of the same material as the spacer on the transparent connector, the light blocking assistance member covering at least the contact hole.

Abstract: Provided are a thin-film transistor (TFT) substrate which can facilitate the formation of contact holes and has improved reliability and a method of fabricating the TFT substrate. The TFT substrate includes a gate wiring formed on an insulating substrate; a data wiring defining a pixel region by intersecting the gate wiring, the data wiring including a source electrode and a drain electrode; a plurality of black matrix barrier ribs formed along the boundaries of the pixel region; a color filter formed to cover the pixel region; a pixel electrode formed on the color filter; and a plurality of contact holes formed through the color filter near the corners of the pixel region through which the pixel electrode and the drain electrode contact each other.

Abstract: A display substrate includes a gate line, a gate insulating layer, a data line, a thin-film transistor (TFT), a storage line, a passivation layer, a color filter layer, a pixel electrode, a first light-blocking layer and a second light-blocking layer. The storage line includes the same material as the gate line. The passivation layer covers the data line. The color filter layer is formed on the passivation layer. The pixel electrode is formed on the color filter layer in each pixel. The first light-blocking layer is formed between adjacent pixel electrodes, and includes the same material as the gate line. The second light-blocking layer is formed between the first light-blocking layer, and includes the same material as the data line. Therefore, an aperture ratio may be increased.

Abstract: A liquid crystal display includes a first insulating substrate, a data insulating layer disposed on a data wire of the first insulating substrate, and a color filter layer, an organic film layer, and a light shielding layer disposed on the data insulating layer. The organic film layer is positioned on the color filter layer, and the light shielding layer is positioned on the organic film layer in the screen display area. The color filter layer and the light shielding layer contact each other in the peripheral area.

Abstract: In a thin-film transistor (TFT) substrate, a gate insulating layer is disposed on a gate electrode electrically connected to a gate line. A semiconductor layer is disposed on the gate insulating layer. A source electrode is electrically connected to a data line that intersects the gate line. A drain electrode faces the source electrode and defines a channel area of a semiconductor layer. An organic layer is disposed on the data line and has a first opening exposing the channel area. An inorganic insulating layer is disposed on the organic layer. A pixel electrode is disposed on the inorganic insulating layer and electrically connected to the drain electrode. The inorganic insulating layer covers the first opening, and thickness of the inorganic insulating layer is substantially uniform.

Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.