Patents by Inventor Jaroslaw Adamski
Jaroslaw Adamski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240106430Abstract: Methods and devices for reading and programming a state of a switch device are presented. Reading of the state is provided by measuring a resistance of the switch via injection of a current. If a measured resistance does not correspond to a resistance of an expected state, then the switch is reprogrammed, and the state reread. The switch device may form part of a complex switch circuit that includes a combination of shunt and through switch devices. Currents injected into external loads coupled to the switch circuit increase accuracy in reading of the state. Further accuracy in reading of the state of a through switch device is provided by provision of a bypass path to a shunt switch device. The complex switch circuit may be implemented as a SPDT switch including two branches, each branch including a shunt and a through switch device. Several types of switch devices, such as phase-change material (PCM) devices may be implemented.Type: ApplicationFiled: September 23, 2022Publication date: March 28, 2024Inventors: Jeffrey A. DYKSTRA, Jaroslaw ADAMSKI, Smita KANIKARAJ, Douglas LACY
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Patent number: 11942929Abstract: Methods and devices to control PCM switches are disclosed. The described devices include PCM switch drivers and logic and control circuits, all integrated with the PCM and the associated heater on the same chip. Various architectures for the driver are also presented, including architectures implement feedback mechanism to mitigate variations from process, temperature, and supply voltage.Type: GrantFiled: July 26, 2022Date of Patent: March 26, 2024Assignee: PSEMI CORPORATIONInventors: Jeffrey A. Dykstra, Jaroslaw Adamski, Edward Nicholas Comfoltey
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Patent number: 11936374Abstract: Methods and devices for reading and programming a state of a switch device are presented. Reading of the state is provided by measuring a resistance of the switch via injection of a current. If a measured resistance does not correspond to a resistance of an expected state, then the switch is reprogrammed, and the state reread. The switch device may form part of a complex switch circuit that includes a combination of shunt and through switch devices. Currents injected into external loads coupled to the switch circuit increase accuracy in reading of the state. Further accuracy in reading of the state of a through switch device is provided by provision of a bypass path to a shunt switch device. The complex switch circuit may be implemented as a SPDT switch including two branches, each branch including a shunt and a through switch device. Several types of switch devices, such as phase-change material (PCM) devices may be implemented.Type: GrantFiled: September 23, 2022Date of Patent: March 19, 2024Assignee: PSEMI CORPORATIONInventors: Jeffrey A. Dykstra, Jaroslaw Adamski, Smita Kanikaraj, Douglas Lacy
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Patent number: 11923322Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: December 7, 2021Date of Patent: March 5, 2024Assignee: pSemi CorporationInventors: William R. Smith, Jr., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20240039527Abstract: Methods and devices to control PCM switches are disclosed. The described devices include PCM switch drivers and logic and control circuits, all integrated with the PCM and the associated heater on the same chip. Various architectures for the driver are also presented, including architectures implement feedback mechanism to mitigate variations from process, temperature, and supply voltage.Type: ApplicationFiled: July 26, 2022Publication date: February 1, 2024Inventors: Jeffrey A. DYKSTRA, Jaroslaw ADAMSKI, Edward Nicholas COMFOLTEY
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Patent number: 11789481Abstract: Methods and devices for speeding up the onset of a target current through an output leg of a current mirror are presented. Upon activation of the current mirror, a pre-charge current is sourced to a node of the current mirror that is common to the output leg and an input leg of the current mirror. Sourcing of the pre-charge current is based on sensing, by a first transistor, of a voltage at the common node. Pre-charging of the common node continues up to a cutoff voltage sensed at the common node. Sourcing of the pre-charge current is provided by a second transistor coupled to the common node. Based on the voltage sensed at the common node, the first transistor controls the sourcing of the pre-charge current by the second transistor. Such control is based on a portion of a current from a current source that flows through the first transistor.Type: GrantFiled: August 10, 2021Date of Patent: October 17, 2023Assignee: PSEMI CORPORATIONInventor: Jaroslaw Adamski
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Publication number: 20230288462Abstract: Circuits and methods that enable stacking of phase change material (PCM) switches and that accommodate variations in the resistance of the resistive heater(s) of such switches. Stacking is enabled by providing isolation switches for the resistive heater(s) in a PCM switch to reduce parasitic capacitance caused by the proximity of the resistive heater(s) to the PCM region of a PCM switch. Variations in the resistance of the resistive heater(s) of a PCM switch are mitigated or eliminated by sensing the actual resistance of the resistive heater(s) and then determining a suitable adjusted electrical pulse profile for the resistive heater(s) that generates a precise thermal pulse to the PCM region, thereby reliably achieving a desired switch state while extending the life of the resistive heater(s) and the phase-change material.Type: ApplicationFiled: March 21, 2023Publication date: September 14, 2023Inventors: Jaroslaw Adamski, Jeffrey A. Dykstra, Edward Nicholas Comfoltey
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Publication number: 20230283247Abstract: Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.Type: ApplicationFiled: November 11, 2022Publication date: September 7, 2023Inventor: Jaroslaw Adamski
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Patent number: 11624762Abstract: Circuits and methods that enable stacking of phase change material (PCM) switches and that accommodate variations in the resistance of the resistive heater(s) of such switches. Stacking is enabled by providing isolation switches for the resistive heater(s) in a PCM switch to reduce parasitic capacitance caused by the proximity of the resistive heater(s) to the PCM region of a PCM switch. Variations in the resistance of the resistive heater(s) of a PCM switch are mitigated or eliminated by sensing the actual resistance of the resistive heater(s) and then determining a suitable adjusted electrical pulse profile for the resistive heater(s) that generates a precise thermal pulse to the PCM region, thereby reliably achieving a desired switch state while extending the life of the resistive heater(s) and the phase-change material.Type: GrantFiled: June 18, 2021Date of Patent: April 11, 2023Assignee: pSemi CorporationInventors: Jaroslaw Adamski, Jeffrey A. Dykstra, Edward Nicholas Comfoltey
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Publication number: 20230051805Abstract: Methods and devices for speeding up the onset of a target current through an output leg of a current mirror are presented. Upon activation of the current mirror, a pre-charge current is sourced to a node of the current mirror that is common to the output leg and an input leg of the current mirror. Sourcing of the pre-charge current is based on sensing, by a first transistor, of a voltage at the common node. Pre-charging of the common node continues up to a cutoff voltage sensed at the common node. Sourcing of the pre-charge current is provided by a second transistor coupled to the common node. Based on the voltage sensed at the common node, the first transistor controls the sourcing of the pre-charge current by the second transistor. Such control is based on a portion of a current from a current source that flows through the first transistor.Type: ApplicationFiled: August 10, 2021Publication date: February 16, 2023Inventor: Jaroslaw ADAMSKI
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Publication number: 20220404406Abstract: Circuits and methods that enable stacking of phase change material (PCM) switches and that accommodate variations in the resistance of the resistive heater(s) of such switches. Stacking is enabled by providing isolation switches for the resistive heater(s) in a PCM switch to reduce parasitic capacitance caused by the proximity of the resistive heater(s) to the PCM region of a PCM switch. Variations in the resistance of the resistive heater(s) of a PCM switch are mitigated or eliminated by sensing the actual resistance of the resistive heater(s) and then determining a suitable adjusted electrical pulse profile for the resistive heater(s) that generates a precise thermal pulse to the PCM region, thereby reliably achieving a desired switch state while extending the life of the resistive heater(s) and the phase-change material.Type: ApplicationFiled: June 18, 2021Publication date: December 22, 2022Inventors: Jaroslaw Adamski, Jeffrey A. Dykstra, Edward Nicholas Comfoltey
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Publication number: 20220406997Abstract: Circuits and methods that enable stacking of phase change material (PCM) switches and that accommodate variations in the resistance of the resistive heater(s) of such switches. Stacking is enabled by providing isolation switches for the resistive heater(s) in a PCM switch to reduce parasitic capacitance caused by the proximity of the resistive heater(s) to the PCM region of a PCM switch. Variations in the resistance of the resistive heater(s) of a PCM switch are mitigated or eliminated by sensing the actual resistance of the resistive heater(s) and then determining a suitable adjusted electrical pulse profile for the resistive heater(s) that generates a precise thermal pulse to the PCM region, thereby reliably achieving a desired switch state while extending the life of the resistive heater(s) and the phase-change material.Type: ApplicationFiled: May 13, 2022Publication date: December 22, 2022Inventors: Jaroslaw Adamski, Jeffrey A. Dykstra, Edward Nicholas Comfoltey
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Patent number: 11509270Abstract: Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.Type: GrantFiled: November 24, 2020Date of Patent: November 22, 2022Assignee: pSemi CorporationInventor: Jaroslaw Adamski
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Publication number: 20220173058Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: December 7, 2021Publication date: June 2, 2022Inventors: William R. Smith, JR., Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Patent number: 11211344Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: GrantFiled: October 8, 2019Date of Patent: December 28, 2021Assignee: pSemi CorporationInventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang
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Publication number: 20210159863Abstract: Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.Type: ApplicationFiled: November 24, 2020Publication date: May 27, 2021Inventor: Jaroslaw Adamski
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Patent number: 10855236Abstract: Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.Type: GrantFiled: October 4, 2019Date of Patent: December 1, 2020Assignee: pSemi CorporationInventor: Jaroslaw Adamski
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Patent number: 10690708Abstract: A differential phase and amplitude detector circuit is presented. Two source follower circuits respectively based on NMOS and PMOS transistors are used to charge and discharge a sampling capacitor asymmetrically to provide a measurement of phase and/or amplitude difference between two signals of a substantially same frequency. The measurement can be made in one cycle, with the charging of the sampling capacitor performed during a first half cycle where a voltage difference between the two signals is positive, and the discharging during a second half cycle where a voltage difference between the two signals is negative. Biasing of the two source follower circuits enable an excess current flow between the two transistors of the two source follower circuits beyond a biasing current of the transistors to charge the sampling capacitor during the first half cycle, and disable the excess current flow between the two transistors during the second half cycle.Type: GrantFiled: August 28, 2018Date of Patent: June 23, 2020Assignee: pSemi CorporationInventor: Jaroslaw Adamski
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Publication number: 20200112290Abstract: Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.Type: ApplicationFiled: October 4, 2019Publication date: April 9, 2020Inventor: Jaroslaw Adamski
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Publication number: 20200111756Abstract: An apparatus and method for a frequency based integrated circuit that selectively filters out unwanted bands or regions of interfering frequencies utilizing one or more tunable notch or bandpass filters or tunable low or high pass filters capable of operating across multiple frequencies and multiple bands in noisy RF environments. The tunable filters are fabricated within the same integrated circuit package as the associated frequency based circuitry, thus minimizing R, L, and C parasitic values, and also allowing residual and other parasitic impedance in the associated circuitry and IC package to be absorbed and compensated.Type: ApplicationFiled: October 8, 2019Publication date: April 9, 2020Inventors: William R. Smith, Jaroslaw Adamski, Dan William Nobbe, Edward Nicholas Comfoltey, Jingbo Wang