Patents by Inventor Jason G. Sandri

Jason G. Sandri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • On-Die Logic Analyzer For Semiconductor Die
    Publication number: 20130103987
    Abstract: In one embodiment, the present invention includes a semiconductor die such as a system on a chip (SoC) that includes a logic analyzer with a built-in trace buffer to store information communicated between on-die agents at speed and to provide the information to an off-die agent at a slower speed. Other embodiments are described and claimed.
    Type: Application
    Filed: December 11, 2012
    Publication date: April 25, 2013
    Inventors: Tina C. Zhong, Jason G. Sandri, Kenneth P. Griesser, Lori R. Borger
  • On-Die Logic Analyzer For Semiconductor Die
    Publication number: 20130054931
    Abstract: In one embodiment, the present invention includes a semiconductor die such as a system on a chip (SoC) that includes a logic analyzer with a built-in trace buffer to store information communicated between on-die agents at speed and to provide the information to an off-die agent at a slower speed. Other embodiments are described and claimed.
    Type: Application
    Filed: October 31, 2012
    Publication date: February 28, 2013
    Inventors: Tina C. Zhong, Jason G. Sandri, Kenneth P. Griesser, Lori R. Borger
  • On-die logic analyzer for semiconductor die
    Patent number: 8327198
    Abstract: In one embodiment, the present invention includes a semiconductor die such as a system on a chip (SoC) that includes a logic analyzer with a built-in trace buffer to store information communicated between on-die agents at speed and to provide the information to an off-die agent at a slower speed. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: December 4, 2012
    Assignee: Intel Corporation
    Inventors: Tina C. Zhong, Jason G. Sandri, Kenneth P. Griesser, Lori R. Borger
  • Providing An On-Die Logic Analyzer (ODLA) Having Reduced Communications
    Publication number: 20120131404
    Abstract: In one embodiment, the present invention is directed to a logic analyzer such as may be implemented on a system-on-chip or another semiconductor device. The analyzer can include multiple lanes each having a filter to receive and filter debug data, a compressor to compress the debug data passed by the filter, a buffer, and a controller to store the compressed debug data into the buffer, where the compressed debug data can be stored without timing information. Other embodiments are described and claimed.
    Type: Application
    Filed: November 23, 2010
    Publication date: May 24, 2012
    Inventors: Ruben Ramirez, Michael J. Wiznerowicz, Sean T. Baartmans, Jason G. Sandri
  • On-Die Logic Analyzer For Semiconductor Die
    Publication number: 20110041017
    Abstract: In one embodiment, the present invention includes a semiconductor die such as a system on a chip (SoC) that includes a logic analyzer with a built-in trace buffer to store information communicated between on-die agents at speed and to provide the information to an off-die agent at a slower speed. Other embodiments are described and claimed.
    Type: Application
    Filed: August 14, 2009
    Publication date: February 17, 2011
    Inventors: Tina C. Zhong, Jason G. Sandri, Kenneth P. Griesser, Lori R. Borger
  • On-chip storage of hardware events for debugging
    Patent number: 7700945
    Abstract: An integrated circuit (IC) die includes a plurality of edge counters. Each edge counter is provided to detect at least one change in signal level at a respective location on the IC die. The IC die is in communication with a memory and also includes an event recording circuit on the IC die provided to store states of the counters in the memory.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: April 20, 2010
    Assignee: Intel Corporation
    Inventors: Pat Brouillette, Jason G. Sandri
  • On-chip storage of hardware events for debugging
    Publication number: 20080008289
    Abstract: An integrated circuit (IC) die includes a plurality of edge counters. Each edge counter is provided to detect at least one change in signal level at a respective location on the IC die. The IC die is in communication with a memory and also includes an event recording circuit on the IC die provided to store states of the counters in the memory.
    Type: Application
    Filed: June 21, 2006
    Publication date: January 10, 2008
    Inventors: Pat Brouillette, Jason G. Sandri
  • Method and apparatus for controlling access to shared resources in an environment with multiple logical processors
    Publication number: 20030105796
    Abstract: The disclosure relates to a control mechanism for controlling access by multiple logical processors to shared resources on a common microchip. The processors attempt to reserve exclusive use of needed resources by updating a resource descriptor. The resource descriptor describes which logical processors have exclusive use of which resources. In order to update the resource descriptor, a logical processor must first obtain exclusive access to the resource descriptor by updating a semaphore.
    Type: Application
    Filed: December 5, 2001
    Publication date: June 5, 2003
    Inventors: Jason G. Sandri, Steven J. Tu, Orlando R. Davila