Abstract: Systems, apparatuses, and methods for charging a bootstrap capacitor of a device during low power states are described. In an example, an apparatus can include a controller configured to enable a low power state of the device. The device can include a high side switching element and a low side switching element. The controller can, in response to the low power state of the device being enabled, operate the low side switching element of the device to charge the bootstrap capacitor of the device. The controller can, in response to the low power state of the device being enabled and a level of a control signal being a first level, activate the low side switching element to charge the bootstrap capacitor of the device.

Abstract: DAC control logic for controlling a DAC for supplying a target voltage VTARGET to a switching converter is disclosed. The DAC logic comprises control logic which is configured, in response to DAC ramp-down, to decrement DAC input code supplied to the DAC in a series of steps. The DAC control logic is configured, for at least some of the steps during ramp down, to wait until at least one switching cycle has occurred in the switching converter before decrementing the DAC input code from a current value to a new value.

Abstract: An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.

Abstract: Methods and systems for operating a multiphase voltage regulator are described. The multiphase voltage regulator can include a plurality of power stages. A controller can be connected to the plurality of power stages. The controller can detect a number of activated power stages among the plurality of power stages. The controller can adjust a gain of a current sense feedback loop of the controller to control a load-transient response of the multiphase voltage regulator. The adjustment to the gain can be based on the number of activated power stages.

Abstract: One or more embodiments relate to a regulation loop control circuit for regulation of a parameter such as an input voltage or output voltage for a buck-boost converter. In these and other embodiments, the regulation loop control circuit is configured to select between an input voltage loop for regulation of the input voltage or an output voltage loop for regulation of the output voltage in response to an input voltage error, an output voltage error, and a threshold detector to protect the converter without sacrificing output voltage regulation and transient response.

Abstract: Systems, apparatuses, and methods for charging a bootstrap capacitor of a device during low power states are described. In an example, an apparatus can include a controller configured to enable a low power state of the device. The device can include a high side switching element and a low side switching element. The controller can, in response to the low power state of the device being enabled, operate the low side switching element of the device to charge the bootstrap capacitor of the device. The controller can, in response to the low power state of the device being enabled and a level of a control signal being a first level, activate the low side switching element to charge the bootstrap capacitor of the device.

Abstract: One or more embodiments relate to a current limit mode control circuit for a buck-boost converter which can provide a stable switching of the converter by operating the converter in a current limit mode during an overcurrent condition, performing fewer state transitions while in the current limit mode, and/or by clamping (reducing to a lower value) the output of an error amplifier in the current limit mode for controlling a pulse width modulation (PWM) signal that drives the switching transistors.

Abstract: A voltage error signal is provided to a PWM controller of a voltage regular and used to produce a PWM signal that drives a power stage of the regulator. When operating in an adapter current limit regulation mode, an adapter current sense voltage, indicative of an adapter current, is compared to an adapter current reference voltage to produce an adapter current error signal. A compensator receives the adapter current error signal and outputs a compensated adapter current error signal. The adapter current sense voltage, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal provided to the PWM controller. Alternatively, an input voltage, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal.

Abstract: One or more embodiments relate to a reference voltage control circuit for a buck-boost converter. According to certain aspects, embodiments can increase or decrease the reference voltage for an error amplifier for controlling a pulse width modulation (PWM) signal when there is a change in the mode of operation. In these and other embodiments, the reference voltage control circuit is configured to modify the reference voltage by increasing or decreasing the reference voltage when there is a change in the mode of operation, so as to reduce overshoot or undershoot disturbances in the regulated output voltage during such transitions.

Abstract: According to certain aspects, the present embodiments are related to systems and methods providing an autonomous adapter pass through mode in a battery charger. For example, when an adapter is connected to the battery charger, but the system is idling, embodiments allow for power from the adapter to be directly coupled to the battery charger output, and main switching to be stopped, thereby dramatically reducing battery charger current consumption. These and other embodiments provide various circuitry and techniques to ensure that the battery is protected in this mode. According to further aspects, the present embodiments provide for the charger itself to autonomously enter and exit the adapter pass through mode, thereby eliminating the need for excessive processing overhead in components external to the battery charger.

Abstract: DAC control logic for controlling a DAC for supplying a target voltage VTARGET to a switching converter is disclosed. The DAC logic comprises control logic which is configured, in response to DAC ramp-down, to decrement DAC input code supplied to the DAC in a series of steps. The DAC control logic is configured, for at least some of the steps during ramp down, to wait until at least one switching cycle has occurred in the switching converter before decrementing the DAC input code from a current value to a new value.

Abstract: A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal.

Abstract: An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.

Abstract: The system and method creates a substantially constant output voltage ripple in a buck converter in discontinuous conduction mode by varying the on-time of a pulse width modulator (PWM) signal driving the buck converter when the buck converter is operating in discontinuous conduction mode. A first signal is generated that is a function of the switching frequency of the buck converter. This signal is low-pass filtered and compared with a second signal that is a function of the switching frequency of the buck converter when operating in continuous conduction mode and with constant PWM on-time. The output signal generated by the comparator is a signal that is equal to the ratio of the first signal and the second signal. The on-time of a voltage controlled oscillator is controlled by the output signal, the oscillator signal causing the on-time of the PWM signal to vary in a controlled fashion.

Abstract: A voltage error signal is provided to a PWM controller of a voltage regular and used to produce a PWM signal that drives a power stage of the regulator. When operating in an adapter current limit regulation mode, an adapter current sense voltage, indicative of an adapter current, is compared to an adapter current reference voltage to produce an adapter current error signal. A compensator receives the adapter current error signal and outputs a compensated adapter current error signal. The adapter current sense voltage, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal provided to the PWM controller. Alternatively, an input voltage, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal.

Abstract: An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.

Abstract: A voltage error signal is provided to a PWM controller of a voltage regular and used to produce a PWM signal that drives a power stage of the regulator. When operating in an adapter current limit regulation mode, an adapter current sense voltage, indicative of an adapter current, is compared to an adapter current reference voltage to produce an adapter current error signal. A compensator receives the adapter current error signal and outputs a compensated adapter current error signal. The adapter current sense voltage, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal provided to the PWM controller. Alternatively, an input voltage, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal.

Abstract: According to certain aspects, the present embodiments are related to systems and methods providing an autonomous adapter pass through mode in a battery charger. For example, when an adapter is connected to the battery charger, but the system is idling, embodiments allow for power from the adapter to be directly coupled to the battery charger output, and main switching to be stopped, thereby dramatically reducing battery charger current consumption. These and other embodiments provide various circuitry and techniques to ensure that the battery is protected in this mode. According to further aspects, the present embodiments provide for the charger itself to autonomously enter and exit the adapter pass through mode, thereby eliminating the need for excessive processing overhead in components external to the battery charger.

Abstract: An electronic system, DC-DC voltage converter, method of operating a buck-boost DC-DC converter, and method for power mode transitioning in a DC-DC voltage converter are disclosed. For example, one method includes receiving a compensated error signal associated with an output voltage of the DC-DC voltage converter, determining a power mode of operation of the DC-DC voltage converter, and if the power mode of operation is a first mode, outputting a first control signal to regulate the output voltage of the DC-DC voltage converter. If the power mode of operation is a second mode, outputting a second control signal to regulate the output voltage of the DC-DC voltage converter, and if the power mode of operation is a third mode, outputting a third control signal to regulate the output voltage of the DC-DC voltage converter.

Abstract: A voltage regulator includes a converter and a modulator. The converter includes a switching circuit coupled to an inductor for converting an input voltage to an output voltage. The modulator controls the switching circuit in a buck mode of operation, a boost mode of operation, and an intermediate buck-boost mode of operation. During the buck-boost mode of operation, the modulator controls the switching circuit during each switching cycle to sequentially switch between three different switching states, including a first switching state that applies the input voltage across the inductor, a second switching state that applies a difference between the input and output voltages across the inductor, and a third switching state that applies the output voltage across the inductor. The modulator is controlled based on voltage applied across or current flowing through the inductor to regulate the output voltage to a target level.