Abstract: A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal.

Abstract: An embodiment of a coupled-inductor core includes first and second members and first and second forms extending between the first and second members. The first form has a parameter (e.g., length) of a first value, and is operable to conduct a first magnetic flux having a first density that depends on the first value of the parameter. The second form is spaced apart from the first form, has the parameter (e.g., length) of a second value different from the first value, and is operable to conduct a second magnetic flux having a second density that depends on the second value of the parameter. Because two or more of the forms of such a core may have different values for the same parameter, the core may be suitable for use in a multiphase power supply where the currents through the phases are unbalanced.

Abstract: A regulator system with dynamic droop including a regulator control network which is adapted to control regulation of an output voltage to a reference level, a DC droop network which provides a droop signal to modify the reference level based on output load according to a predetermined DC load line, and a dynamic droop network which adjusts the droop signal to delay recovery to the predetermined DC load line within an AC load line tolerance in response to a load transient. A transient reduction network may be included to reduce transient overshoot for load insertion or release depending upon duty cycle type. The dynamic droop network adjusts the droop signal to optimize utilization of an AC delay parameter while transitioning between an AC offset voltage allowance and the predetermined DC load line.

Abstract: A modulator for controlling a switch circuit of a voltage regulator, including a sense circuit that provides a current sense signal indicative of current through the output inductor, a ramp circuit that develops a ramp voltage on a ramp node using the current sense signal, an error circuit that develops an error signal indicative of output voltage error and that injects the error signal into the ramp node to adjust the ramp voltage, a comparator circuit that compares the ramp voltage with a fixed control voltage to develop a compare signal, and a logic circuit that uses the compare signal to develop a pulse control signal that controls the switch circuit. The output voltage error may be determined by comparing the output voltage with a reference voltage and converting the error voltage to a current applied to the ramp node.

Abstract: A voltage error signal VERR is provided to a PWM controller of a voltage regular and used to produce a PWM signal that drives a power stage of the regulator. When operating in an adaptor current limit regulation mode, an adaptor current sense voltage VACS, indicative of an adapter current IA, is compared to an adapter current reference voltage VAC—REF to produce an adapter current error signal VAC—ERR. A compensator receives the adapter current error signal VAC—ERR and outputs a compensated adapter current error signal. The adaptor current sense voltage VACS, or a high pass filtered version thereof, is subtracted from the compensated adapter current error signal to produce the voltage error signal VERR provided to the PWM controller. Alternatively, an input voltage VIN, or a high pass filtered version thereof, is added to the compensated adapter current error signal to produce the voltage error signal VERR.

Abstract: A controller for controlling operation of a switching regulator including a modulator, a discontinuous conduction mode (DCM) controller, an audible DCM (ADCM) controller, and a sub-sonic discontinuous conduction mode (SBDCM) controller. The modulator generally operates in a continuous conduction mode. The DCM controller modifies operation to DCM during low loads. The ADCM controller detects when the switching frequency is less than a super-sonic frequency threshold and modifies operation to maintain the switching frequency at a super-sonic frequency level. The SBDCM controller detects a sub-sonic operating condition during ADCM operation and responsively inhibits operation of the ADCM mode controller to allow a SBDCM mode within a sub-sonic switching frequency range. The SBDCM operating mode allows for efficient connected standby operation. The SBDCM controller allows operation to return to other modes when the switching frequency increases above the sub-sonic level.

Abstract: The system and method creates a substantially constant output voltage ripple in a buck converter in discontinuous conduction mode by varying the on-time of a pulse width modulator (PWM) signal driving the buck converter when the buck converter is operating in discontinuous conduction mode. A first signal is generated that is a function of the switching frequency of the buck converter. This signal is low-pass filtered and compared with a second signal that is a function of the switching frequency of the buck converter when operating in continuous conduction mode and with constant PWM on-time. The output signal generated by the comparator is a signal that is equal to the ratio of said first signal and said second signal. The on-time of a voltage controlled oscillator is controlled by said output signal, the oscillator signal causing the on-time of said PWM signal to vary in a controlled fashion.

Abstract: A controller for controlling operation of a switching regulator including a modulator, a discontinuous conduction mode (DCM) controller, an audible DCM (ADCM) controller, and a sub-sonic discontinuous conduction mode (SBDCM) controller. The modulator generally operates in a continuous conduction mode. The DCM controller modifies operation to DCM during low loads. The ADCM controller detects when the switching frequency is less than a super-sonic frequency threshold and modifies operation to maintain the switching frequency at a super-sonic frequency level. The SBDCM controller detects a sub-sonic operating condition during ADCM operation and responsively inhibits operation of the ADCM mode controller to allow a SBDCM mode within a sub-sonic switching frequency range. The SBDCM operating mode allows for efficient connected standby operation. The SBDCM controller allows operation to return to other modes when the switching frequency increases above the sub-sonic level.

Abstract: A modulator with balanced slope compensation including a control network, a slope compensation network, an offset network and an adjust network. The control network receives a feedback signal indicative of an output voltage and provides a loop control signal. The slope compensation network develops a slope compensation signal. The offset network determines a DC offset of the slope compensation signal. The adjust network combines the DC offset, the slope compensation signal and the loop control signal to provide a balanced slope compensated control signal. The DC offset may be determined as a peak of the slope compensation signal. The slope compensation signal may be developed based on the output voltage and a pulse control signal, in which the pulse control signal is developed using the balanced slope compensated control signal.

Abstract: An embodiment of a power supply includes an input node operable to receive an input voltage, an output node operable to provide a regulated output voltage, an odd number of magnetically coupled phase paths each coupled between the input and output nodes, and a first magnetically uncoupled phase path coupled between the input and output nodes. Such a power supply may improve its efficiency by activating different combinations of the coupled and uncoupled phase paths depending on the load conditions. For example, the power supply may activate only an uncoupled phase path during light-load conditions, may activate only coupled phase paths during moderate-load conditions, and may activate both coupled and uncoupled phase paths during heavy-load conditions and during a step-up load transient.

Abstract: A controller for controlling operation of a switching regulator including a modulator, a discontinuous conduction mode (DCM) controller, an audible DCM (ADCM) controller, and a sub-sonic discontinuous conduction mode (SBDCM) controller. The modulator generally operates in a continuous conduction mode. The DCM controller modifies operation to DCM during low loads. The ADCM controller detects when the switching frequency is less than a super-sonic frequency threshold and modifies operation to maintain the switching frequency at a super-sonic frequency level. The SBDCM controller detects a sub-sonic operating condition during ADCM operation and responsively inhibits operation of the ADCM mode controller to allow a SBDCM mode within a sub-sonic switching frequency range. The SBDCM operating mode allows for efficient connected standby operation. The SBDCM controller allows operation to return to other modes when the switching frequency increases above the sub-sonic level.

Abstract: A predictive current feedback system for a switched mode regulator including a sample and hold network for sampling voltage across a lower switch of the regulator and for providing a hold signal indicative thereof, and a predictive current feedback network which adds an offset adjustment to the hold signal based on a duration of a pulse width of a pulse control signal developed by the regulator. Sampling may be done while the lower switch is on for providing a hold value indicative of inductor current while the pulse control signal is low. The offset adjustment may be added to the hold signal in response to a transient event when the pulse signal is high. The offset may be incremental values after each of incremental time periods after a nominal time period, or may be a time-varying value. Adjustment may be made while the pulse signal is low as well.

Abstract: A dynamic voltage response network for a switching regulator with droop control providing a droop control signal includes a voltage identification setting network, a pass and hold system, and a reset network. The voltage identification setting network initiates a hold condition and adjusts an output voltage reference in response to a change in a voltage identification input. The pass and hold system passes the droop control signal during a pass condition and holds the droop control signal during the hold condition. The reset network resets the pass and hold system to the pass condition in response to a reset signal. The reset signal may be provided in response to a variety of conditions, such as load transients, proximity between the developed droop control signal and the held droop control signal, timeout after the output voltage reference is adjusted, among other reset conditions.

Abstract: A variable frequency modulator including a compensation network, first and second pulse control networks and a linearity controller. The compensation network is configured to provide a compensation signal indicative of an output load condition. The first pulse control network is configured to initiate pulses on a pulse control signal and to adjust operating frequency based on changes of the compensation signal. The second pulse control network is configured to terminate the pulses on the pulse control signal based on a predetermined timing parameter. The linearity controller is configured to adjust timing of terminating the pulses based on a predetermined steady state operating frequency and an actual operating frequency to maintain modulator gain at a constant level.

Abstract: A method and system control the adding or dropping of phases in a multiphase voltage regulator. The regulator has an efficiency and this efficiency of the regulator is calculated for a given number of phases being activated from an output voltage, input voltage, output current, and duty cycle of the regulator. The efficiency of the regulator is also calculated if a phase is added using the derivative of the duty cycle as a function of the output current. The efficiency of the regulator is further calculated if a phase is dropped using the derivative of the duty cycle as a function of the output current. From these operations of calculating, a phase is either added, dropped, or the phase is maintained at its current value to thereby optimize the efficiency of the regulator.

Abstract: A voltage regulator generates a regulated output voltage responsive to an input voltage and drive control signals. An error amplifier generates an error voltage signal responsive to the regulated output voltage and a reference voltage. A PWM modulator generates a PWM control signal responsive to the error voltage signal, a ramp voltage and an inverse of the reference voltage. Control circuitry within the PWM modulator maintains the error voltage signal applied to the PWM modulator at substantially a same DC voltage level over the reference voltage operating range and maintains the error voltage signal above a minimum value of the ramp voltage. Driver circuitry generates the drive control signals responsive to the PWM control signal.

Abstract: A dynamic voltage response network for a switching regulator with droop control providing a droop control signal includes a voltage identification setting network, a pass and hold system, and a reset network. The voltage identification setting network initiates a hold condition and adjusts an output voltage reference in response to a change in a voltage identification input. The pass and hold system passes the droop control signal during a pass condition and holds the droop control signal during the hold condition. The reset network resets the pass and hold system to the pass condition in response to a reset signal. The reset signal may be provided in response to a variety of conditions, such as load transients, proximity between the developed droop control signal and the held droop control signal, timeout after the output voltage reference is adjusted, among other reset conditions.

Abstract: A predictive current feedback system for a switched mode regulator including a sample and hold network for sampling voltage across a lower switch of the regulator and for providing a hold signal indicative thereof, and a predictive current feedback network which adds an offset adjustment to the hold signal based on a duration of a pulse width of a pulse control signal developed by the regulator. Sampling may be done while the lower switch is on for providing a hold value indicative of inductor current while the pulse control signal is low. The offset adjustment may be added to the hold signal in response to a transient event when the pulse signal is high. The offset may be incremental values after each of incremental time periods after a nominal time period, or may be a time-varying value. Adjustment may be made while the pulse signal is low as well.

Abstract: A regulator system with dynamic droop including a regulator control network which is adapted to control regulation of an output voltage to a reference level, a DC droop network which provides a droop signal to modify the reference level based on output load according to a predetermined DC load line, and a dynamic droop network which adjusts the droop signal to delay recovery to the predetermined DC load line within an AC load line tolerance in response to a load transient. A transient reduction network may be included to reduce transient overshoot for load insertion or release depending upon duty cycle type. The dynamic droop network adjusts the droop signal to optimize utilization of an AC delay parameter while transitioning between an AC offset voltage allowance and the predetermined DC load line.

Abstract: A modulator with balanced slope compensation including a control network, a slope compensation network, an offset network and an adjust network. The control network receives a feedback signal indicative of an output voltage and provides a loop control signal. The slope compensation network develops a slope compensation signal. The offset network determines a DC offset of the slope compensation signal. The adjust network combines the DC offset, the slope compensation signal and the loop control signal to provide a balanced slope compensated control signal. The DC offset may be determined as a peak of the slope compensation signal. The slope compensation signal may be developed based on the output voltage and a pulse control signal, in which the pulse control signal is developed using the balanced slope compensated control signal.