Patents by Inventor Jasper S. Gibbons

Jasper S. Gibbons has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230127970
    Abstract: The present disclosure provides techniques for using a multiple-port buffer to improve a transaction rate of a memory module. In an example, a memory module can include a circuit board having an external interface, first memory devices mounted to the circuit board, and a first multiple-port buffer circuit mounted to the circuit board. The first multiple-port buffer circuit can include a first port coupled to data lines of the external interface, the first port configured to operate at a first transaction rate, a second port coupled to data lines of a first plurality of the first memory devices, and a third port coupled to data lines of a second plurality of the first memory devices. The second and third ports can be configured to operate at a second transaction rate, wherein the second transaction rate is slower than the first transaction rate.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 27, 2023
    Inventors: Jasper S. Gibbons, Matthew A. Prather, Brent Keeth, Frank F. Ross, Daniel Benjamin Stewart, Randall J. Rooney
  • Patent number: 11538508
    Abstract: The present disclosure provides techniques for using a multiple-port buffer to improve a transaction rate of a memory module. In an example, a memory module can include a circuit board having an external interface, first memory devices mounted to the circuit board, and a first multiple-port buffer circuit mounted to the circuit board. The first multiple-port buffer circuit can include a first port coupled to data lines of the external interface, the first port configured to operate at a first transaction rate, a second port coupled to data lines of a first plurality of the first memory devices, and a third port coupled to data lines of a second plurality of the first memory devices. The second and third ports can be configured to operate at a second transaction rate, wherein the second transaction rate is slower than the first transaction rate.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: December 27, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Jasper S. Gibbons, Matthew A. Prather, Brent Keeth, Frank F Ross, Daniel Benjamin Stewart, Randall J. Rooney
  • Publication number: 20210201966
    Abstract: The present disclosure provides techniques for using a multiple-port buffer to improve a transaction rate of a memory module. In an example, a memory module can include a circuit board having an external interface, first memory devices mounted to the circuit board, and a first multiple-port buffer circuit mounted to the circuit board. The first multiple-port buffer circuit can include a first port coupled to data lines of the external interface, the first port configured to operate at a first transaction rate, a second port coupled to data lines of a first plurality of the first memory devices, and a third port coupled to data lines of a second plurality of the first memory devices. The second and third ports can be configured to operate at a second transaction rate, wherein the second transaction rate is slower than the first transaction rate.
    Type: Application
    Filed: December 30, 2020
    Publication date: July 1, 2021
    Inventors: Jasper S. Gibbons, Matthew A. Prather, Brent Keeth, Frank F. Ross, Daniel Benjamin Stewart, Randall J. Rooney
  • Patent number: 9742952
    Abstract: An enclosure that can be utilized with an image capture device for digitizing documents can include a bin having a platform panel, an aperture panel, and side support panels. The aperture panel comprises an aperture passing through it. Documents or objects may be gathered and/or stored within the bin. When a user desires to digitally capture the documents or objects, the user may turn the bin on its side so that the aperture panel is on top and the platform panel is on bottom, place a document on the platform with the document facing the aperture, place an image capture device on the aperture panel with the image capture sensor aligned with the aperture and therefore facing the document, and capture an image of the document.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: August 22, 2017
    Assignee: SCANNER BIN, LLC
    Inventor: Jasper S. Gibbons
  • Patent number: 9502516
    Abstract: Recessed access transistor devices used with semiconductor devices may include gate electrodes having materials with multiple work functions, materials that are electrically isolated from each other and supplied with two or more voltage supplies, or materials that create a diode junction within the gate electrode.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: November 22, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Jasper S. Gibbons, Darren V. Young, Kunal R. Parekh, Casey Smith
  • Publication number: 20160050348
    Abstract: An enclosure that can be utilized with an image capture device for digitizing documents can include a bin having a platform panel, an aperture panel, and side support panels. The aperture panel comprises an aperture passing through it. Documents or objects may be gathered and/or stored within the bin. When a user desires to digitally capture the documents or objects, the user may turn the bin on its side so that the aperture panel is on top and the platform panel is on bottom, place a document on the platform with the document facing the aperture, place an image capture device on the aperture panel with the image capture sensor aligned with the aperture and therefore facing the document, and capture an image of the document.
    Type: Application
    Filed: August 12, 2015
    Publication date: February 18, 2016
    Inventor: Jasper S. GIBBONS
  • Publication number: 20150014811
    Abstract: Antifuses having two or more materials with differing work function values may be fabricated as recessed access devices and spherical recessed access devices for use with integrated circuit devices and semiconductor devices. The use of materials having different work function values in the fabrication of recessed access device antifuses allows the breakdown areas of the antifuse device to be customized or predicted.
    Type: Application
    Filed: September 29, 2014
    Publication date: January 15, 2015
    Inventors: Casey Smith, Jasper S. Gibbons, Kunal R. Parekh
  • Patent number: 8860174
    Abstract: Antifuses having two or more materials with differing work function values may be fabricated as recessed access devices and spherical recessed access devices for use with integrated circuit devices and semiconductor devices. The use of materials having different work function values in the fabrication of recessed access device antifuses allows the breakdown areas of the antifuse device to be customized or predicted.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: October 14, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Casey Smith, Jasper S. Gibbons, Kunal R. Parekh
  • Publication number: 20140217498
    Abstract: Recessed access transistor devices used with semiconductor devices may include gate electrodes having materials with multiple work functions, materials that are electrically isolated from each other and supplied with two or more voltage supplies, or materials that create a diode junction within the gate electrode.
    Type: Application
    Filed: April 8, 2014
    Publication date: August 7, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Jasper S. Gibbons, Darren V. Young, Kunal R. Parekh, Casey Smith
  • Patent number: 8692320
    Abstract: Recessed access transistor devices used with semiconductor devices may include gate electrodes having materials with multiple work functions, materials that are electrically isolated from each other and supplied with two or more voltage supplies, or materials that create a diode junction within the gate electrode.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: April 8, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Jasper S. Gibbons, Darren V. Young, Kunal R. Parekh, Casey Smith
  • Publication number: 20120061751
    Abstract: Recessed access transistor devices used with semiconductor devices may include gate electrodes having materials with multiple work functions, materials that are electrically isolated from each other and supplied with two or more voltage supplies, or materials that create a diode junction within the gate electrode.
    Type: Application
    Filed: October 18, 2011
    Publication date: March 15, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jasper S. Gibbons, Darren V. Young, Kunal R. Parekh, Casey Smith
  • Publication number: 20070262415
    Abstract: Antifuses having two or more materials with differing work function values may be fabricated as recessed access devices and spherical recessed access devices for use with integrated circuit devices and semiconductor devices. The use of materials having different work function values in the fabrication of recessed access device antifuses allows the breakdown areas of the antifuse device to be customized or predicted.
    Type: Application
    Filed: July 28, 2006
    Publication date: November 15, 2007
    Inventors: Casey Smith, Jasper S. Gibbons, Kunal R. Parekh