ANTIFUSES AND METHODS OF FORMING ANTIFUSES AND ANTIFUSE STRUCTURES
Antifuses having two or more materials with differing work function values may be fabricated as recessed access devices and spherical recessed access devices for use with integrated circuit devices and semiconductor devices. The use of materials having different work function values in the fabrication of recessed access device antifuses allows the breakdown areas of the antifuse device to be customized or predicted.
This application is a divisional of U.S. patent application Ser. No. 11/495,805, filed Jul. 28, 2006, pending, which is a continuation-in-part of U.S. patent application Ser. No. 11/432,442, entitled “MEMORY CELL ACCESS DEVICES AND METHODS OF MAKING THE SAME,” filed May 11, 2006, now abandoned, and a continuation-in-part of U.S. patent application Ser. No. 11/432,270, entitled “DUAL WORK FUNCTION RECESSED ACCESS DEVICE AND METHODS OF FORMING,” filed May 11, 2006, now U.S. Pat. No. 8,008,144, issued Aug. 30, 2011, the disclosure of each of which is hereby incorporated herein in its entirety by this reference.
BACKGROUND OF THE INVENTION1. Field of the Invention
The invention relates to antifuse devices and, more particularly, to recessed gate dielectric antifuse devices and methods of making the same.
2. State of the Art
Antifuse devices are commonly used to permanently program integrated circuit (IC) devices and other electrical components. Semiconductor integrated circuit devices such as flash memory, erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), dynamic random access memory (DRAM), static random access memory (SRAM), and other random access memory devices typically employ the use of antifuses to program the memory or to provide access to redundant circuitry in the memory devices. For example, memory devices and other integrated circuit devices frequently include redundant circuitry linked to operational circuitry by one or more antifuse devices. In those instances where the operational circuitry fails or is defective, one or more antifuses may be programmed to bypass the defective circuitry or to utilize available redundant circuitry in place of the defective circuitry. The use of antifuses to program conventional integrated circuit devices and to select circuitry to be used on an integrated circuit device is well known.
Gate-oxide antifuses are typically formed from conventional planar access devices (PAD) such as Metal Oxide Semiconductor Field Effect Transistors (MOSFET). MOSFETs generally include a doped polysilicon gate, a channel conduction region, and source/drain regions formed by diffusion of dopants in silicon substrates. A voltage difference may be generated between the doped polysilicon gate and the channel conduction region or the source/drain regions of the MOSFET. The voltage difference may be used to program the antifuse device. For example, antifuses have a high resistance; when a high voltage exceeding the capacity of the antifuse is applied across the antifuse, the gate-oxide of the antifuse breaks down, creating an electrically conductive path through the antifuse. The breakdown of an antifuse may include a soft breakdown, where the antifuse has a high fuse resistance, or a hard breakdown, where the antifuse has a low fuse resistance.
In an attempt to improve antifuse devices and the use of antifuses with integrated circuit devices, new antifuse structures are being developed. For example, antifuses formed from recessed access devices (RAD), as opposed to the traditional planar access devices (PAD), are being used with high-density memory cells. Recessed access device antifuses are described in U.S. patent application Ser. No. 10/933,161, now U.S. Pat. No. 7,795,094, issued Sep. 14, 2010, entitled “RECESSED GATE DIELECTRIC ANTIFUSE,” and published as US 2006/0046354, the disclosure of which is incorporated herein by reference in its entirety. The use of recessed access devices as antifuses allows the formation of smaller antifuses with integrated circuits and semiconductor devices. This is especially desirable, as the design of integrated circuit devices require smaller feature sizes and increased circuit densities.
Although some strides have been made to improve antifuse technology for use with new integrated circuit devices, further enhancements in antifuse technology are desired. In particular, as higher-density integrated circuit devices are developed, smaller antifuse devices are required. Improved reliability in antifuse devices is also desirable. The ability to control the initial breakdown point of an antifuse device is also desirable.
While the specification concludes with claims particularly pointing out and distinctly claiming that which is regarded as the present invention, this invention can be more readily understood and appreciated by one of ordinary skill in the art from the following description of the invention when read in conjunction with the accompanying drawings in which:
According to embodiments of the invention, antifuses for use with integrated circuits and semiconductor devices may be formed utilizing recessed access devices and spherical recessed access devices. The antifuses may include two or more materials having different work function values. The work function values of the two or more materials used with the antifuses may differ by about 0.2 eV or more. The difference in work function values of the materials used to form the antifuses of embodiments of the invention allows the antifuses to be customized such that the breakdown areas of the antifuses may be controlled.
According to particular embodiments of the invention, a recessed access device having two or more materials with different work function values layered on top of each other may be used as an antifuse device with integrated circuitry and semiconductor devices. The layered materials may be separated by one or more barrier layers for preventing migration of dopants from one material to another during integrated circuit and semiconductor fabrication processes. In some embodiments, the recessed access device having two or more material layers may be a spherical recessed access device. The intersection of each of the two or more layers of materials in the recessed access device provides a likely area for antifuse breakdown. Utilizing the likely breakdown area, the breakdown of the antifuse may be controlled or tailored for a desired function or for use with a desired integrated circuit or semiconductor device.
In still other embodiments of the invention, a recessed access device having two or more materials aligned vertically in a trench defining the recessed access device may have different work function values. A first material may be positioned on the sidewalls of the recessed access device with one or more additional materials filling the remainder of the recessed access device and at least partially surrounded by the first material. The difference in the work function values of the first material and the one or more additional materials may be about 0.2 eV or more. In some embodiments, the recessed access device may be a spherical recessed access device. The intersection of each of the two or more layers of materials in the recessed access device provides a likely area for antifuse breakdown. Utilizing the likely breakdown area, the breakdown of the antifuse may be controlled or tailored for a desired function or for use with a desired integrated circuit or semiconductor device.
According to embodiments of the invention, an antifuse may be formed from a recessed access device (RAD) structure or a spherical recessed access device (SRAD) structure. The RAD structure or the SRAD structure may be formed, in part, from two or more materials having different work functions. The intersections of the different work function materials in the RAD structures or the SRAD structures provide a convenient location for antifuse breakdown. In addition, the partial spherical shape of SRAD structures provides additional breakdown locations for antifuses formed from such structures.
An antifuse device 150 according to particular embodiments of the invention is illustrated in
According to embodiments of the invention, the second material 174 of the RAD antifuse 170 may be foamed of a material having a higher work function than the first material 172. For example, in an n-channel device, the second material 174 may include a p-type doped polysilicon material and the first material 172 may include an n-type doped polysilicon material. Thus, the second material 174 would exhibit a higher work function than that of the first material 172 in the n-channel device. In a p-channel device, the second material 174 may include an n-type doped polysilicon material and the first material 172 may include a p-type doped polysilicon material. Other materials having differing work functions may also be used to form a RAD antifuse 170 according to embodiments of the invention.
Materials used to form the first material 172 and second material 174 may include materials such as polysilicon, doped polysilicon, metals, and metal alloys.
A barrier 173 may be positioned between the first material 172 and the second material 174 in the RAD antifuse 170 to prevent cross-diffusion of dopants in the first material 172 and second material 174. The barrier 173 may also provide an ohmic contact between the two materials if desired. The barrier 173 may include metals such as tungsten, aluminum, copper, or titanium. In some embodiments, the barrier 173 may be formed from one or more metal layers, including similar or dissimilar metals. In other embodiments, the barrier 173 may provide an electrical connection or conduction between the first material 172 and the second material 174. The barrier 173 may also act as an insulator or may be formed from conductive material, insulative material, or conductive and insulative material.
In those particular embodiments of the invention where a strap 176 is formed as part of the RAD antifuse 170, the strap 176 may be formed of a conductive material, such as a metal, a conductive silicon material, a doped silicon material, or another conductor. In other embodiments, the strap 176 need not be conductive.
An insulator cap 180 incorporated with a RAD antifuse 170 may include any insulating material that may be used as an insulating layer for conventional planar or recessed access devices. For instance, the insulator cap 180 may be formed of a nitride or an oxide such as silicon nitride or silicon dioxide.
Similarly, sidewall spacers 178 may be formed from materials used to form spacers 178 with conventional planar or recessed access devices. For example, the sidewall spacers 178 may include materials such as silicon dioxide or other oxides, silicon nitride, or other nitrides, or silicon oxynitride. In some instances, the sidewall spacers 178 and the insulator cap 180 may be formed of the same material.
The RAD antifuse 170 of embodiments of the invention may be produced using fabrication processes used to form conventional RAD structures in semiconductor devices and particularly memory devices. For example, the RAD antifuse 170 illustrated in
Although particular methods for forming the RAD antifuse 170 of certain embodiments of the invention are illustrated in
The utilization of multi-work function materials to fabricate the RAD antifuses 170 according to embodiments of the invention may provide improved breakdown areas 190A, 190B in the RAD antifuse 170 as compared to traditional recessed access device antifuse structures, such as those described in the afore-mentioned U.S. patent application Ser. No. 10/933,161, entitled “RECESSED GATE DIELECTRIC ANTIFUSE,” and published as US 2006/0046354, now U.S. Pat. No. 7,795,094, issued Sep. 14, 2010. As illustrated in
The curvature of the bottom of RAD antifuse 170 in the trench of the semiconductor substrate 160 may also enhance a generated electric field in the RAD antifuse 170, contributing to improved breakdown of the RAD antifuse 170.
Use of a RAD antifuse 170 in an integrated circuit device or semiconductor device may allow the customization of the antifuse positioning to produce a breakdown of the antifuse in a desired region of the integrated circuit device or semiconductor device.
According to other embodiments of the invention, an antifuse device 150′ having one or more RAD antifuses 170′ with two or more materials having different work functions may include a RAD antifuse 170′ having a first material 172′ positioned along at least a portion of the sidewalls of the RAD antifuse 170′ and a second material 174′ at least partially surrounded by the first material 172′ as illustrated in
For the RAD antifuse 170′ illustrated in
According to embodiments of the invention, the second material 174′ of the RAD antifuse 170′ may be formed of a material having a higher work function than the first material 172′. For example, if the RAD antifuse 170′ illustrated in
As with other embodiments of the invention, materials used to form the first material 172′ and second material 174′ may include materials such as polysilicon, doped polysilicon, metals, and metal alloys.
The RAD antifuse 170′ of embodiments of the invention may be produced using fabrication processes used to form conventional semiconductor devices and particularly memory devices. For example, the RAD antifuse 170′ illustrated in
Although particular methods for forming the RAD antifuse 170′ of certain embodiments of the invention are illustrated in
Spherical recessed access devices (SRAD) may also be used as antifuses according to other embodiments of the invention. For example, an SRAD antifuse 270 according to particular embodiments of the invention is illustrated in
The SRAD antifuse 270 illustrated in
The SRAD antifuses 270 according to particular embodiments of the invention may also include a gate over the first material 272. The gate may include strap layers 276, insulator caps 280, and sidewall spacers 278 as desired. For example, the SRAD antifuse 270 illustrated in
The first material 272 and second material 274 used to form SRAD antifuses 270 according to embodiments of the invention may be formed of materials having different work functions. For instance, the first material 272 may have a lower work function than the second material 274; in an n-channel device, the second material 274 may include a p-type doped polysilicon material while the first material 272 may include an n-type doped polysilicon material, providing a first material 272 with a lower work function than the second material 274. Other materials may also be used to form the materials of the SRAD antifuse 270 according to various embodiments of the invention.
The SRAD antifuse 270 illustrated in
Although a fabrication method for SRAD antifuse 270 devices is illustrated in
The utilization of multi-work function materials to fabricate the SRAD antifuses 270 according to embodiments of the invention may provide improved breakdown areas 290 in the SRAD antifuse 270. As illustrated in
As illustrated in
According to other embodiments of the invention, an antifuse device 250′ having one or more SRAD antifuses 270′ with two or more materials having different work functions may include an SRAD antifuse 270′ having a first material 272′ positioned along at least a portion of the sidewalls of a partially spherically shaped trench in a semiconductor substrate 260′ and a second material 274′ at least partially surrounded by the first material 272′ as illustrated in
The SRAD antifuse 270′ illustrated in
According to embodiments of the invention, the second material 274′ of the SRAD antifuse 270′ may be formed of a material having a higher work function than the first material 272′. For example, in an n-channel device, the second material 274′ used to form the SRAD antifuse 270′ illustrated in
The SRAD antifuse 270′ of embodiments of the invention may be produced using fabrication processes used to form conventional semiconductor devices and particularly memory devices. For example, the SRAD antifuse 270′ illustrated in
Although methods for forming an SRAD antifuse 270′ according to particular embodiments of the invention are illustrated in
While the RAD antifuses and SRAD antifuses illustrated in
According to particular embodiments of the invention, the various configurations of RAD antifuses and SRAD antifuses utilize materials having different work function values. In some embodiments, the difference in work function between the materials used to form the antifuses may be on the order of between about 0.2 eV and about 0.5 eV or more. In some embodiments, lower work function materials having work function values of about 4.4 eV or less may be utilized to form a low work function material while higher work function materials having work function values of about 4.6 eV or more may be used to form a high work function material. For example, low work function materials which may be used with embodiments of the invention may include, but are not limited to, materials such as polysilicon, doped polysilicon, metal, and metal alloys having work function values of about 4.4 eV or less. High work function materials which may be used with embodiments of the invention may include, but are not limited to, materials such as polysilicon, doped polysilicon, metals, and metal alloys having work function values of about 4.6 eV or more.
Other materials that may be used as low or high work function materials with embodiments of the invention include, but are not limited to, titanium nitride (TiN), nickel-silicon (NiSi), and ruthenium-tantalum (RuxTay). In the case of ruthenium-tantalum, x and y are selected to achieve a desired work function value for the material. For example, a RuxTay high work function material may be produced by selecting x and y so that the work function value of the material is about 5.0 eV. In other embodiments, x and y for the RuxTay material may be selected to produce a low work function material having a work function value of about 4.2 eV.
The multi-work function RAD antifuses and SRAD antifuses according to embodiments of the invention may be used with various integrated circuit devices and semiconductor devices. In some embodiments, the RAD antifuses and SRAD antifuses may be tailored such that the location of a breakdown in the antifuse may be controlled. For example,
Utilizing RAD antifuses and SRAD antifuses according to embodiments of the invention as a stub-antifuse 570 may help control the breakdown path of the stub-antifuse 570. In particular, a RAD antifuse or SRAD antifuse according to embodiments of the invention may be selected and positioned with respect to one or more contacts such that conductive paths between the one or more contacts and the antifuse may be created based upon the likely breakdown areas of the RAD antifuse or SRAD antifuse being used.
In still other embodiments of the invention, the RAD devices and SRAD devices described in U.S. patent application Ser. No. 11/432,442, entitled “MEMORY CELL ACCESS DEVICES AND METHODS OF MAKING THE SAME,” and filed May 11, 2006, now abandoned, and in U.S. patent application Ser. No. 11/432,270, entitled “DUAL WORK FUNCTION RECESSED ACCESS DEVICE AND METHODS OF FORMING,” filed May 11, 2006, now U.S. Pat. No. 8,008,144, issued Aug. 30, 2011, the disclosures of which are incorporated herein by reference in their entirety, may also be adapted for use as antifuses with integrated circuits and semiconductor devices.
Having thus described certain currently preferred embodiments of the present invention, it is understood that the invention defined by the appended claims is not to be limited by particular details set forth in the above description, as many apparent variations thereof are contemplated without departing from the spirit or scope thereof as hereinafter claimed.
Claims
1. A method for fabricating at least one antifuse structure, comprising:
- providing a semiconductor substrate having at least one trench formed therein, the at least one trench lined with an oxide material;
- forming a first material in the trench, the first material isolated from the semiconductor substrate by the oxide material;
- forming a second material in the trench and in contact with the oxide material and the first material in the trench, the second material confined within lateral boundaries of the trench and isolated from the semiconductor substrate by at least one of the oxide material and the first material, a work function value of the second material higher than a work function value of the first material; and
- forming a gate over the first material and the second material in the trench.
2. The method of claim 1, wherein providing a semiconductor substrate having at least one trench formed therein comprises providing a semiconductor substrate having at least one trench having an at least partially spherically shaped bottom portion extending beyond the lateral boundaries of an upper portion of the trench.
3. The method of claim 1, further comprising forming a barrier between the first material and the second material in the trench.
4. The method of claim 1, wherein forming the second material within the trench comprises forming the second material within a bottom portion of the trench.
5. The method of claim 1, wherein forming the first material in the trench comprises forming the first material over the second material.
6. The method of claim 1, further comprising forming a barrier over the second material, the first material overlying the barrier.
7. The method of claim 1, wherein forming the first material within the trench comprises forming the first material on at least a portion of surfaces of the trench.
8. The method of claim 1, wherein forming the second material within the trench comprises forming the second material within an opening in the first material.
9. The method of claim 1, further comprising removing at least a portion of the first material within trench to form opening extending through the first material to a bottom of the trench, and wherein forming the second material comprises forming the second material within the opening and to the bottom of the trench.
10. An antifuse, comprising:
- a recessed access device, comprising: a trench in a semiconductor substrate; an oxide material positioned over at least a portion of the trench surface; a material within the trench and contacting at least a portion of the oxide material; a barrier within the trench and overlying the material, the barrier contacting at least an additional portion of the oxide material; another material within the trench and overlying the barrier, the another material contacting at least another portion of the oxide material; and a gate overlying the another material; and
- a breakdown area in the recessed access device, the breakdown area located at an intersection of the material, the barrier, the another material, and the oxide material.
11. (canceled)
12. The antifuse of claim 10, wherein the trench in the recessed access device exhibits a substantially spherical bottom portion.
13. The antifuse of claim 12, wherein the substantially spherical bottom portion extends beyond lateral boundaries of an upper portion of the trench.
14. The antifuse of claim 13, wherein the at least an additional portion of the oxide material is located adjacent a portion of the trench where the substantially spherical bottom portion of the trench meets with the upper portion of the trench.
15. The antifuse of claim 10, wherein a work function value of the another material is lower than a work function value of the material.
16. The antifuse of claim 10, wherein the material comprises a p-type doped polysilicon material, and the another material comprises an n-type doped polysilicon material.
17. The antifuse of claim 10, wherein the barrier material is directly on the material and the another material is directly on the barrier material.
18. The antifuse of claim 10, wherein the oxide material is confined within boundaries of the trench.
19. The antifuse of claim 10, further comprising an additional material within the trench and overlying the another material, the additional material contacting at least a further portion of the oxide material.
20. The antifuse of claim 19, further comprising another barrier within the trench and between the another material and the additional material.
21. A method of forming an antifuse, comprising:
- forming a trench in a semiconductor substrate;
- forming an oxide material over at least one surface of the trench;
- forming a material over and in contact with the oxide material within a bottom portion of the trench;
- forming barrier over the material within the trench, the barrier contacting a portion of the oxide material;
- forming another material over the barrier within an upper portion of the trench, the another material contracting another portion of the oxide material; and
- forming a gate over the another material.
Type: Application
Filed: Sep 29, 2014
Publication Date: Jan 15, 2015
Inventors: Casey Smith (Salt Lake City, UT), Jasper S. Gibbons (Meridian, ID), Kunal R. Parekh (Boise, ID)
Application Number: 14/499,720
International Classification: H01L 23/525 (20060101); H01L 21/768 (20060101);