Patents by Inventor Jau-Yi Wu

Jau-Yi Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974510
    Abstract: The present disclosure provides a memory structure, including a first interlayer dielectric layer (ILD), a second ILD over the first ILD, wherein at least a portion of an interconnect structure is in the second ILD, a first switch between the first ILD and the second ILD, a second switch over the first switch, and a first phase change material stacking with the first switch and the second switch.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Jau-Yi Wu
  • Patent number: 11950518
    Abstract: A phase-change memory device and method of manufacturing the same, the memory device including: a substrate; a bottom electrode disposed over the substrate; a top electrode disposed over the bottom electrode; and a phase-change layer disposed between the top and bottom electrodes. The phase change layer includes a chalcogenide Ge—Sb—Te (GST) material that includes at least 30 at % Ge and that is doped with a dopant including N, Si, Sc, Ga, C, or any combination thereof.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventor: Jau-Yi Wu
  • Publication number: 20240087645
    Abstract: A process is provided to trim PCRAM cells to have consistent programming curves. Initial programming curves of PCRAM cells are measured. A target programming curve is set up for the PCRAM cells. Each PCRAM cell is then modulated individually to meet the target programming curve.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventor: Jau-Yi WU
  • Patent number: 11910621
    Abstract: A method for manufacturing a memory device includes forming a dielectric layer over a substrate. A bottom electrode via opening is formed in the dielectric layer. A bottom electrode is formed in the bottom electrode via opening. The bottom electrode is etched back. A selector is formed in the bottom electrode via opening and over the bottom electrode. A memory layer is formed over the selector. A top electrode is formed over the memory layer.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: February 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Jau-Yi Wu
  • Patent number: 11862243
    Abstract: A method includes: generating a first difference between a first resistance value of a first memory cell and a first predetermined resistance value; generating a first signal based on the first difference; applying the first signal to the first memory cell to adjust the first resistance value; and after the first signal is applied to the first memory cell, comparing the first resistance value and the first predetermined resistance value, to further adjust the first resistance value until the first resistance value reaches the first predetermined resistance value. A memory device is also disclosed herein.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: January 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jau-Yi Wu, Win-San Khwa, Jin Cai, Yu-Sheng Chen
  • Patent number: 11862244
    Abstract: A process is provided to trim PCRAM cells to have consistent programming curves. Initial programming curves of PCRAM cells are measured. A target programming curve is set up for the PCRAM cells. Each PCRAM cell is then modulated individually to meet the target programming curve.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: January 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Jau-Yi Wu
  • Patent number: 11856795
    Abstract: Present disclosure provides a semiconductor structure and a method for fabricating a semiconductor device. The semiconductor includes a transistor, a first metallization layer over the transistor, a phase change material over the first metallization layer, a second metallization layer over the phase change material, a heater between the first metallization layer and the second metallization layer and in contact with the phase change material, the heater including a heat insulation shell having a first heat conductivity, wherein the heat insulation shell includes a superlattice structure, and a heat conducting core contacting the heat insulation shell and having a second heat conductivity different from the first heat conductivity.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Jau-Yi Wu
  • Patent number: 11847313
    Abstract: A touch method applied to an electronic device is provided. The electronic device includes a touchpad and a screen, the touchpad has a plurality of operating functions. The touch method includes: receiving an input gesture through the touchpad; determining whether the input gesture matches with a preset gesture command or not; maintaining an original setting of the touchpad, in response to the input gesture does not match with the preset gesture command; dividing the touchpad into a non-dominant hand operating area and a dominant hand operating area in response to the input gesture matches with the preset gesture command, and after receiving a selecting command in the non-dominant hand operating area, selecting one of the operating functions according to the selecting command; and executing selected the operating function in the dominant hand operation area. An electronic device for executing the touch method is also provided.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: December 19, 2023
    Assignee: ASUSTEK COMPUTER INC
    Inventors: Jau-Yi Wu, Sheng-Ta Lin
  • Patent number: 11823741
    Abstract: In some embodiments, the present disclosure relates a phase change random access memory device that includes a phase change material (PCM) layer disposed between bottom and top electrodes. A controller circuit is coupled to the bottom and top electrodes and is configured to perform a first reset operation by applying a signal at a first amplitude across the PCM layer for a first time period and decreasing the signal from the first amplitude to a second amplitude for a second time period; and to perform a second reset operation by applying the signal at a third amplitude across the PCM layer for a third time period and decreasing the signal from the third amplitude to a fourth amplitude for a fourth time period greater than the second time period. After the fourth time period, the PCM layer has a percent crystallinity greater than the PCM layer after the second time period.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: November 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jau-Yi Wu
  • Publication number: 20230320239
    Abstract: A device and a method of forming the same are provided. The device includes a substrate, a first dielectric layer over the substrate, a bottom electrode extending through the first dielectric layer, a first buffer layer over the bottom electrode, a phase-change layer over the first buffer layer, a top electrode over the phase-change layer, and a second dielectric layer over the first dielectric layer. The second dielectric layer surrounds the phase-change layer and the top electrode. A width of the top electrode is greater than a width of the bottom electrode.
    Type: Application
    Filed: May 23, 2023
    Publication date: October 5, 2023
    Inventor: Jau-Yi Wu
  • Publication number: 20230309424
    Abstract: A device and a method of forming same are provided. The device includes a substrate, a first dielectric layer over the substrate, a bottom electrode extending through the first dielectric layer, a phase-change layer over the bottom electrode, and a top electrode over the phase-change layer. The phase-change layer includes a first portion extending into the bottom electrode and a second portion over the first portion and the first dielectric layer. A width of the first portion decreases as the first portion extends toward the substrate. The second portion has a first width. The top electrode has the first width.
    Type: Application
    Filed: May 31, 2023
    Publication date: September 28, 2023
    Inventor: Jau-Yi Wu
  • Patent number: 11700779
    Abstract: A device and a method of forming same are provided. The device includes a substrate, a first dielectric layer over the substrate, a bottom electrode extending through the first dielectric layer, a phase-change layer over the bottom electrode, and a top electrode over the phase-change layer. The phase-change layer includes a first portion extending into the bottom electrode and a second portion over the first portion and the first dielectric layer. A width of the first portion decreases as the first portion extends toward the substrate. The second portion has a first width. The top electrode has the first width.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: July 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Jau-Yi Wu
  • Patent number: 11696519
    Abstract: A device and a method of forming the same are provided. The device includes a substrate, a first dielectric layer over the substrate, a bottom electrode extending through the first dielectric layer, a first buffer layer over the bottom electrode, a phase-change layer over the first buffer layer, a top electrode over the phase-change layer, and a second dielectric layer over the first dielectric layer. The second dielectric layer surrounds the phase-change layer and the top electrode. A width of the top electrode is greater than a width of the bottom electrode.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: July 4, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Jau-Yi Wu
  • Patent number: 11630872
    Abstract: An internet data collection method includes steps of receiving a collecting instruction, the collecting instruction corresponds to target data that marked on a web page; retrieving a web address corresponding to the web page and the location information of the target data on the web page; and storing the web address and the location information as a tag to an operating end.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: April 18, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Jau-Yi Wu, Sheng-Ta Lin
  • Patent number: 11563056
    Abstract: A semiconductor memory device disposed over a substrate includes a common electrode, a selector material layer surrounding the common electrode, and a plurality of phase change material layers in contact with the selector material layer.
    Type: Grant
    Filed: March 15, 2021
    Date of Patent: January 24, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Jau-Yi Wu
  • Publication number: 20220383952
    Abstract: A process is provided to trim PCRAM cells to have consistent programming curves. Initial programming curves of PCRAM cells are measured. A target programming curve is set up for the PCRAM cells. Each PCRAM cell is then modulated individually to meet the target programming curve.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Inventor: Jau-Yi WU
  • Publication number: 20220366977
    Abstract: A method includes: generating a first difference between a first resistance value of a first memory cell and a first predetermined resistance value; generating a first signal based on the first difference; applying the first signal to the first memory cell to adjust the first resistance value; and after the first signal is applied to the first memory cell, comparing the first resistance value and the first predetermined resistance value, to further adjust the first resistance value until the first resistance value reaches the first predetermined resistance value. A memory device is also disclosed herein.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jau-Yi WU, Win-San KHWA, Jin CAI, Yu-Sheng CHEN
  • Publication number: 20220359616
    Abstract: A memory device includes a bottom electrode, a selector, a memory layer, and a top electrode. The selector is over the bottom electrode. A sidewall of the bottom electrode and a sidewall of the selector are coterminous. The memory layer is formed over the selector and has a width greater than a width of the selector. A top electrode is formed over the memory layer.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 10, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Jau-Yi WU
  • Publication number: 20220352462
    Abstract: A memory device includes the following items. A substrate. A bottom electrode disposed over the substrate. An insulating layer disposed over the bottom electrode, the insulating layer having a through hole defined in the insulating layer. A heater disposed in the through hole. A phase change material layer disposed over the heater. A selector layer disposed over the phase change material layer. An intermediate layer disposed over the through hole. Also, a metal layer disposed over the selector layer. The metal layer is wider than the phase change material layer.
    Type: Application
    Filed: July 13, 2022
    Publication date: November 3, 2022
    Inventor: Jau-Yi WU
  • Patent number: 11475950
    Abstract: A process is provided to trim PCRAM cells to have consistent programming curves. Initial programming curves of PCRAM cells are measured. A target programming curve is set up for the PCRAM cells. Each PCRAM cell is then modulated individually to meet the target programming curve.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: October 18, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Jau-Yi Wu