Patents by Inventor Jay Yoder

Jay Yoder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240314945
    Abstract: An apparatus includes a upper housing and a connector and printed circuit board assembly. The upper housing comprises three sides extending perpendicularly from a fourth side, where the four sides of the housing define a rectilinear volume and a connector opening, and the connector opening comprises one or more first ramp features configured to hold a sealant. The connector and printed circuit board subassembly comprises a connector assembly holding a plurality of terminal pins and attached to a printed circuit board substrate. The connector assembly extends perpendicularly from the printed circuit board substrate. Each of the plurality of terminal pins comprises a right angle bend. A first end of each of the plurality of terminal pins is inserted into the printed circuit board substrate. A second end of each of the plurality of terminal pins extend through the connector assembly.
    Type: Application
    Filed: March 17, 2023
    Publication date: September 19, 2024
    Inventors: Jacob Jay Yoder, Luis Fernando Sanchez
  • Publication number: 20240098911
    Abstract: An insulation displacement terminal comprises a first portion, a second portion, and a press-fit pin. The first portion may comprise a first beam and a second beam. A slot is generally formed by a first central edge of the first beam and a second central edge of the second beam. The second portion may comprise a third beam, a fourth beam, and a fifth beam. The fourth beam is configured as a cantilever beam with an attached lower end and a distal end that is able to move between the third beam and the fifth beam. The press-fit pin is generally attached to an edge of the distal end of the fourth beam.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Inventor: Jacob Jay Yoder
  • Patent number: 11239602
    Abstract: A method of assembling an electronic control unit comprises assembling a printed circuit board (PCB) substrate with a terminal carrier holding a plurality of terminal pins comprising a right angle bend into a housing using a rotational motion. The terminal carrier generally extends perpendicularly from the PCB substrate. A first end of each of the plurality of terminal pins is inserted into the PCB substrate and a second end of each of the plurality of terminal pins extends through the terminal carrier. The second ends of the plurality of terminal pins generally extend into one or more connector openings in one of four sides of the housing and the terminal carrier interlocks with the housing to hold the PCB substrate with the terminal carrier and the plurality of terminal pins in place.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: February 1, 2022
    Assignee: VEONEER US INC.
    Inventor: Jacob Jay Yoder
  • Publication number: 20210194176
    Abstract: A method of assembling an electronic control unit comprises assembling a printed circuit board (PCB) substrate with a terminal carrier holding a plurality of terminal pins comprising a right angle bend into a housing using a rotational motion. The terminal carrier generally extends perpendicularly from the PCB substrate. A first end of each of the plurality of terminal pins is inserted into the PCB substrate and a second end of each of the plurality of terminal pins extends through the terminal carrier. The second ends of the plurality of terminal pins generally extend into one or more connector openings in one of four sides of the housing and the terminal carrier interlocks with the housing to hold the PCB substrate with the terminal carrier and the plurality of terminal pins in place.
    Type: Application
    Filed: December 18, 2019
    Publication date: June 24, 2021
    Inventor: Jacob Jay Yoder
  • Patent number: 10834833
    Abstract: A method of assembling an electronic control unit comprises assembling a terminal carrier holding a plurality of terminal pins into a housing using translational motions, inserting at least one comb tool through one or more connector openings until a plurality of beams of the comb tool are placed between the terminal carrier, a comb support feature, and a shoulder on an end of each of a plurality of terminal pins, and assembling a printed circuit board substrate to the plurality of terminal pins by inserting the end of each of the plurality of terminal pins into the printed circuit board substrate using a press fit.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: November 10, 2020
    Assignee: VEONEER US INC.
    Inventor: Jacob Jay Yoder
  • Patent number: 10785881
    Abstract: An apparatus includes a housing, a circuit board, a sealant and a baseplate. The housing may have a shelf and a flange along an open side. The circuit board may be (i) disposed on the shelf of the housing and inside the flange of the housing and (ii) secured to the housing. The sealant may be dispensed (i) through the open side of the housing and (ii) along a gap between the flange and the circuit board. The baseplate may be compressed to the housing thereby causing the sealant to flow between (i) the baseplate and the circuit board and (ii) the baseplate and the flange.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: September 22, 2020
    Assignee: VEONEER US INC.
    Inventors: Demetri Stilianos, Jacob Jay Yoder, Luis Fernando Sanchez, Floyd J. Malecke
  • Publication number: 20200236797
    Abstract: An apparatus includes a housing, a circuit board, a sealant and a baseplate. The housing may have a shelf and a flange along an open side. The circuit board may be (i) disposed on the shelf of the housing and inside the flange of the housing and (ii) secured to the housing. The sealant may be dispensed (i) through the open side of the housing and (ii) along a gap between the flange and the circuit board. The baseplate may be compressed to the housing thereby causing the sealant to flow between (i) the baseplate and the circuit board and (ii) the baseplate and the flange.
    Type: Application
    Filed: January 22, 2019
    Publication date: July 23, 2020
    Inventors: Demetri Stilianos, Jacob Jay Yoder, Luis Fernando Sanchez, Floyd J. Malecke
  • Publication number: 20080006920
    Abstract: In one exemplary embodiment, a multi-chip semiconductor connector is utilized for forming a semiconductor package having a plurality of semiconductor die. The multi-chip semiconductor connector is utilized to mechanically attach the plurality of semiconductor die together and to provide electrical connection to the plurality of semiconductor die.
    Type: Application
    Filed: September 24, 2007
    Publication date: January 10, 2008
    Inventors: Francis Carney, Phillip Celaya, Joseph Fauty, James Letterman, Stephen St. Germain, Jay Yoder
  • Publication number: 20070126107
    Abstract: In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is attached to a first semiconductor die and a second conductive strip that is attached to a second semiconductor die.
    Type: Application
    Filed: February 12, 2007
    Publication date: June 7, 2007
    Inventors: Francis Carney, Phillip Celaya, Joseph Fauty, James Letterman, Stephen Germain, Jay Yoder
  • Publication number: 20070126106
    Abstract: In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is suitable for attaching to a first semiconductor die and a second conductive strip that is attached suitable for attaching to a second semiconductor die.
    Type: Application
    Filed: February 7, 2007
    Publication date: June 7, 2007
    Inventors: Francis Carney, Phillip Celaya, Joseph Fauty, James Letterman, Stephen St. Germain, Jay Yoder
  • Publication number: 20070117259
    Abstract: A circuit component having one or more encapsulated circuit elements that are not disposed on a rigid support substrate and a method for manufacturing the circuit component. A semiconductor wafer is disposed on a dicing film and singulated into individual semiconductor chips. The dicing film is stretched and a protective film is placed in contact with the active surfaces of the semiconductor chips. An encapsulating material is formed over the semiconductor chips. The encapsulating material covers the semiconductor chips and the portions of the protective film between the semiconductor chips to form a unitary structure. A support film is coupled to the unitary structure and the protective film is removed. The unitary structure is singulated into individual semiconductor components. Alternatively, multichip circuit components can be manufactured that may include active circuit elements, passive circuit elements, or combinations thereof.
    Type: Application
    Filed: November 18, 2005
    Publication date: May 24, 2007
    Inventors: Harold Anderson, Jay Yoder, Cang Ngo, Joseph Fauty, James Lettlerman
  • Publication number: 20070111393
    Abstract: In one embodiment, a method for forming a leaded molded array package includes placing a lead frame assembly into a molding apparatus having lead cavities. The method further includes forming seals between conductive leads within the lead frame assembly and the lead cavities, and encapsulating the lead frame assembly to form a molded array assembly. The molded array assembly is then separated into individual leaded molded packages.
    Type: Application
    Filed: October 28, 2005
    Publication date: May 17, 2007
    Inventors: William Burghout, Francis Carney, Joseph Fauty, James Letterman, Jay Yoder
  • Publication number: 20060134836
    Abstract: A semiconductor device (10) is made by mounting the bottom surfaces (31, 44, 54) of a semiconductor die (14) and a lead (15, 17) on a tape (12) and over a hole (19) in the tape. A vacuum is drawn through the hole to secure the die in place when the lead's top surface (43) is wirebonded to a top surface (32) of the semiconductor die. A molding material (49) is formed to encapsulate the top surface of the semiconductor die and to expose its bottom surface.
    Type: Application
    Filed: April 29, 2003
    Publication date: June 22, 2006
    Inventors: James Knapp, Jay Yoder, Harold Anderson
  • Publication number: 20050285235
    Abstract: In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is suitable for attaching to a first semiconductor die and a second conductive strip that is attached suitable for attaching to a second semiconductor die.
    Type: Application
    Filed: June 28, 2004
    Publication date: December 29, 2005
    Inventors: Francis Carney, Phillip Celaya, Joseph Fauty, James Letterman, Stephen St. Germain, Jay Yoder
  • Publication number: 20050287703
    Abstract: In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is attached to a first semiconductor die and a second conductive strip that is attached to a second semiconductor die.
    Type: Application
    Filed: June 28, 2004
    Publication date: December 29, 2005
    Inventors: Francis Carney, Phillip Celaya, Joseph Fauty, James Letterman, Stephen Germain, Jay Yoder
  • Publication number: 20050285249
    Abstract: In one exemplary embodiment, a multi-chip semiconductor connector is utilized for forming a semiconductor package having a plurality of semiconductor die. The multi-chip semiconductor connector is utilized to mechanically attach the plurality of semiconductor die together and to provide electrical connection to the plurality of semiconductor die.
    Type: Application
    Filed: June 28, 2004
    Publication date: December 29, 2005
    Inventors: Francis Carney, Phillip Celaya, Joseph Fauty, James Letterman, Stephen Germain, Jay Yoder