Semiconductor component and method of manufacture
A circuit component having one or more encapsulated circuit elements that are not disposed on a rigid support substrate and a method for manufacturing the circuit component. A semiconductor wafer is disposed on a dicing film and singulated into individual semiconductor chips. The dicing film is stretched and a protective film is placed in contact with the active surfaces of the semiconductor chips. An encapsulating material is formed over the semiconductor chips. The encapsulating material covers the semiconductor chips and the portions of the protective film between the semiconductor chips to form a unitary structure. A support film is coupled to the unitary structure and the protective film is removed. The unitary structure is singulated into individual semiconductor components. Alternatively, multichip circuit components can be manufactured that may include active circuit elements, passive circuit elements, or combinations thereof.
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The present invention relates, in general, to semiconductor components and, more particularly, to semiconductor component packaging.
BACKGROUND OF THE INVENTIONSemiconductor component manufacturers are constantly striving to increase the performance of their products while decreasing their cost of manufacture. A cost intensive area in the manufacture of semiconductor components is packaging the semiconductor chips that contain the semiconductor devices. As those skilled in the art are aware, discrete semiconductor devices and integrated circuits are fabricated from semiconductor wafers, which are then singulated or diced to produce semiconductor chips. Typically, one or more semiconductor chips is attached to a rigid support substrate and encapsulated within a mold compound so that the semiconductor chip is not exposed to an external ambient. This provides protection from environmental and physical stresses. In wafer-scale assembly technologies and in flip-chip technologies, solder bumps are formed on bonding pads that are present on the semiconductor wafer or the semiconductor chip. The semiconductor wafer or semiconductor chip is mounted to the support substrate so that the solder bumps can be bonded to corresponding bonding pads located on the support substrate. In addition to using flip-chip techniques, bonding may be performed using wire interconnects or a combination of flip-chip bonding and wire interconnects.
A drawback with these techniques is that in multi-chip packages a single defective bond can render the semiconductor component non-functional. Defective bonds can arise because of defects in the under-metal bump metallization system, cracks in the semiconductor material near the bonding pads, cratering, and failure of the solder joints because of the metal becoming fatigued. In addition, multi-chip packages generate large amounts of heat that can stress the semiconductor components if the heat is not removed. Another drawback is that in traditional wafer-scale and flip-chip technologies the bonding pads consume large amounts of semiconductor material. Moreover, these processing techniques are complex and expensive to implement in a manufacturing environment.
Hence, a need exists for a semiconductor component and a method of manufacturing the semiconductor component that allows for the production of single chip packages or multi-chip packages that are reliable and cost efficient to manufacture.
BRIEF DESCRIPTION OF THE DRAWINGSThe present invention will be better understood from a reading of the following detailed description taken in conjunction with the accompanying drawing figures in which like reference characters designate like elements and in which:
Generally, the present invention provides a circuit component and a method for manufacturing the circuit component that includes using a plurality of elastic films in supporting, dicing, and encapsulating circuit elements comprising the circuit component. The use of elastic films decreases the need for rigid support substrates such as, for example, metal leadframes, printed circuit boards, or the like. This lowers the manufacturing costs and decreases the complexity of manufacturing circuit components. In accordance with one embodiment, a bottom surface of a semiconductor wafer is mounted to a first elastic film and singulated into a plurality of semiconductor chips by, for example, sawing or cutting the semiconductor wafer. The first elastic film is stretched creating separation between the semiconductor chips and a second elastic film is attached to the top surfaces of the plurality of semiconductor chips. The first elastic film is removed from the bottom surfaces of the semiconductor chips. An encapsulating material is formed on the bottom surfaces and the side surfaces of the semiconductor chips to form a unitary structure having a bottom surface and a top surface. The second elastic film maintains the separation between semiconductor chips, protects the top or active surfaces of the semiconductor chips, and serves as a wall to form a top surface of the unitary structure, i.e., a top surface of the encapsulating material. The bottom surface of the unitary structure is mounted to a third elastic film and the unitary structure is singulated into individual circuit components. Although the semiconductor chips typically comprise active circuit elements such as, for example, insulated gate field effect transistors, bipolar junction transistors, insulated gate bipolar transistors, junction field effect transistors, or the like, they can comprise passive circuit elements such as resistors, capacitors, inductors, or the like. Alternatively, the semiconductor chips can be replaced with circuit elements derived from non-semiconductor based materials.
In accordance with another embodiment, the top surfaces of a plurality of circuit elements are placed in contact with an elastic film. The elastic film protects the top or active surfaces of the circuit elements and serves as a wall to form a top surface of the unitary structure, i.e., a top surface of the encapsulating material. The plurality of circuit elements are encapsulated using, for example, a mold compound to form a unitary structure having top and bottom surfaces. The bottom surface of the unitary structure is mounted to an elastic film and the elastic film contacting the circuit elements is removed thereby exposing the top surfaces of the unitary structure and the circuit elements. The unitary structure is singulated to form circuit components. It should be noted that each circuit component may be comprised of one or more circuit elements. Preferably, each circuit component has the same number and types of circuit elements.
It should be noted that adhesive films and tapes generally have a backing or carrier layer and an adhesive layer. The composition of each layer varies with tape type. For example, a wafer dicing film may have a polyester backing layer and either a silicone adhesive layer or an ultraviolet radiation (“UV”) curable layer. A package singulation tape may be comprised of, for example, a polyester backing with a silicone adhesive layer. However, the type of backing layer and adhesive layer are not limitations of the present invention.
In operation, a film 24 having an adhesive surface 26 and a non-adhesive surface 28 is stretched across film frame 10 such that non-adhesive surface 28 contacts film frame 10. Suitable materials for film 24 include polyester, acrylic, polyimide, an ultraviolet sensitive film, a composite material, or the like. For the sake of clarity, surfaces 26, 28, 33, and 35 are discussed at this point, however, they are illustrated and further discussed with reference to
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Although not shown, a bottom surface 106 of film 102 may be mounted to a film frame such as film frame 10 or to a film stretcher such as film stretcher 40. In accordance with this embodiment, the circuit elements may be placed on film 102 after it has been stretched because the distance between the circuit elements can be set by the tool used to place the circuit elements on film 102. By way of example, the tool used to place circuit elements 108, 110, 112 and 113 on film 102 is a pick and place tool. Although circuit elements 108, 110, and 112 are shown as having notches 128, 130, and 132, respectively, it should be understood that this is not a limitation of the present invention and that the notches may be absent from the circuit elements or present in one or more of the circuit elements. Like notches 72 described with reference to
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By now it should be appreciated that a method for manufacturing a semiconductor component that does not include mounting circuit elements to rigid support substrates such as a leadframe or a printed circuit board and a semiconductor component manufactured in accordance with the method have been provided. In accordance with an embodiment of the present invention, a single circuit element is embedded within an encapsulating material using a plurality of films to protect the active surface of the circuit element and to help shape the encapsulating material. In accordance with another embodiment of the present invention, a plurality of circuit elements are embedded within an encapsulating material using a plurality of films to protect their active surfaces and to help shape the encapsulating material. Advantages of the present invention include a reduction in the cost of manufacturing semiconductor components and making the manufacturing process user friendly.
Although certain preferred embodiments and methods have been disclosed herein, it will be apparent from the foregoing disclosure to those skilled in the art that variations and modifications of such embodiments and methods may be made without departing from the spirit and scope of the invention. It is intended that the invention shall be limited only to the extent required by the appended claims and the rules and principles of applicable law.
Claims
1. A method for manufacturing a semiconductor component, comprising:
- providing a first film having first and second major surfaces;
- mounting at least one circuit element on the first major surface of the first film, the at least one circuit element having first and second surfaces, the first surface of the at least one circuit element contacting the first major surface of the first film; and
- mating a second film to the second surface of the at least one circuit element, the second film having first and second major surfaces, wherein the first major surface of the second film contacts the second surface of the at least one circuit element.
2. The method of claim 1, further including:
- removing the first film from the first surface of the at least one circuit element;
- forming an encapsulating material on at least the first surface of the at least one circuit element, the encapsulating material having a top surface and a mating surface, the mating surface spaced apart from the at least one circuit element; and
- removing the second film from the second surface of the at least one circuit element.
3. The method of claim 1, wherein mounting at least one circuit element on the first major surface of the first film includes mounting a semiconductor wafer on the first film, and further including:
- sawing the semiconductor wafer to form a plurality of semiconductor chips;
- stretching the first film to separate individual semiconductor chips of the plurality of semiconductor chips from each other; and
- wherein mating the second film to the second surface of the at least one circuit element includes joining the second film to at least one of the individual semiconductor chips of the plurality of semiconductor chips.
4. The method of claim 3, further including mating a third film to the mating surface of the encapsulating material, the third film having first and second major surfaces, wherein the first major surface of the third film contacts the mating surface of the encapsulating material.
5. The method of claim 4, further including sawing the encapsulating material to form a plurality of singulated circuit elements.
6. The method of claim 3, wherein sawing the semiconductor wafer to form a plurality of semiconductor chips includes sawing the semiconductor wafer with a first saw blade having a first width and sawing the semiconductor wafer with a second saw blade having a second width.
7. The method of claim 6, wherein the second width is less than the first width.
8. The method of claim 1, wherein mounting the at least one circuit element on the first major surface of the first film includes mounting a circuit element selected from the group of circuit elements consisting of an active circuit element and a passive circuit element.
9. The method of claim 8, wherein the passive circuit element comprises at least one of a resistor, a capacitor, and an inductor.
10. The method of claim 1, wherein mounting the at least one circuit element on the first major surface of the first film includes mounting a plurality of circuit elements on the first major surface of the first film.
11. The method of claim 10, wherein first and second circuit elements of the plurality of circuit elements are different types of circuit elements from each other.
12. The method of claim 1, wherein the first surface of the at least one circuit element is a solderable surface.
13. A method for packaging a circuit element, comprising:
- providing a plurality circuit elements mounted to a first adhesive material, wherein the plurality of circuit elements comprises circuit elements having first and second major surfaces, and wherein the first major surfaces of the plurality of circuit elements contact the first adhesive material; and
- mating a second adhesive material to the second surfaces of the plurality of circuit elements while the plurality of circuit elements is mounted to the first adhesive material.
14. The method of claim 13, further including:
- separating the first adhesive material from the plurality of circuit elements to expose portions of the plurality of circuit elements; and
- forming an encapsulating material on the exposed portions of the plurality of circuit elements to form a unitary structure.
15. The method of claim 14, further including:
- mounting the unitary structure on a third adhesive material;
- separating the second adhesive material from the unitary structure; and
- singulating the unitary structure.
16. The method of claim 15, wherein singulating the unitary structure includes singulating a first circuit element of the plurality of circuit elements from a second circuit element of the plurality of circuit elements.
17. The method of claim 16, wherein the first and second circuit elements are one of active circuit elements or passive circuit elements.
18. The method of claim 15, wherein singulating the unitary structure includes singulating first and second circuit elements of the plurality of circuit elements from third and fourth circuit elements of the plurality of circuit elements.
19. The method of claim 18, wherein the first, second, third, and fourth circuit elements are active circuit elements.
20. The method of claim 18, wherein the first and third circuit elements are active circuit elements and the second and fourth circuit elements are passive circuit elements.
21. The method of claim 18, wherein the first and third circuit elements are the same type of circuit elements and the second and fourth circuit elements are the same type of circuit elements.
22. An intermediate structure suitable for use in a semiconductor component, comprising:
- a circuit element having first and second major surfaces,
- a first film coupled to the first major surface; and
- a second film coupled to the second major surface.
23. The semiconductor component of claim 22, wherein the circuit element is one of a passive circuit element or an active circuit element.
24. The semiconductor component of claim 22, wherein a material of the first and second films is a material selected from the group of materials consisting of an acrylate, a polyester, a polyimide, and a composite material.
25. A semiconductor component, comprising:
- at least one circuit element having a top surface, a bottom surface, and a side surface; and
- an encapsulating material contacting the bottom surface and the side surface, wherein the at least one circuit element is not coupled to a support substrate.
26. The semiconductor component of claim 25, wherein the encapsulating material is not coupled to the support substrate.
Type: Application
Filed: Nov 18, 2005
Publication Date: May 24, 2007
Applicant:
Inventors: Harold Anderson (Chandler, AZ), Jay Yoder (Phoenix, AZ), Cang Ngo (Mesa, AZ), Joseph Fauty (Mesa, AZ), James Lettlerman (Mesa, AZ)
Application Number: 11/281,160
International Classification: H01L 21/00 (20060101);