Abstract: A binary complementary metal-oxide-semiconductor (CMOS) image sensor includes a pixel array and a readout circuit. The pixel array includes at least one pixel having a plurality of sub-pixels. The readout circuit is configured to quantize a pixel signal output from the pixel using a reference signal. The pixel signal corresponds to sub-pixel signals output from sub-pixels, from among the plurality of sub-pixels, activated in response to incident light.

Abstract: A voltage select circuit includes a plurality of first transfer elements configured to transfer respective operating voltages to a first output terminal, a transfer select circuit unit configured to output a first voltage necessary to transfer an operating voltage, selected from among the operating voltages, to at least one first transfer element in response to a plurality of enable signals, and a control circuit configured to boost the first voltage to a second voltage in response to the plurality of enable signals.

Abstract: A high voltage generation circuit includes a plurality of pumps configured to generate a final pump voltage, a plurality of switches configured to couple the pumps to various nodes, a voltage division circuit configured to divide the final pump voltage from the pumps interconnected by the switches, and outputting a divided voltage, a section signal generation circuit configured to generate a plurality of section signals by comparing the divided voltage with each of different reference voltages, and a section signal combination circuit configured to generate enable signals for controlling the switches by combining the section signals.

Abstract: The capacitor of a nonvolatile memory device includes first and second electrodes formed in the capacitor region of a semiconductor substrate to respectively have consecutive concave and convex shape of side surfaces formed along each other and a dielectric layer formed between the first and the second electrodes.

Abstract: A regulator includes a current path unit coupled between an input terminal and a ground terminal and including a first current determination unit coupled between the input terminal and a control node and configured to supply the high voltage to the control node so that a first or second current path is selected depending on a voltage of the control node, and a second current determination unit coupled between the control node and the ground terminal and configured to control the voltage of the control node depending on an input voltage, a voltage supply unit configured to supply the high voltage to an output terminal depending on the voltage of the control node, a voltage division unit configured to create a division voltage, and an amplification unit configured to amplify a difference between the division voltage and a first reference voltage.

Abstract: A non-volatile memory device includes a plurality of memory blocks, first block switches configured to correspond to the respective odd-numbered memory blocks of the plurality of memory blocks and couple the word lines of the odd-numbered memory blocks and first local lines, second block switches configured to correspond to the respective even-numbered memory blocks of the plurality of memory blocks and couple the word lines of the even-numbered memory blocks and second local lines, a local line switch unit configured to selectively couple the first local lines or the second local lines and global word lines, and a high voltage generator configured to supply operating voltages to the global word lines.

Abstract: The capacitor of a nonvolatile memory device includes first and second electrodes formed in the capacitor region of a semiconductor substrate to respectively have consecutive concave and convex shape of side surfaces formed along each other and a dielectric layer formed between the first and the second electrodes.

Abstract: A semiconductor circuit includes a control signal generation circuit configured to generate control signals in response to a voltage characteristic determination signal and a reference voltage generation circuit configured to output a main reference voltage, having one of a first characteristic of being proportional to temperature, a second characteristic of being constant irrespective of temperature, and a third characteristic of being inversely proportional to temperature, in response to the control signals.

Abstract: A semiconductor device includes a high voltage generator for generating a high voltage by raising a power source voltage, a transfer circuit for transferring the high voltage to an internal circuit in response to a transfer signal, and a first discharge circuit for discharging the high voltage of an output node of the high voltage generator or the high voltage of an input node or output node of the transfer circuit when the power source voltage drops.

Abstract: A voltage supply circuit includes a high voltage generator configured to generate an operating voltage, a global word line switch configured to transfer the operating voltage to global word lines, a plurality of local line switches coupled to the global word lines and configured to transfer the operating voltage to corresponding local word lines, a precharge unit configured to supply a precharge voltage to an unselect local line switch adjacent to a select local line switch to which the operating voltage will be supplied, from among the plurality of local line switches, in a preparation section before an operation is started, and a coupling unit configured to couple the unselect local line switch and the global word line switch when the operation is started.

Abstract: A binary complementary metal-oxide-semiconductor (CMOS) image sensor includes a pixel array and a readout circuit. The pixel array includes at least one pixel having a plurality of sub-pixels. The readout circuit is configured to quantize a pixel signal output from the pixel using a reference signal. The pixel signal corresponds to sub-pixel signals output from sub-pixels, from among the plurality of sub-pixels, activated in response to incident light.

Abstract: An internal voltage generator includes a comparison unit configured to compare a voltage level of a feedback voltage with a reference voltage to generate an enable signal based on a result of the comparison; an internal voltage generation unit configured to generate an internal voltage in response to the enable signal; a voltage detection unit configured to generate a control signal by detecting a voltage level of a power source voltage; and a feedback unit configured to generate the feedback voltage by dividing the internal voltage at a given resistance ratio, wherein the feedback unit continuously maintains a difference between the voltage levels of the power source voltage and the internal voltage in response to the control signal.

Abstract: A voltage supply circuit includes, inter alia, a clock generator, a negative voltage pump, a level shifter, a clock controller, and a pump circuit. The clock generator generates a first clock swinging between a positive voltage and a ground voltage. The negative voltage pump generates a negative voltage. A level shifter shifts the first clock by the negative voltage to output a second clock swinging between the negative voltage and the ground voltage. The clock controller generates a third clock by inverting the second clock and also generates a fourth clock by inverting the third clock. The pump circuit generates a high voltage according to the third and fourth clocks.

Abstract: A voltage select circuit includes a plurality of first transfer elements configured to transfer respective operating voltages to a first output terminal, a transfer select circuit unit configured to output a first voltage necessary to transfer an operating voltage, selected from among the operating voltages, to at least one first transfer element in response to a plurality of enable signals, and a control circuit configured to boost the first voltage to a second voltage in response to the plurality of enable signals.

Abstract: A semiconductor device includes a high voltage generator for generating a high voltage by raising a power source voltage, a transfer circuit for transferring the high voltage to an internal circuit in response to a transfer signal, and a first discharge circuit for discharging the high voltage of an output node of the high voltage generator or the high voltage of an input node or output node of the transfer circuit when the power source voltage drops.

Abstract: A regulator includes a current path unit coupled between an input terminal and a ground terminal and including a first current determination unit coupled between the input terminal and a control node and configured to supply the high voltage to the control node so that a first or second current path is selected depending on a voltage of the control node, and a second current determination unit coupled between the control node and the ground terminal and configured to control the voltage of the control node depending on an input voltage, a voltage supply unit configured to supply the high voltage to an output terminal depending on the voltage of the control node, a voltage division unit configured to create a division voltage, and an amplification unit configured to amplify a difference between the division voltage and a first reference voltage.

Abstract: A voltage supply circuit includes a high voltage generator configured to generate an operating voltage, a global word line switch configured to transfer the operating voltage to global word lines, a plurality of local line switches coupled to the global word lines and configured to transfer the operating voltage to corresponding local word lines, a precharge unit configured to supply a precharge voltage to an unselect local line switch adjacent to a select local line switch to which the operating voltage will be supplied, from among the plurality of local line switches, in a preparation section before an operation is started, and a coupling unit configured to couple the unselect local line switch and the global word line switch when the operation is started.

Abstract: A non-volatile memory device includes a plurality of memory blocks, first block switches configured to correspond to the respective odd-numbered memory blocks of the plurality of memory blocks and couple the word lines of the odd-numbered memory blocks and first local lines, second block switches configured to correspond to the respective even-numbered memory blocks of the plurality of memory blocks and couple the word lines of the even-numbered memory blocks and second local lines, a local line switch unit configured to selectively couple the first local lines or the second local lines and global word lines, and a high voltage generator configured to supply operating voltages to the global word lines.

Abstract: A high voltage generation circuit includes a plurality of pumps configured to generate a final pump voltage, a plurality of switches configured to couple the pumps to various nodes, a voltage division circuit configured to divide the final pump voltage from the pumps interconnected by the switches, and outputting a divided voltage, a section signal generation circuit configured to generate a plurality of section signals by comparing the divided voltage with each of different reference voltages, and a section signal combination circuit configured to generate enable signals for controlling the switches by combining the section signals.

Abstract: A temperature sensor includes a compare subject voltage output unit, a temperature range decision unit, and a temperature signal output unit. The compare subject voltage output unit is configured to output a reference voltage having a constant value irrespective of a change of an external temperature and a third temperature voltage that decreases in response to an increase of an external temperature. The temperature range decision unit is configured to compare the reference voltage and the third temperature voltage, and output an enable signal, to indicate whether the external temperature is different from a normal temperature. The temperature signal output unit is configured to output a specific one of a plurality of high temperature signals or a specific one of a plurality of low temperature signals, to indicate a range of the external temperature, in response to the enable signal.