Patents by Inventor Jean-François Roy
Jean-François Roy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11911792Abstract: A capacitive transducer is provided. The capacitive transducer includes a plate including a protruding center mass and a substrate with a center depression configured to accept the center mass. The capacitive transducer also includes a first electrode coupled to a non-horizontal edge surface of the center mass and a second electrode coupled to a non-horizontal edge surface of the center depression. The capacitive transducer further includes a third electrode coupled to a horizontal edge surface of the center mass and a fourth electrode coupled to a horizontal edge surface of the center depression. The plate is coupled to the substrate at least along an outer perimeter area of the plate and the substrate.Type: GrantFiled: January 12, 2021Date of Patent: February 27, 2024Assignee: GE Precision Healthcare LLCInventors: Rupak Bardhan Roy, Edouard Da Cruz, Frederic Lanteri, Omid Farhanieh, Jean-François Gelly, Flavien Daloz
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Publication number: 20240001230Abstract: Some implementations of this application are directed to a server system including one or more CPUs, a plurality of GPUs, main dynamic memory storing programs and data for use by the CPUs and/or GPUs during program execution, a static memory pool stored in a non-volatile memory, and a memory controller configured to manage the static memory pool. Each of the GPUs includes a local cache and is configured to access the static memory pool via the memory controller. The server system executes a plurality of gaming sessions for a gaming title in parallel on the one or more CPUs. Each of the plurality of gaming sessions is associated with a static data item stored in the static memory pool, and requires a graphics operation executable by a respective GPU using the static data item.Type: ApplicationFiled: September 7, 2023Publication date: January 4, 2024Inventors: Paul Lalonde, Jean-François Roy, Paul Leventis
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Patent number: 11813521Abstract: Some implementations of this application are directed to a server system including one or more CPUs, a plurality of GPUs, main dynamic memory storing programs and data for use by the CPUs and/or GPUs during program execution, a static memory pool stored in a non-volatile memory, and a memory controller configured to manage the static memory pool. Each of the GPUs includes a local cache and is configured to access the static memory pool via the memory controller. The server system executes a plurality of gaming sessions for a gaming title in parallel on the one or more CPUs. Each of the plurality of gaming sessions is associated with a static data item stored in the static memory pool, and requires a graphics operation executable by a respective GPU using the static data item.Type: GrantFiled: March 29, 2021Date of Patent: November 14, 2023Assignee: GOOGLE LLCInventors: Paul Lalonde, Paul Leventis, Jean-François Roy
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Publication number: 20230330533Abstract: This application is directed to a method of managing processing capability of a server system having one or more processing cores that further include multiple processing slices. Upon receiving requests to initiate online gaming sessions, the server system allocates each processing slice of the processing cores to a subset of the online gaming sessions to be executed thereon. A first processing slice is allocated to a first subset of the online gaming sessions including a first gaming session and a second gaming session. At the first processing slice, a time-sharing processing schedule is determined for the first subset of the online gaming sessions. In accordance with the time-sharing processing schedule, the first and second gaming sessions share a duty cycle of the first processing slice, and are executed dynamically and in parallel according to real-time data processing need of the first and second gaming sessions.Type: ApplicationFiled: June 23, 2023Publication date: October 19, 2023Inventors: Clinton Smullen, Dov Zimring, Jani Huoponen, Aki Kuusela, Jean-Francois Roy, Paul Lalonde, Paul Leventis
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Publication number: 20230325966Abstract: A graphics pipeline cache reconstruction operation is implemented to reconstruct one or more graphics pipeline caches for a current client gaming session based on one or more pipeline structures. The pipeline structures each represent a graphical object rendered during a respective previous client gaming session and are used to reconstruct one or more graphics pipeline caches that include graphics pipeline cache objects related to the graphical objects of the pipeline structures. These graphics pipeline cache objects are used to initialize one or more graphics pipelines used to render the graphical objects in a gaming application for a current client gaming session.Type: ApplicationFiled: June 16, 2023Publication date: October 12, 2023Inventors: Robert Fraser, Chetan Kakkar, Derek Bulner, Jean-François Roy, Kevin Moule, Nicholas Deakin
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Patent number: 11727531Abstract: A graphics pipeline cache reconstruction operation is implemented to reconstruct one or more graphics pipeline caches for a current client gaming session based on one or more pipeline structures. The pipeline structures each represent a graphical object rendered during a respective previous client gaming session and are used to reconstruct one or more graphics pipeline caches that include graphics pipeline cache objects related to the graphical objects of the pipeline structures. These graphics pipeline cache objects are used to initialize one or more graphics pipelines used to render the graphical objects in a gaming application for a current client gaming session.Type: GrantFiled: September 23, 2021Date of Patent: August 15, 2023Assignee: GOOGLE LLCInventors: Robert Fraser, Chetan Kakkar, Derek Bulner, Jean-François Roy, Kevin Moule, Nicholas Deakin
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Publication number: 20230248258Abstract: It is described a system and a method for respiratory activity analysis comprising the use of Respiratory Inductance Plethysmography (RIP). In particular, a wearable system for extracting physiological parameters of a person by measuring at least one plethysmographic signal is disclosed. The system comprises: a wearable garment fitting a body part of the person; at least one wire supported by or embedded into the garment, each wire forming a loop around the body part when the person wears the garment for measuring a plethysmographic signal; and an electronic device supported by or fixed on the garment and including a Colpitts oscillator connected to each wire loop, wherein the Colpitts oscillator has an optimal frequency band from 1 MHz to 15 MHz for extracting the plethysmographic signal measured by each wire, the electronic device converting analog information measured by the Colpitts oscillator into digital analyzable information.Type: ApplicationFiled: April 19, 2023Publication date: August 10, 2023Inventors: Jean-Francois Roy, Pierre-Alexandre Fournier, Charles Robillard, Robert Corriveau, Simon Dubeau, Antoine Gagne-Turcotte, David Khouya
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Patent number: 11701587Abstract: This application is directed to a method of managing processing capability of a server system having one or more processing cores that further include multiple processing slices. Upon receiving requests to initiate online gaming sessions, the server system allocates each processing slice of the processing cores to a subset of the online gaming sessions to be executed thereon. A first processing slice is allocated to a first subset of the online gaming sessions including a first gaming session and a second gaming session. At the first processing slice, a time-sharing processing schedule is determined for the first subset of the online gaming sessions. In accordance with the time-sharing processing schedule, the first and second gaming sessions share a duty cycle of the first processing slice, and are executed dynamically and in parallel according to real-time data processing need of the first and second gaming sessions.Type: GrantFiled: November 8, 2021Date of Patent: July 18, 2023Assignee: GOOGLE LLCInventors: Clinton Smullen, Dov Zimring, Jani Huoponen, Aki Kuusela, Jean-Francois Roy, Paul Lalonde, Paul Leventis
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Patent number: 11675643Abstract: The invention relates to a device and a method (100) for determining a technical incident risk value in an infrastructure (5), said method comprising: a step of receiving (120) performance indicator values, a step of identifying (140) anomalous performance indicators, so as to identify abnormal values, and identifying performance indicators associated with these abnormal values, a step of determining (150) at-risk indicators, comprising an identification of performance indicators of the computing infrastructure that are correlated with the identified anomalous indicators, a step of creating (160) an augmented anomalies vector, comprising the identifiers of the identified anomalous indicators and the identifiers of the determined at-risk indicators, a determination step (170), comprising the comparison of the augmented anomalies vector with predetermined technical incident reference data.Type: GrantFiled: July 13, 2020Date of Patent: June 13, 2023Assignee: BULL SASInventors: Kaoutar Sghiouer, Guillaume Porcher, Pierre Seroul, Jean-Francois Roy
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Publication number: 20230140250Abstract: A system includes a video source device connected to a video destination device via a network. The video source device includes a network interface and an encoder coupled to the network interface. The encoder is configured to encode a first stream of rendered video frames having a first frame rate to generate a second stream of encoded video frames for transmission over the network via the network interface, wherein the second stream has a second frame rate greater than the first frame rate. As part of this encoding process, the encoder is configured to selectively encode multiple instances of at least one video frame of the first stream for inclusion in the second stream to compensate for the difference between the first frame rate and the second frame rate.Type: ApplicationFiled: October 10, 2019Publication date: May 4, 2023Inventors: Douglas Sim Dietrich, JR., Robert McCool, Jean-François Roy, Michael S. Green, Gurudas Somadder
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Publication number: 20230087910Abstract: A graphics pipeline cache reconstruction operation is implemented to reconstruct one or more graphics pipeline caches for a current client gaming session based on one or more pipeline structures. The pipeline structures each represent a graphical object rendered during a respective previous client gaming session and are used to reconstruct one or more graphics pipeline caches that include graphics pipeline cache objects related to the graphical objects of the pipeline structures. These graphics pipeline cache objects are used to initialize one or more graphics pipelines used to render the graphical objects in a gaming application for a current client gaming session.Type: ApplicationFiled: September 23, 2021Publication date: March 23, 2023Inventors: Robert Fraser, Chetan Kakkar, Derek Bulner, Jean-François Roy, Kevin Moule, Nicholas Deakin
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Patent number: 11494308Abstract: A calculation system comprises a computing device having one or more instruction-controlled processing cores and a memory controller, the memory controller including a cache memory; and a memory circuit coupled to the memory controller via a data bus and an address bus, the memory circuit being adapted to have a first m-bit memory location accessible by a plurality of first addresses provided on the address bus, the calculation device being configured to select, in order to each memory operation accessing the first m-bit memory location, one address among the plurality first addresses.Type: GrantFiled: September 6, 2017Date of Patent: November 8, 2022Assignee: UPMEMInventors: Jean-François Roy, Fabrice Devaux
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Patent number: 11487644Abstract: Debugging a graphics application executing on a target device. The graphics application may execute CPU instructions to generate graphics commands to graphics hardware for generation of graphics on a display. A breakpoint for the graphics application may be detected at a first time. In response to detecting the breakpoint, one or more graphics commands which were executed by the graphics hardware proximate to the first time may be displayed. Additionally, source code corresponding to CPU instructions which generated the one or more graphics commands may be displayed.Type: GrantFiled: January 22, 2021Date of Patent: November 1, 2022Assignee: Apple Inc.Inventors: Andrew M. Sowerby, Jean-Francois Roy, Filip Iliescu
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Patent number: 11369873Abstract: This application is directed to a method of managing processing capability of a server system having one or more processing cores that further include multiple processing slices. Upon receiving requests to initiate online gaming sessions, the server system allocates each processing slice of the processing cores to a subset of the online gaming sessions to be executed thereon. A first processing slice is allocated to a first subset of the online gaming sessions including a first gaming session and a second gaming session. At the first processing slice, a time-sharing processing schedule is determined for the first subset of the online gaming sessions. In accordance with the time-sharing processing schedule, the first and second gaming sessions share a duty cycle of the first processing slice, and are executed dynamically and in parallel according to real-time data processing need of the first and second gaming sessions.Type: GrantFiled: April 15, 2020Date of Patent: June 28, 2022Assignee: Google LLCInventors: Clinton Smullen, Dov Zimring, Jani Huoponen, Aki Kuusela, Jean-Francois Roy, Paul Lalonde, Paul Leventis
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Publication number: 20220127087Abstract: An interface apparatus for coupling a vehicle to a container, has: a base engageable by the vehicle; a frame connected to the base and detachably securable to the container, the frame pivotable relative to the base for pivoting the container from a lifting position to a discharging position for discharging the container; an actuation unit between the frame and the base; and a latching mechanism for removably attaching the container to the apparatus, the latching mechanism including a first portion secured to the frame and a second portion securable to the container, the first portion movable relative to the second portion in a mating direction having a component normal to the ground from a disengaged configuration in which the first portion is detached form the second portion to an engaged configuration in which the first portion is received within the second portion.Type: ApplicationFiled: February 28, 2020Publication date: April 28, 2022Inventors: Fabien LAVOIE, Alain HAMEL, Carl PAILLE, Jean-François ROY
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Patent number: 11307916Abstract: A method for determining an estimated duration before a technical incident in a computing infrastructure, executed by a computing device. The computing device including a data processing module, a storage module that stores in memory at least one correlation base between performance indicators, wherein the correlation base includes values of duration before becoming anomalous between correlated performance indicators, and a collection module. The method includes receiving performance indicator values, identifying anomalous performance indicators, identifying first and other at-risk indicators. The method includes determining an estimated duration before a technical incident including a calculation, from the anomalous indicators and at-risk indicators, a shorter path leading to a risk of technical incident, and a calculation of an estimated duration before a technical incident.Type: GrantFiled: July 13, 2020Date of Patent: April 19, 2022Assignee: BULL SASInventors: Jean-François Roy, Kaoutar Sghiouer, Guillaume Porcher, Pierre Seroul
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Publication number: 20220054940Abstract: This application is directed to a method of managing processing capability of a server system having one or more processing cores that further include multiple processing slices. Upon receiving requests to initiate online gaming sessions, the server system allocates each processing slice of the processing cores to a subset of the online gaming sessions to be executed thereon. A first processing slice is allocated to a first subset of the online gaming sessions including a first gaming session and a second gaming session. At the first processing slice, a time-sharing processing schedule is determined for the first subset of the online gaming sessions. In accordance with the time-sharing processing schedule, the first and second gaming sessions share a duty cycle of the first processing slice, and are executed dynamically and in parallel according to real-time data processing need of the first and second gaming sessions.Type: ApplicationFiled: November 8, 2021Publication date: February 24, 2022Inventors: Clinton Smullen, Dov Zimring, Jani Huoponen, Aki Kuusela, Jean-Francois Roy, Paul Lalonde, Paul Leventis
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Patent number: 11198065Abstract: This application is directed to a method of managing processing capability of a server system having one or more processing cores that further include multiple processing slices. Upon receiving requests to initiate online gaming sessions, the server system allocates each processing slice of the processing cores to a subset of the online gaming sessions to be executed thereon. A first processing slice is allocated to a first subset of the online gaming sessions including a first gaming session and a second gaming session. At the first processing slice, a time-sharing processing schedule is determined for the first subset of the online gaming sessions. In accordance with the time-sharing processing schedule, the first and second gaming sessions share a duty cycle of the first processing slice, and are executed dynamically and in parallel according to real-time data processing need of the first and second gaming sessions.Type: GrantFiled: April 15, 2020Date of Patent: December 14, 2021Assignee: Google LLCInventors: Clinton Smullen, Dov Zimring, Jani Huoponen, Aki Kuusela, Jean-Francois Roy, Paul Lalonde, Paul Leventis
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Publication number: 20210349826Abstract: A calculation system comprises a computing device having one or more instruction-controlled processing cores and a memory controller, the memory controller including a cache memory; and a memory circuit coupled to the memory controller via a data bus and an address bus, the memory circuit being adapted to have a first m-bit memory location accessible by a plurality of first addresses provided on the address bus, the calculation device being configured to select, in order to each memory operation accessing the first m-bit memory location, one address among the plurality first addresses.Type: ApplicationFiled: September 6, 2017Publication date: November 11, 2021Inventors: Jean-François ROY, Fabrice DEVAUX
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Patent number: D941522Type: GrantFiled: July 19, 2019Date of Patent: January 18, 2022Assignee: CARRE TECHNOLOGIES INC.Inventors: Marc Castanet, Sylvain Duchesne, Pierre-Alexandre Fournier, Robert Katz, Jean-Francois Roy