Abstract: A method of detecting a tsunami by using the global positioning system (GPS) is provided. The method comprises steps of distributing a plurality of GPS receivers over a sea surface in a target area; receiving signals from GPS satellites by the plurality of GPS receivers, and transmitting the signals and coordinates of the plurality of GPS receivers to a computer; processing the signals to acquire a real-time monitoring data of the ionosphere, wherein the real-time monitoring data includes the distribution of electrons in the ionosphere above the target area; and determining the occurrence of a tsunami based on the distribution of electrons.

Abstract: A transistor voltage-controlled oscillator (VCO) and a frequency synthesizer having the transistor VCO are provided. The frequency synthesizer adopts a divide-by-five injection-locked frequency divider, which includes a five-stage inverter ring oscillating frequency dividing circuit for reducing the operating frequency of the oscillating signal from the VCO, thus decreasing power consumption due to counting operation of the frequency synthesizer. The transistor VCO includes three transistor switching capacitor sets connected in parallel to one another to form a parallel structure. The gates of the transistor switching capacitor sets are connected to respective operating voltage sources, so as to switch the status of the corresponding transistor switching capacitor set, which in turn adjusts the harmonic frequency generated by the VCO, thereby allowing the VCO to generate a corresponding operating frequency with enough bandwidth.

Abstract: A transistor single-pole-single-throw circuit device includes at least a transistor single-pole-single-throw circuit having a first transistor and a second transistor, and an inductor capacitor (LC) resonator having an inductor and a capacitor connected in series, allowing two ends of the LC resonator connected to the first source and the first drain of the first transistor, respectively. The transistor single-pole-single-throw circuit device adopts an LC resonator having an inductor and a capacitor connected in series to connect with the first source and the first drain of the first transistor. The inductor couples and resonates with a parasitic capacitance of the transistor, to reduce signal loss due to emerged parasitic capacitance when the conventional single-pole-single-throw circuit selects a switch transistor with a larger width.

Abstract: A FET transistor voltage-controlled oscillator is provided that includes a crossed-coupled inductor capacitor tank (LC-Tank) transistor voltage-controlled circuit having a first transistor and a second transistor, as well as a transistor frequency multiplying circuit having a third transistor and a fourth transistor. In the design, the gate of the first transistor is connected to the drain of the second transistor, and the gate of the second transistor is connected to the drain of the first transistor. Then, the source of the third transistor is connected to the source of the first transistor, and the source of the fourth transistor is connected to the source of the second transistor. Last, the gate of the third transistor is connected to the gate of the fourth transistor, and the drain of the third transistor is connected to the drain of the fourth transistor.

Abstract: A direct injection-locked frequency divider circuit with inductive-coupling feedback architecture is proposed, which is designed for integration to a high-frequency circuit system with a high operating frequency such as 24 GHz (gigahertz), for providing a frequency-dividing function. The proposed frequency divider circuit comprises an injection-locked oscillator (ILO) circuit module and a pair of buffer-stage circuits, wherein the ILO circuit module further includes a signal-injection circuit, a cross-coupled switching circuit, and a variable-capacitance tuning circuit. The proposed circuit architecture is characterized by the circuit arrangement of a direct-injection architecture and an inductive-coupling feedback architecture by coupling the inductive elements of the buffer-stage circuits to the inductive elements of the variable-capacitance tuning circuit in the ILO circuit module.

Abstract: An antenna comprises a substrate, a feed conductor, a ground layer, a resonator and a short-circuited element. The substrate comprises a first surface and a second surface. The feed conductor is formed on the first surface. The ground layer is formed on the second surface, comprising an aperture. The resonator is disposed on the ground layer, comprising a body and a notch, the notch is formed on a first side of the body, wherein the first side is perpendicular to the ground layer. The short-circuited element is disposed on the first side connecting the ground layer.

Abstract: The present invention relates to a dielectric resonator antenna (DRA) with a transverse-rectangle well. The DRA comprising a substrate, a ground plane, a feed conductor, and a dielectric resonator. The resonator further includes a main body and a well penetrating the main body to enhance the electric field, to increase the radiation efficiency, to broaden the bandwidth, and to create new resonant mode. The DRA has the radiation pattern of broad beamwidth with vertical polarization. Accordingly, the invention can also be adjusted as WLAN 802.11a antenna.

Abstract: A display designing system and a method thereof. The display designing system includes a variety of operation modules and an integration module. After receiving initial parameters and selecting operation type parameters, the operation modules generate operation results and transfer the operation results to the integration module. The integration module integrates the operation results and generates a correspondence relation, such as an operation window, a compare-table and an equation. The integration module then transfers the operation results and the correspondence relation to the output module. The output module displays effect variations of a variety of designs corresponding to the initial parameters. Therefore, the method can provide a user with an easy way to obtain ideal design parameters for designing a display pixel circuit.

Abstract: A dot-matrix display charging control method and system is proposed, which is designed for integration to a dot-matrix display device, such as a TFT-LCD (Thin Film Transistor Liquid Crystal Display), for controlling a data-refresh process on the dot-matrix display device. The proposed method and system is characterized by the capability of concurrently selecting a number of consecutive pixel rows in the dot-matrix panel for charging all of the pixel rows with the same set of data voltages from a master data row that is intended to be applied to one of the selected pixel rows, and then fine-tuning every other pixel row with a set of differential voltages based on the value differences between the master data row and a slave data row that is intended to be applied to the other pixel row. This feature allows the operation of a dot-matrix display device to use a long charging time for data refresh under a fast scan speed.

Abstract: A dot-matrix display data refresh voltage charging control method and system is proposed, which is designed for integration to a dot-matrix display device, such as TFT-LCD (Thin Film Transistor Liquid Crystal Display), for controlling a data-refresh process on the dot-matrix display device. The proposed method and system is characterized by the capability of performing data refresh by comparing for the differences between the currently-displayed pixel values and the new pixel values to be used for data refresh to thereby obtain a set of differential voltages for use to be applied to the pixels for data refresh. This feature allows the data-refresh process to use only a low level of differential voltage rather than the full-level of pixel data voltage for data refresh, thus allowing the data-refresh process to be completed in a reduced shorter time period to provide a fast scan speed.

Abstract: A negative-feedback type ultra-wideband signal amplification circuit is proposed, which is designed for integration to an ultra-wideband (UWB) signal processing circuit system for providing a low-noise amplification function to UWB signals. The proposed circuit architecture is characterized by the provision of a dual-step filter circuit on the input side, the provision of a resistive-type feedback circuit in the transistor-based amplification circuitry, and the provision of a common-source transistor-based amplification circuit on the output side. These features allow the proposed signal amplification circuit to have flat power gain, lower power consumption, low noise figure, and higher operational stability.

Abstract: A wideband dielectric resonator monopole antenna, which includes a dielectric resonator and a monopole antenna, combines two frequency bands having close resonant frequencies to achieve 49% of bandwidth and omnidirectional radiation patterns within the frequency band. It includes a column structure and a substrate, wherein the surface of the column structure is coated with a conductive layer, the column structure is kept upright to the substrate, and the substrate is coated or printed with two slot lines extended inward from an edge of the substrate.

Abstract: A low-noise amplifier is provided according to the present invention. The low-noise amplifier includes a first amplifier stage, a second amplifier stage, a third amplifier stage, an input matching network, inter-stage matching networks, and an output matching network. The impedance of the input matching network and the input impedance of the first amplifier stage are conjugate matched, thereby decreasing system power consumption and noise factor. The system gain is enhanced by cascading three stages of amplifiers.

Abstract: A signal conversion device, a radio frequency identification (RFID) tag, and a method for operating the RFID tag. The RFID tag has an electrically erasable programmable read-only memory module for storing RFID tag information and transmitting the RFID tag information; an information comparison module coupled to the electrically erasable programmable for receiving the RFID tag information and demodulation information, comparing the RFID tag information with the demodulation information, and generating a driving signal; and a pulse oscillation module coupled to the information comparison module for receiving the driving signal, and transmitting pulse oscillating signals to the electrically erasable programmable read-only memory module, so as to allow the electrically erasable programmable read-only memory module to transmit the RFID tag information.

Abstract: A cascode current mirror circuit and a bandgap circuit are provided. The circuits are used together and function as a reference voltage circuit. The reference voltage circuit outputs a reference current resistant to temperature variation and ripple-voltage. Accordingly, a voltage stabilizing/regulating circuit corrects error voltage precisely and promptly, and the resultant voltage is temperature insensitive and ripple-voltage-independent.

Abstract: A full-wave rectifying device includes a first rectification module and a second rectification module. The first rectification module includes one or a plurality of first rectification units. The second rectification module includes one or a plurality of second rectification units. In each of a plurality of transistors, the substrate is connected to the source so as to reduce the body effect of the rectifying circuit efficiently and enable generation of a dc voltage signal through rectification by a plurality of capacitors. A multistage rectifying circuit architecture including a plurality of first rectification units and second rectification units is provided, so as to reduce the body effect of transistors of a conventional rectifier and significantly stabilize the voltage output level, thereby allowing the rectifying circuit to generate a dc voltage level of designed value.

Abstract: A signal modulation device and a signal amplifier cooperative therewith. The signal modulation device includes a local oscillation signal source, a baseband signal source, a first NMOS transistor, and a second NMOS transistor, wherein the first and second NMOS transistors are coupled with the baseband signal source and form a circuit architecture of a Gilbert-cell based differential pair to be directly switched by a differential baseband signal, and a high-frequency signal from the local oscillation signal source is controlled by the baseband signal so as to generate an amplitude-modulation high-frequency signal at an output end. The single-stage signal power amplifier amplifies the amplitude-modulation signal from the preceding circuit so as to increase the magnitude of signals transmitted and simplify the preceding digital/analog signal conversion circuit in a conventional amplitude-modulation circuit.

Abstract: An inductance-switchable dual-band voltage-controlled oscillation circuit is proposed, which is designed for integration to a high-frequency signal processing system, such as an ultra-wideband (UWB) circuit system, for providing a dual-band voltage-controlled oscillating signal generating function. The proposed voltage-controlled oscillation circuit is characterized by the use of a switchable inductance circuit architecture in lieu of a switchable capacitive circuit architecture for integration to a fixed-inductance circuit architecture to constitute a variable-inductance LC tuning circuit architecture that allows the provision of a dual-band oscillating signal generating function. Further, a current mirror circuit module is used to maintain the quality factor of the LC tuning circuit in both operating modes; a buffer-stage circuit architecture is used to achieve low power consumption, low phase noise, and broad tuning range.

Abstract: A transistor single-pole-single-throw circuit device includes at least a transistor single-pole-single-throw circuit having a first transistor and a second transistor, and an inductor capacitor (LC) resonator having an inductor and a capacitor connected in series, allowing two ends of the LC resonator connected to the first source and the first drain of the first transistor, respectively. The transistor single-pole-single-throw circuit device adopts an LC resonator having an inductor and a capacitor connected in series to connect with the first source and the first drain of the first transistor. The inductor couples and resonates with a parasitic capacitance of the transistor, to reduce signal loss due to emerged parasitic capacitance when the conventional single-pole-single-throw circuit selects a switch transistor with a larger width.

Abstract: A low-noise amplifier is provided according to the present invention. The low-noise amplifier includes a first amplifier stage, a second amplifier stage, a third amplifier stage, an input matching network, inter-stage matching networks, and an output matching network. The impedance of the input matching network and the input impedance of the first amplifier stage are conjugate matched, thereby decreasing system power consumption and noise factor. The system gain is enhanced by cascading three stages of amplifiers.