Patents by Inventor Jean-Luc Berger
Jean-Luc Berger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 4980546Abstract: Disclosed is a solid state photosensitive device having photosensitive dots, each of which achieves an amplification of the useful signal by means of a transistor obtained by a technology enabling the making photosensitive devices with large areas. To this end, according to the disclosure, each photosensitive diode has at least one photosensitive element that generates electrical charges stored at a point at floating potential, and has a transistor, the control gate of which is connected to the floating point. The transistor thus fulfils an amplifier function, but does not fulfill a photodetection function, so that it can be made of amorphous silicon, amorphous silicon being a material that can be used in thin layers or thin films on large areas.Type: GrantFiled: October 23, 1989Date of Patent: December 25, 1990Assignee: Thomson-CSFInventor: Jean-Luc Berger
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Patent number: 4957659Abstract: The disclosure concerns matrices of photosensitive elements. To avoid the need for a resetting light source using, as a photosensitive dot, a photodiode in series with a capacitor between a row conductor and a column conductor, it is proposed, according to the invention, to provide for a photosensitive dot comprising three diodes (a photosensitive diode, a reading diode and a resetting diode) connected to a common floating node. In one embodiment, the anode of the photosensitive diode is connected to a row-addressing conductor giving a reading pulse to the selected line; the cathode of the reading diode is connected to the column conductor which collects the useful signal; and the anode of the resetting diode is connected to a second row conductor (which, besides, may be the first conductor of a neighbouring row) which receives a resetting pulse after the reading pulse.Type: GrantFiled: January 11, 1989Date of Patent: September 18, 1990Assignee: Thomson-CSFInventors: Marc Arques, Jean-Luc Berger
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Patent number: 4945420Abstract: The disclosure concerns photosensitive matrices and, more precisely, the read circuit connected to each of the output columns of the matrix. To reduce the noise of a transfer from a column to an output register, there is performed, N times successively, a transfer of the charge Qs to be read from the column to an intermediate storage zone, a duplication of this charge and a summation of the duplicated charges Qs*, and a restitution of the charge Qs to the column. If the transfer noises are decorrelated with respect to one another, the overall signal-to-noise ratio is improved in a ratio of N.sup.1/2. A fraction of the sum of the replica charges (for example the mean of the N replica charges) is transmitted to the output and constitutes the output signal of the read circuit.Type: GrantFiled: January 4, 1989Date of Patent: July 31, 1990Assignee: Thomson-CSFInventors: Jean-Luc Berger, Marc Arques
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Patent number: 4945242Abstract: The invention relates to a photosensitive matrix (2) permitting the simultaneous acquisition of two images, especially radiological images, and which offers at the same time a maximum sensitivity and a maximum image resolution. The matrix (2) of the invention includes photosensitive points (P1 to P9) disposed in lines and in columns. According to a feature of the invention, each photosensitive point (P1 to 9) includes two photosensitive cells (JA, JB), the first ends (3A, 3B) of which are connected to a same line conductor (L1 to L3), and the second ends (4A, 4B) of which are connected to different column conductors. FIG. 1.Type: GrantFiled: February 22, 1989Date of Patent: July 31, 1990Assignee: Thomson-CSFInventors: Jean-Luc Berger, Marc Arques
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Patent number: 4916664Abstract: A charge transfer device having a first storage gate above a first storage region and a second storage gate above a second storage region. The charge duplicator has a first charge injector having a first passage gate which introduces, below the first storage gate, the reference charge to be duplicated. A second charge injector having a second passage gate is located near the second storage gate. The first storage gate and second storage gate are connected to the two inputs of a voltage comparator, the output of the voltage comparator being connected to the second passage gate. The charge duplicator has a mechanism which initially is used to apply a reference voltage to the two inputs of the voltage comparator, thereby leaving the two inputs and the gates connected to them in a floating state. The voltage comparator outputs a high level or low level, depending on the value of the differential voltage between its inputs.Type: GrantFiled: January 3, 1989Date of Patent: April 10, 1990Assignee: Thomson-CSFInventors: Jean-Luc Berger, Marc Arques
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Patent number: 4906855Abstract: The disclosure concerns matrices of photosensitive elements. To prevent the need for a resetting light source in matrices using, as a photosensitive dot, a photodiode in series with a capacitor between a row conductor and a column conductor, a photosensitive dot is proposed, formed by a photodiode in series with a reading diode between a row conductor and a column conductor, it being possible to put the reading diode into forward or reverse conduction. To read the photoelectrical charges generated, a reading pulse, which makes the reading diode forward conductive, is applied. To then reset the potential of the floating node A, at which the photoelectrical charges accumulate, at a constant starting level, a reverse resetting pulse is applied, thus making the reading diode conductive (but this time in reverse conduction).Type: GrantFiled: February 22, 1989Date of Patent: March 6, 1990Assignee: Thomson-CSFInventors: Jean-Luc Berger, Marc Arques
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Patent number: 4744057Abstract: A multilinear charge transfer array is provided formed by N lines of P photosensitie detectors. Each photosensitive detector is connected directly by a connection to a demultiplexing and reading system, the signals obtained at the output of the array being fed to a processing device external to the array.The demultiplexing system comprises a charge transfer shift register with N.times.P stages, the connections between each detector and the corresponding input of the register being provided so that the detectors of the same rank are connected to contiguous inputs.Type: GrantFiled: February 15, 1985Date of Patent: May 10, 1988Assignee: Thomson-CSFInventors: Pierrick Descure, Guy Moiroud, Jean Louis Coutures, Jean Luc Berger
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Patent number: 4740908Abstract: An analog accumulator used in association with a solid state image analyzer for averaging and storing the fixed pattern noise (FPN) includes an N-stage transfer shift register with an input receiving a signal corresponding to the fixed pattern noise and with N outputs, N floating storage diodes each connected to an output of the transfer shift register, N reading parts each connected to a floating storage diode and each comprising a floating input diode connected to the floating storage diode through an injection gate, an injection device and a charge removal drain, and an N-stage transfer shift register with N inputs each connected to a reading part and with an output. The accumulator provides M integrations of N samples of an analog signal and delivers, at the end of the M integrations, the N accumulated samples several times.Type: GrantFiled: February 26, 1985Date of Patent: April 26, 1988Assignee: Thomson-CSFInventors: Jean Luc Berger, Louis Brissot, Bruno Virando
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Patent number: 4684993Abstract: The present invention concerns an analysis process of a line transfer photosensitive device.The charge-signal and the charge noise transfers from the columns towards the memory have the same duration and are made by using a same training charge, stored in memory, that must be at least sufficient to allow to pass in high inversion at the beginning of the transfer from the columns towards the memory. The transfers of the charge-signal and the charge-noise from the memory towards the read-out register or the drain have the same duration and are made by using training charges at least sufficient to allow to pass in high inversion at the beginning of the transfer. These training charges are read with the charge-signal or collected with the charge-noise.Type: GrantFiled: May 30, 1986Date of Patent: August 4, 1987Assignee: Thomson-CSFInventors: Jean-Luc Berger, Louis Brissot, Yvon Cazaux
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Patent number: 4669055Abstract: A non recursive analog integrator providing M integrations of a sampled analog signal Vn,m. The integrator comprises a series parallel demultiplexer with N outputs, N capacitors each with an electrode connected to a floating potential with respect to a reference potential, and a parallel series multiplexer with N inputs, the respective capacitors being connected in parallel between the outputs of the demultiplexer and the inputs of the multiplexer. Each capacitor performs, at each integration, the summation in form of charges of the sample of corresponding rank of the sampled analog signal Vn,m. So, at the end of the M integrations, an analog signal- ##EQU1## is obtained at the output of the multiplexer. Charge transfer devices serve as the series parallel demultiplexer and as the parallel series multiplexer.Type: GrantFiled: February 26, 1985Date of Patent: May 26, 1987Assignee: Thomson-CSFInventors: Jean Luc Berger, Jean Louis Coutures
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Patent number: 4645938Abstract: The storage capacity of the photosensitive points is increased during the time interval starting after the evacuation of the parasitic charges from the conductive columns to the memory and finishing by the transfer of signal charges from a row of the columns to the memory. Thus, even the overilluminated photosensitive points do not overflow onto the columns.Type: GrantFiled: December 16, 1983Date of Patent: February 24, 1987Assignee: Thomson - CSFInventors: Louis Brissot, Jean-Luc Berger, Yvon Cazaux
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Patent number: 4617595Abstract: In a light sensitive device having an interline transfer structure comprising a photosensitive matrix of N columns of M photosensitive points each photosensitive point of a single column is connected to a stage of a charge transfer shift register that transfers of the charges of the photosensitive points towards reading register perpendicular to the shift registers, the transfer for signal charges Q.sub.S of the photosensitive points towards the corresponding stages of the shift registers being realized by superimposing a drive charge on the signal charges at the level of the photosensitive points at least sufficient for passing into the high inversion range at the beginning of the transfer. The instant process and apparatus are adapted to be used in the field of solid-state imagery.Type: GrantFiled: October 12, 1984Date of Patent: October 14, 1986Assignee: Thomson-CSFInventor: Jean-Luc Berger
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Patent number: 4611234Abstract: The present invention concerns an analysis process of a line transfer photosensitive device.The charge-signal and the charge noise transfers from the columns towards the memory have the same duration and are made by using a same training charge, stored in memory, that must be at least sufficient to allow to pass in high inversion at the beginning of the transfer from the columns towards the memory. The transfers of the charge-signal and the charge-noise from the memory towards the read-out register or the drain have the same duration and are made by using training charges at least sufficient to allow to pass in high inversion at the beginning of the transfer. These training charges are read with the charge-signal or collected with the charge-noise.Type: GrantFiled: December 16, 1983Date of Patent: September 9, 1986Assignee: Thomson-CSFInventors: Jean-Luc Berger, Louis Brissot, Yvon Cazaux
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Patent number: 4603266Abstract: This device comprises a MOS transistor of the tetrode type operating under triode conditions. The storage of charges corresponding to each input voltage sample is realised beneath the MOS capacitor, whose plate is the longer insulating gate of the MOS transistor. The various gates of the transistor are half-rings with an increasing surface area. The diode connected to the input voltage of the device is placed in the center of circles defining the rings. The diode connected to the voltage follower stage supplying the output voltage of the device is positioned on the periphery of the longer insulating gate.Type: GrantFiled: October 12, 1984Date of Patent: July 29, 1986Assignee: Thomson-CSFInventor: Jean Luc Berger
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Patent number: 4506299Abstract: A device for the electric scanning of luminous images. It includes a matrix of N lines and M columns of photosensitive points. A system incorporating a line memory of M points receives in parallel the electric charges supplied by the M points of the same line parasitic charge are removed by diodes. The system insures the injection of the same predetermined quantity of charges between each of the photosensitive points and the output of the device. An output shift register receives in parallel the charges supplied by the line memory and supplies in series a picture scanning electric signal. This device is particularly intended for use in a television camera.Type: GrantFiled: April 13, 1982Date of Patent: March 19, 1985Assignee: Thomson-CSFInventors: Jean-Luc Berger, Patrick Descure
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Patent number: 4430672Abstract: This device incorporates a photosensitive (1) constituted by a matrix of photosensitive points. Each photosensitive point has a charge reading diode D.sub.1. Metallic connections (C.sub.1 to C.sub.4) connect the reading diodes of the same column to a single diode (D.sub.2), followed by a grid G.sub.2 raised to a constant potential (V.sub.2). The operation of the device involves the repetition of two stages, i.e. stage T.sub.1 and stage T.sub.2. During stage T.sub.1 parasitic charges, due for example to too intense illumination, are transferred from diodes D.sub.1 to diodes D.sub.2 and are removed by a diode (D.sub.5). During stage T.sub.2 the signal charges stored by the points of one line of the matrix are transferred into a memory and then into a charge transfer read register (R.sub.2). The register reads these charges during the following stages T.sub.1 and T.sub.2 until the time when the register receives the charges corresponding to the reading of the following line.Type: GrantFiled: February 5, 1981Date of Patent: February 7, 1984Assignee: Thomson CSFInventor: Jean Luc Berger
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Patent number: 4398099Abstract: The switched-capacitance amplifier comprises n capacitors C.sub.11 to C.sub.1n which are periodically switched in parallel and in series, the n parallel-switched capacitors being charged simultaneously by the same voltage V.sub.E. An amplified voltage n.times.V.sub.E is obtained between the end terminals A and B of the n series-switched capacitors. Periodic switching of the n capacitors in parallel and in series is performed by means of MOS transistors T.sub.11 to T.sub.1(2n-1) and T.sub.21 to T.sub.2(n-1) which operate in the switching mode. The n capacitors and the MOS transistors are integrated on the same semiconductor substrate.Type: GrantFiled: May 6, 1982Date of Patent: August 9, 1983Assignee: Thomson-CSFInventors: Roger Benoit-Gonin, Jean-Luc Berger, Jean-Louis Coutures, Daniel Forster, Jean-Edgar Picquendar
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Patent number: 4377760Abstract: An analog device for reading a quantity of electric charge, for example, in a transversal charge transfer filter. The device includes a capacitor and two MOS transistors which are connected in series to the point in the filter where the charge is to be read. The capacitor is connected to the common point of the two transistors which are controlled in phase opposition to insure charging of the capacitor. The capacitor maintains a potential at the charge reading point constant. Any variation in the quantity of charge under an electrode is converted into a variation of potential at the common point and this forms the read signal which is detected by means of a third MOS transistor.Type: GrantFiled: May 22, 1980Date of Patent: March 22, 1983Assignee: Thompson-CSFInventors: Roger Benoit-Gonin, Jean-Luc Berger, Sylvain Fontanes, Jean-Edgar Picquendar
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Patent number: 4355244Abstract: A device for reading a quantity of electric charges arriving at a point B. Two MOS transistors Q2 and Q3 are connected in series and with one terminal to point B. A capacitor C.sub.A is connected to a common point A of the two transistors. A transistor control circuit charges the capacitor C.sub.A from a low potential V.sub.DD. The capacitor C.sub.A and the transistors Q2 and Q3 maintain a constant potential at the point B at the time of charge inflow. This results is a variation of potential at the common point A in accordance with the incoming charges at B. Thus, the variations of potential at point A is a measure of the charges arriving at point B.Type: GrantFiled: June 28, 1979Date of Patent: October 19, 1982Assignee: Thomson-CSFInventors: Roger Benoit-Gonin, Jean-Luc Berger, Jean-Louis Coutures
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Patent number: 4264964Abstract: Packets of charges representing an electrical signal are injected into a semiconductor substrate by injection means comprising a diode and two electrodes. The charge packets are transferred to an output diode with a well-defined time-delay by means of electrodes which are disposed on the substrate and to which periodic transfer potentials are applied. The output diode also receives samples of the signal to be stored and is connected to an inverter which serves to regenerate and transmit the signal to the injection means.Type: GrantFiled: September 14, 1979Date of Patent: April 28, 1981Assignee: Thomson-CSFInventor: Jean-Luc Berger