Abstract: A method and apparatus for determining a read address for received data in a communications network employing virtually concatenated payloads is provided. The method and apparatus comprise determining a minimum write address using a plurality of memory elements and using the minimum write address in connection with received read addresses to determine group read addresses.

Abstract: A method and apparatus for managing memory for time division multiplexed high speed data traffic is provided. The method and apparatus utilize an interleaving approach in association with multiple memory banks, such as within SDRAM, to perform highly efficient data reading and writing. The design issues a first command or access command, such as a read command or write command to one memory bank, followed by an active command to a second memory bank, enabling efficient reading and writing in a multiple data flow environment, such as a SONET/SDH virtual concatenation environment using differential delay compensation.

Abstract: Frames of data comprised of frameword bytes and a payload are processed by identifying a start of a first frame and a phase of the first frame concurrently based on the frameword bytes, and aligning data in a second frame, based on the phase of the first frame, to make a start of the second frame coincide with a start of a byte boundary.

Abstract: A method and apparatus for processing at least two types of payloads received at varying intervals in a communications network using a single processing path is provided. The two types of payloads may include virtually and contiguously concatenated payloads according to SONET/SHD architecture. The method comprises assigning pseudo indices to payloads having no indices associated therewith and providing both sets of payloads, including indices and pseudo indices, to the single processing path.

Abstract: A method and apparatus for providing a virtual output queue (VoQ) from a received set of data packets in a multi-service system. Each packet is divided into at least one partition, including a last partition that includes packet information, such as error status and packet length. The system receives the packet from a flow, parses the packet into partitions, including a first partition and the last partition, places each last partition into a linked list based on a time when the last partition was received, links the last partition to the first partition, and employs the linked list as the output queue. This system allows for rapid compilation and transmission of different sized packets, and obviates the need for the receiving processor to wait for the last partition to discard a bad packet.

Abstract: Techniques are described herein that may be used to buffer traffic received at a communications device. For example, a buffer external from a traffic processor may be used to buffer traffic in ingress or egress directions. For example, a bandwidth in each of directions of to and from the buffer may be less than a sum of maximum bandwidths in ingress and egress directions. For example, a single memory interface may be used to communicatively couple the buffer and the traffic processor.

Abstract: A rate policing algorithm for packet flows is based on counters and threshold checking. The rate policing algorithm utilizes a state machine having four links: (1) compliant state to compliant state; (2) transition from compliant state to non-compliant state; (3) non-compliant state to non-compliant state; and (4) transition from non-compliant state to compliant state. Depending on the values obtained from the counters and utilizing the threshold values, it is determined whether a flow rate for packets is compliant or non-compliant.

Abstract: In a communication system that uses virtually concatenated payloads, techniques to determine when to declare and when to clear alarm indication signal (AIS) for a group. The declaration of AIS for a group may occur based on when declaration of AIS for a member of a group occurs. The clearing of group AIS may occur based on when clearing of AIS by a last member of a group to clear AIS occurs.

Abstract: A method and system for interconnecting multiple distributed components in a communication network is provided. The design includes a multiple order cross connection fabric employed to interconnect multiple orders of data with at least one distributed component in the communication network. The design may further include at least one order of path termination and adaptation connection, where the at least one order of path termination and adaptation connection providing an interface between the multiple order cross connection fabric and a data management system. The design may be implemented in a SONET/SDH environment.

Abstract: Memory access efficiency for packet applications may be improved by transferring full partitions of data. The number of full partitions written to external memory may be increased by temporarily storing packets using on-chip memory that is on a chip with the processor. Before writing packets to external memory, packets of length smaller than the external memory partition size may be temporarily stored in the on-chip memory until an amount corresponding to a full or nearly full partition has been collected, at which point the data can be efficiently written to an external memory partition.

Abstract: The rate-based scheduling for a network application is used to control the bandwidth available to a flow while scheduling the transmission of the flow. The rate-based scheduling uses rate credits to represent the amount of data a flow is permitted to transmit and only permits a flow to transmit if the flow has rate credit available. A flow is permitted to transmit only if the peak packet rate for the scheduler has not been exceeded.

Abstract: Techniques to allocate overhead processing and overhead generation among at least data and overhead processors. The data processor and overhead processor may be provided in separate integrated circuits. The data processor and overhead processor may be provided in separate line cards. Multiple data processors may share use of one or more overhead processors. Payload portions of standardized frames may be used to transfer overhead between the data and overhead processors.

Abstract: Interleaving memory access includes enabling data included in a receive flow of data to be stored in a first memory bank, enabling data included in a transmit flow of data to be stored in a second memory bank, and alternating access of data in the first memory bank with access of data in the second memory bank.

Abstract: A memory is divided into a number of partitions. The partitions are grouped into a first group of partitions and a second group of partitions. When required by a port, a partition is assigned to the port from a pool of un-assigned partitions. The pool of un-assigned partitions comprises of un-assigned partitions from the first group of partitions and un-assigned partitions from the second group of partitions. The un-assigned partitions from the first group of partitions are assigned to the port until a first threshold is reached. The un-assigned partitions from the second group of partitions are assigned to the port after the first threshold is reached. A second threshold is used to limit a total number of partitions assigned to the port.

Abstract: A method and apparatus for managing multiple pointers is provided. Each pointer may be associated with a partition in a partitioned memory, such as DDR SDRAM used in a high speed networking environment. The system and method include a free pointer pool FIFO, wherein a predetermined quantity of pointers is allocated to the free pointer pool FIFO. The system selects one pointer from the free pointer pool FIFO when writing data to one partition in the partitioned memory, and provides one pointer to the free pointer pool FIFO when reading data from one partition in the partitioned memory. The system and method enable self balancing using the free pointer pool FIFO and decreases the number of memory accesses required. The system can be located on chip.

Abstract: A method and apparatus for providing a virtual output queue (VoQ) from a received set of data packets in a multi-service system. Each packet is divided into at least one partition, including a last partition that includes packet information, such as error status and packet length. The system receives the packet from a flow, parses the packet into partitions, including a first partition and the last partition, places each last partition into a linked list based on a time when the last partition was received, links the last partition to the first partition, and employs the linked list as the output queue. This system allows for rapid compilation and transmission of different sized packets, and obviates the need for the receiving processor to wait for the last partition to discard a bad packet.

Abstract: Interleaving memory access includes enabling data included in a receive flow of data to be stored in a first memory bank, enabling data included in a transmit flow of data to be stored in a second memory bank, and alternating access of data in the first memory bank with access of data in the second memory bank.

Abstract: A memory is divided into a number of partitions. The partitions are grouped into a first group of partitions and a second group of partitions. When required by a port, a partition is assigned to the port from a pool of un-assigned partitions. The pool of un-assigned partitions comprises of un-assigned partitions from the first group of partitions and un-assigned partitions from the second group of partitions. The un-assigned partitions from the first group of partitions are assigned to the port until a first threshold is reached. The un-assigned partitions from the second group of partitions are assigned to the port after the first threshold is reached. A second threshold is used to limit a total number of partitions assigned to the port.

Abstract: Network applications may require a guaranteed rate of throughput, which may be accomplished by using buffer memory reservation to manage a data queue used to store incoming packets. Buffer memory reservation reserves a portion of a data queue as a dedicated queue for each flow, reserves another portion of a data queue as a shared queue, and associates a portion of the shared queue with each flow. The amount of the buffer memory reserved by the dedicated queue sizes and the shared queue portion sizes for all of the flows may exceed the amount of physical memory available to buffer incoming packets.

Abstract: Memory access efficiency for packet applications may be improved by transferring full partitions of data. The number of full partitions written to external memory may be increased by temporarily storing packets using on-chip memory that is on a chip with the processor. Before writing packets to external memory, packets of length smaller than the external memory partition size may be temporarily stored in the on-chip memory until an amount corresponding to a full or nearly full partition has been collected, at which point the data can be efficiently written to an external memory partition.