Patents by Inventor Jean-Michel Daga

Jean-Michel Daga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210262777
    Abstract: In one aspect, an angle sensor includes a first linear sensor and a second linear sensor. A first magnetic-field direction of a target magnet measured by the first linear sensor is substantially equal to a second magnetic-field direction of the target magnet measured by the second linear sensor. The first linear sensor, the second linear sensor and the target magnet are on an axis. The angle sensor determines an angle of a magnetic field.
    Type: Application
    Filed: February 25, 2020
    Publication date: August 26, 2021
    Applicant: Allegro MicroSystems, LLC
    Inventors: Rémy Lassalle-Balier, Jean-Michel Daga
  • Publication number: 20210063501
    Abstract: In one aspect, a magnetic field sensor includes a plurality of tunneling magnetoresistance (TMR) elements that includes a first TMR element, a second TMR element, a third TMR element and a fourth TMR element. The first and second TMR elements are connected to a voltage source and the third and fourth TMR elements are connected to ground. Each TMR element has a pillar count of more than one pillar and the pillar count is selected to reduce the angle error below 1.0°.
    Type: Application
    Filed: August 28, 2019
    Publication date: March 4, 2021
    Applicant: ALLEGRO MICROSYSTEMS, LLC
    Inventors: Rémy Lassalle-Balier, Pierre Belliot, Christophe Hoareau, Jean-Michel Daga
  • Publication number: 20210011096
    Abstract: A magnetic field sensor responsive to a movement of a target object can include a plurality of magnetoresistance elements arranged in a line and having a span according to y(1?1/x), where y is equal a full spatial period of the target object and where x is equal to a total quantity of magnetoresistance elements in the plurality of magnetoresistance elements. The plurality of magnetic field sensing elements is operable to generate a signal that is substantially not responsive to the movement of the target object but is responsive to stray external magnetic fields.
    Type: Application
    Filed: July 10, 2019
    Publication date: January 14, 2021
    Applicant: Allegro MicroSystems, LLC
    Inventors: Rémy Lassalle-Balier, Maxime Rioult, Jean-Michel Daga
  • Patent number: 10725066
    Abstract: The present invention relates to an interface circuit for a capacitive accelerometer sensor for measuring an acceleration value sensed by the sensor. The interface circuit comprises a plurality of electrical switches and three programmable capacitors. Two of the programmable capacitors are arranged to implement gain trimming of the interface circuit, while one of the programmable capacitors is arranged to implement acceleration range selection.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: July 28, 2020
    Assignee: EM Microeletronic-Marin SA
    Inventors: Yonghong Tao, Sylvain Grosjean, Jean-Michel Daga
  • Patent number: 10564176
    Abstract: A capacitive accelerometer for measuring an acceleration value is provided, including a first and a second electrode; a third mobile electrode arranged therebetween, and forming with the first electrode a first capacitor, and with the second electrode a second capacitor, the third electrode being displaced when the accelerometer is subject to acceleration and generates a capacitance difference value transformable to electrical charges; a first and a second voltage source configured to selectively apply first and second voltages to the first and the second electrodes, respectively, and a third voltage to the third electrode, and to generate electrostatic forces acting on the third electrode, the first, second and/or third voltages applied during electrical charge transfers for collecting the electrical charges to measure the acceleration; and an electrostatic force compensator to compensate for missing electrostatic forces due to a modified charge transfer rate, a compensation amount dependent on the modified
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: February 18, 2020
    Assignee: EM Microelectronic-Marin SA
    Inventors: Sylvain Grosjean, Yonghong Tao, Jean-Michel Daga
  • Publication number: 20180364275
    Abstract: The present invention relates to an interface circuit for a capacitive accelerometer sensor for measuring an acceleration value sensed by the sensor. The interface circuit comprises a plurality of electrical switches and three programmable capacitors. Two of the programmable capacitors are arranged to implement gain trimming of the interface circuit, while one of the programmable capacitors is arranged to implement acceleration range selection.
    Type: Application
    Filed: June 6, 2018
    Publication date: December 20, 2018
    Applicant: EM Microelectronic-Marin SA
    Inventors: Yonghong Tao, Sylvain Grosjean, Jean-Michel Daga
  • Publication number: 20180143219
    Abstract: The present invention concerns a capacitive accelerometer for measuring an acceleration value. The accelerometer comprises: a first electrode; a second electrode; a third, mobile electrode arranged between the first and second electrodes, and forming with the first electrode a first capacitor with a first capacitance value, and with the second electrode a second capacitor with a second capacitance value, the third electrode being arranged to be displaced when the capacitive accelerometer is subject to acceleration thereby arranged to generate a capacitance difference value between the first and second capacitances transformable to electrical charges; a first voltage source and a second voltage source for selectively applying a first voltage value to the first electrode, a second voltage value to the second electrode and a third voltage value to the third electrode, and arranged to generate electrostatic forces acting on the third electrode.
    Type: Application
    Filed: November 7, 2017
    Publication date: May 24, 2018
    Applicant: EM Microelectronic-Marin SA
    Inventors: Sylvain GROSJEAN, Yonghong TAO, Jean-Michel DAGA
  • Patent number: 9767034
    Abstract: The present invention concerns a method of operating a first-in first-out memory (9) arranged to store measurement data samples measured by a plurality of data measurement sensors (1, 3, 5), which can operate at various sampling rates. The oldest measurement data sample in the memory (9) is arranged to be read first before the newer measurement data samples. The method comprises: receiving measurement data samples from at least two data measurement sensors (1, 3, 5); and saving the received measurement data samples in the memory (9). Each of the measurement data samples saved in the memory is associated with a tag which is also saved in the memory (9) and which identifies the data measurement sensor (1, 3, 5) which measured the respective measurement data sample.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: September 19, 2017
    Assignee: EM MICROELECTRONIC-MARIN SA
    Inventors: Jean-Michel Daga, Alexandre Deschildre
  • Patent number: 9759581
    Abstract: The electronic measurement circuit comprises a measurement sensor with two differential mounted capacitors each comprising a fixed electrode, and a common electrode arranged to move relative to the fixed capacitor electrode to alter the capacitive value when the physical parameter is measured.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: September 12, 2017
    Assignee: EM MIRCOELECTRONIC MARIN S.A.
    Inventors: Christophe Entringer, Luca Rossi, Sylvain Grosjean, Jean-Michel Daga
  • Publication number: 20160245672
    Abstract: The electronic measurement circuit comprises a measurement sensor with two differential mounted capacitors each comprising a fixed electrode, and a common electrode arranged to move relative to the fixed capacitor electrode to alter the capacitive value when the physical parameter is measured.
    Type: Application
    Filed: January 14, 2016
    Publication date: August 25, 2016
    Applicant: EM MICROELECTRONIC MARIN S.A.
    Inventors: Christophe ENTRINGER, Luca ROSSI, Sylvain GROSJEAN, Jean-Michel DAGA
  • Publication number: 20150331805
    Abstract: The present invention concerns a method of operating a first-in first-out memory (9) arranged to store measurement data samples measured by a plurality of data measurement sensors (1, 3, 5), which can operate at various sampling rates. The oldest measurement data sample in the memory (9) is arranged to be read first before the newer measurement data samples. The method comprises: receiving measurement data samples from at least two data measurement sensors (1, 3, 5); and saving the received measurement data samples in the memory (9). Each of the measurement data samples saved in the memory is associated with a tag which is also saved in the memory (9) and which identifies the data measurement sensor (1, 3, 5) which measured the respective measurement data sample.
    Type: Application
    Filed: May 11, 2015
    Publication date: November 19, 2015
    Applicant: EM MICROELECTRONIC-MARIN SA
    Inventors: Jean-Michel DAGA, Alexandre DESCHILDRE
  • Patent number: 8964479
    Abstract: Techniques for sensing a semiconductor memory device are disclosed. In one embodiment, the techniques may be realized as a semiconductor memory device comprising a plurality of memory cells arranged in an array of rows and columns and data sense amplifier circuitry coupled to at least one of the plurality of memory cells. The data sense amplifier circuitry may comprise first amplifier circuitry and resistive circuitry, wherein the first amplifier circuitry and the resistive circuitry may form a feedback loop.
    Type: Grant
    Filed: November 4, 2013
    Date of Patent: February 24, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Jean-Michel Daga
  • Publication number: 20140055201
    Abstract: Techniques for sensing a semiconductor memory device are disclosed. In one embodiment, the techniques may be realized as a semiconductor memory device comprising a plurality of memory cells arranged in an array of rows and columns and data sense amplifier circuitry coupled to at least one of the plurality of memory cells. The data sense amplifier circuitry may comprise first amplifier circuitry and resistive circuitry, wherein the first amplifier circuitry and the resistive circuitry may form a feedback loop.
    Type: Application
    Filed: November 4, 2013
    Publication date: February 27, 2014
    Applicant: Micron Technology, Inc.
    Inventor: Jean-Michel DAGA
  • Patent number: 8576631
    Abstract: Techniques for sensing a semiconductor memory device are disclosed. In one particular exemplary embodiment, the technique(s) may be realized as a semiconductor memory device comprising a plurality of memory cells arranged in an array of rows and columns and data sense amplifier circuitry coupled to at least one of the plurality of memory cells. The data sense amplifier circuitry may comprise first amplifier circuitry and resistive circuitry, wherein the first amplifier circuitry and the resistive circuitry may form a feedback loop.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: November 5, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Jean-Michel Daga
  • Patent number: 8416636
    Abstract: Techniques for controlling a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for controlling a semiconductor memory device including applying a plurality of voltage potentials to a plurality of memory cells arranged in an array of rows and columns.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: April 9, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Eric S. Carman, Philippe Bruno Bauser, Jean-Michel Daga
  • Patent number: 8214729
    Abstract: A method for detecting and correcting errors in a memory having a read/write paradigm is presented. In these implementations, various approaches to detect errors on a per word or per group of words basis and correct errors on a per group of words or per page basis, respectively, in relation to a memory and its associated differing read/write operations, are provided. For instance, in one implementation, errors are detected on a per word basis and corrected on a per page basis for a NOR Flash Memory having differing read/write operations of reading on a per word basis and writing on a per page basis. Advantageously, benefits of the various implementations include reduced encoder/decoder complexities, reduced parity overhead requirements, and reduced performance degradation.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: July 3, 2012
    Assignee: Atmel Rousset S.A.S.
    Inventors: Godard Benoit, Jean Michel Daga
  • Patent number: 8199595
    Abstract: Techniques for sensing a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus including a memory cell array comprising a plurality of memory cells. The apparatus may also include a first data sense amplifier circuitry including an amplifier transistor having a first region coupled to at least one of the plurality of memory cells via a bit line. The apparatus may further include a data sense amplifier latch circuitry including a first input node coupled to the data sense amplifier circuitry via a second region of the amplifier transistor.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: June 12, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Philippe Bruno Bauser, Jean-Michel Daga
  • Publication number: 20120096334
    Abstract: A method for detecting and correcting errors in a memory having a read/write paradigm is presented. In these implementations, various approaches to detect errors on a per word or per group of words basis and correct errors on a per group of words or per page basis, respectively, in relation to a memory and its associated differing read/write operations, are provided. For instance, in one implementation, errors are detected on a per word basis and corrected on a per page basis for a NOR Flash Memory having differing read/write operations of reading on a per word basis and writing on a per page basis. Advantageously, benefits of the various implementations include reduced encoder/decoder complexities, reduced parity overhead requirements, and reduced performance degradation.
    Type: Application
    Filed: December 22, 2011
    Publication date: April 19, 2012
    Applicant: ATMEL CORPORATION
    Inventors: Benoit Godard, Jean Michel Daga
  • Patent number: 8112699
    Abstract: A method for detecting and correcting errors in a memory having a read/write paradigm is presented. In these implementations, various approaches to detect errors on a per word or per group of words basis and correct errors on a per group of words or per page basis, respectively, in relation to a memory and its associated differing read/write operations, are provided. For instance, in one implementation, errors are detected on a per word basis and corrected on a per page basis for a NOR Flash Memory having differing read/write operations of reading on a per word basis and writing on a per page basis. Advantageously, benefits of the various implementations include reduced encoder/decoder complexities, reduced parity overhead requirements, and reduced performance degradation.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: February 7, 2012
    Assignee: Atmel Rousset S.A.S.
    Inventors: Benoit Godard, Jean Michel Daga
  • Publication number: 20110216617
    Abstract: Techniques for sensing a semiconductor memory device are disclosed. In one particular exemplary embodiment, the technique(s) may be realized as a semiconductor memory device comprising a plurality of memory cells arranged in an array of rows and columns and data sense amplifier circuitry coupled to at least one of the plurality of memory cells. The data sense amplifier circuitry may comprise first amplifier circuitry and resistive circuitry, wherein the first amplifier circuitry and the resistive circuitry may form a feedback loop.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 8, 2011
    Applicant: Innovative Silicon ISi SA
    Inventor: Jean-Michel Daga