Abstract: In a first method of erasing a resistive memory device, an electrical potential is applied to the gate of a transistor in series with the resistive memory device, and successive increasing currents are provided through the resistive memory device by means of providing successive increasing electrical potentials across the resistive memory device. In a second method of erasing a resistive memory device, an electrical potential is applied across the resistive memory device, and successive increasing currents are provided through the resistive memory device by means of providing successive increasing electrical potentials to the gate of a transistor in series with the resistive memory device.

Abstract: In a first method of writing data to a resistive memory device (i.e. programming or erasing), successive electrical potentials are applied across the resistive memory device, wherein the successive electrical potentials are of increasing duration. In another method of writing data to a resistive memory device (i.e. programming or erasing), an electrical potential is applied across the resistive memory device, and the level of current through the memory device is sensed as the electrical potential is applied. The application of the electrical potential is ended based on a selected level of current through the resistive memory device.

Abstract: Optical network interface systems and devices are described.

Abstract: Systems and methods are disclosed that facilitate extending data retention time in a data retention device, such as a nanoscale resistive memory cell array, via assessing a resistance level in a tracking element associated with the memory array and refreshing the memory array upon a determination that the resistance of the tracking element has reached or exceeded a predetermined reference threshold resistance value. The tracking element can be a memory cell within the array itself and can have an initial resistance value that is substantially higher than an initial resistance value for a programmed memory cell in the array, such that resistance increase in the tracking cell will cause the tracking cell to reach the threshold value and trigger refresh of the array before data corruption/loss occurs in the core memory cells.

Abstract: Systems and methods are disclosed that facilitate extending data retention time in a data retention device, such as a nanoscale resistive memory cell array, via assessing a resistance level in a tracking element associated with the memory array and refreshing the memory array upon a determination that the resistance of the tracking element has reached or exceeded a predetermined reference threshold resistance value. The tracking element can be a memory cell within the array itself and can have an initial resistance value that is substantially higher than an initial resistance value for a programmed memory cell in the array, such that resistance increase in the tracking cell will cause the tracking cell to reach the threshold value and trigger refresh of the array before data corruption/loss occurs in the core memory cells.

Abstract: In the method of fabricating a metal-insulator-metal (MIM) device, a first electrode of ?-Ta is provided. The Ta of the first electrode is oxidized to form a Ta2O5 layer on the first electrode. A second electrode of ?-Ta is provided on the Ta2O5 layer. Such a device exhibits strong data retention, along with resistance to performance degradation under high temperatures.

Abstract: In a first method of writing data to a resistive memory device (i.e. programming or erasing), successive electrical potentials are applied across the resistive memory device, wherein the successive electrical potentials are of increasing duration. In another method of writing data to a resistive memory device (i.e. programming or erasing), an electrical potential is applied across the resistive memory device, and the level of current through the memory device is sensed as the electrical potential is applied. The application of the electrical potential is ended based on a selected level of current through the resistive memory device.

Abstract: In a first method of erasing a resistive memory device, an electrical potential is applied to the gate of a transistor in series with the resistive memory device, and successive increasing currents are provided through the resistive memory device by means of providing successive increasing electrical potentials across the resistive memory device. In a second method of erasing a resistive memory device, an electrical potential is applied across the resistive memory device, and successive increasing currents are provided through the resistive memory device by means of providing successive increasing electrical potentials to the gate of a transistor in series with the resistive memory device.

Abstract: In the method of fabricating a metal-insulator-metal (MIM) device, a first electrode of ?-Ta is provided. The Ta of the first electrode is oxidized to form a Ta2O5 layer on the first electrode. A second electrode of ?-Ta is provided on the Ta2O5 layer. Such a device exhibits strong data retention, along with resistance to performance degradation under high temperatures.

Abstract: Encrypted email message structures can contain recipient information that can reveal, to any recipient, all of the other recipients of an email message. Because some recipients, such as recipients to whom the message was “blind carbon-copied”, should remain hidden from the other recipients, individual encrypted messages can be created. One encrypted message can be created for all of the recipients who are intended to be revealed, such as the recipients listed in the TO and CC fields of an email header. A second encrypted message can be created for all of the recipients of the message who are intended to be hidden, such as the recipient listed in the BCC field of an email header. Alternatively, multiple encrypted messages can be created individually for each recipient in the BCC field, if the BCC recipients are to be hidden even from other BCC recipients.

Abstract: In the present method of programming a memory device from an erased state, the memory device includes first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrodes. In the programming method, (i) an electrical potential is applied across the first and second electrodes from higher to lower potential in one direction to reduce the resistance of the memory device, and (ii) an electrical potential is applied across the first and second electrodes from higher to lower potential in the other direction to further reduce the resistance of the memory device.

Abstract: Optical network interface systems and devices are described.

Abstract: Encrypted email message structures can contain recipient information that can reveal, to any recipient, all of the other recipients of an email message. Because some recipients, such as recipients to whom the message was “blind carbon-copied”, should remain hidden from the other recipients, individual encrypted messages can be created. One encrypted message can be created for all of the recipients who are intended to be revealed, such as the recipients listed in the TO and CC fields of an email header. A second encrypted message can be created for all of the recipients of the message who are intended to be hidden, such as the recipient listed in the BCC field of an email header. Alternatively, multiple encrypted messages can be created individually for each recipient in the BCC field, if the BCC recipients are to be hidden even from other BCC recipients.

Abstract: An apparatus for tracing the locations of a line segment moving across a planar tablet is disclosed in the present invention, which includes a microprocessor, a positioning coil driving circuit, a plurality of positioning coils, a planar sampling circuit, a coordinate acquisition circuit and a counting circuit for the purpose of determining the location of a line segment relative to the planar tablet at a given time instant. A location of the line segment is determined by energizing a pair of positioning coils, each representing an end of the line segment, alternately and thereby achieving positional coordinates of these two ends. Repeating of such positioning operation results in a trace of the trajectory of movement of the line segment. A simple and effective position compensation method for offsetting the positioning error when locations of a physically installed or logically perceptible line object, instead of the line segment pointed by the two positioning coils, are to be traced.

Abstract: The invention constitutes a telephony based electronic voice greeting card service embodied within an adjunct processing system communicatively connected to a toll switching office of a public switched telephone network. The voice card system comprises a service controller, a storage node, an attendant controller and attendant services. The service controller is responsible for automatic processing of incoming and outgoing calls to provide the functionality for capturing new voice card messages, delivering voice card messages and status query of previously captured messages. The storage node provides a database of captured voice card message records, and the attendant controller in conjunction with the attendant services function to provide manual assistance to users. The voice card system allows a person, through use of a telephone, to create customized audio greeting cards by accessing various greetings through a comprehensive menu interface.