Abstract: In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.

Abstract: Some embodiments include a transmitter having a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.

Abstract: Embodiments of the present invention are directed to a dual-reference delay-locked loop that includes a first delay element that delays a clock signal. The rising phase and the falling phase of the delayed clock signal are used as a first and a second reference phases, respectively, for a phase detector. A second delay element delays the first reference signal with a tracking phase that centers between the two reference phases. The phase detector detects a difference between the average of the reference phases and the tracking or resultant phase and outputs a difference signal that biases the delay elements to slew to the left or the right so that the resultant phase is centered between the reference phases corresponding to the rising and falling edges of the incoming clock.

Abstract: Some embodiments include a transmitter having a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.

Abstract: In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.

Abstract: A system may include biasing of diodes of a temperature sensor disposed in an integrated circuit die using a current from an off-die current source, generation of a voltage based on the current and a temperature of the integrated circuit die, and determination of a first temperature based on the voltage. Such a system may further include amplification of the voltage using an oscillator and a chopper stabilizer, determination of a first amplified voltage associated with a first state of the oscillator and a second amplified voltage associated with a second state of the oscillator, and determination of a third voltage based on the first amplified voltage and the second amplified voltage, wherein determination of the first temperature based on the voltage comprises determination of the first temperature based on the third voltage.

Abstract: A system may include biasing of diodes of a temperature sensor disposed in an integrated circuit die using a current from an off-die current source, generation of a voltage based on the current and a temperature of the integrated circuit die, and determination of a first temperature based on the voltage. Such a system may further include amplification of the voltage using an oscillator and a chopper stabilizer, determination of a first amplified voltage associated with a first state of the oscillator and a second amplified voltage associated with a second state of the oscillator, and determination of a third voltage based on the first amplified voltage and the second amplified voltage, wherein determination of the first temperature based on the voltage comprises determination of the first temperature based on the third voltage.

Abstract: A system may include biasing of diodes of a temperature sensor disposed in an integrated circuit die using a current from an off-die current source, generation of a voltage based on the current and a temperature of the integrated circuit die, and determination of a first temperature based on the voltage. Such a system may further include amplification of the voltage using an oscillator and a chopper stabilizer, determination of a first amplified voltage associated with a first state of the oscillator and a second amplified voltage associated with a second state of the oscillator, and determination of a third voltage based on the first amplified voltage and the second amplified voltage, wherein determination of the first temperature based on the voltage comprises determination of the first temperature based on the third voltage.

Abstract: Thermal control for a controller in a data processing environment is described. In one embodiment, the invention includes detecting a temperature of a semiconductor device at a thermal sensor on the semiconductor device, comparing the detected temperature to a threshold, and generating a high interrupt if the temperature is above the threshold and a low interrupt if the temperature is below the threshold.

Abstract: In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.

Abstract: A system may include biasing of diodes of a temperature sensor disposed in an integrated circuit die using a current from an off-die current source, generation of a voltage based on the current and a temperature of the integrated circuit die, and determination of a first temperature based on the voltage. Such a system may further include amplification of the voltage using an oscillator and a chopper stabilizer, determination of a first amplified voltage associated with a first state of the oscillator and a second amplified voltage associated with a second state of the oscillator, and determination of a third voltage based on the first amplified voltage and the second amplified voltage, wherein determination of the first temperature based on the voltage comprises determination of the first temperature based on the third voltage.

Abstract: In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.

Abstract: In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.

Abstract: In some embodiments, a transmitter includes first encoding controlled frequency output circuitry to creates a magnitude encoded controlled frequency signal (CFS) and second encoding controlled frequency output circuitry to create a complementary a magnitude encoded controlled frequency signal (CCFS). Other embodiments are described and claimed.

Abstract: In some embodiments, a receiver includes a first conductor to carry a magnitude encoded controlled frequency signal (CFS) and a second conductor to carry a complementary magnitude encoded controlled frequency signal (CCFS). The receiver further includes circuitry to receive the CFS and CCFS from the first and second conductors and to decode them to produce an output signal. Other embodiments are described and claimed.

Abstract: An output stage for a differential amplifier is presented. If the differential amplifier is a matched current differential amplifier where the non-inverted and inverted differentials have the same current, the output stages of the present invention may provide optimum gain to the differentials in a single output voltage.

Abstract: In some embodiments, a receiver includes a first conductor to carry a magnitude encoded controlled frequency signal (CFS) and a second conductor to carry a complementary magnitude encoded controlled frequency signal (CCFS). The receiver further includes circuitry to receive the CFS and CCFS from the first and second conductors and to decode them to produce an output signal. Other embodiments are described and claimed.

Abstract: In some embodiments, a transmitter includes first encoding controlled frequency output circuitry to creates a magnitude encoded controlled frequency signal (CFS) and second encoding controlled frequency output circuitry to create a complementary a magnitude encoded controlled frequency signal (CCFS). Other embodiments are described and claimed.

Abstract: A VCO includes a non-inverting output and an inverting output coupled to symmetrical circuitry configured to produce an oscillating output at the outputs. The symmetrical circuitry can include, for example, matched devices such as voltage-controlled resistors (VCRs) and capacitors. The symmetrical circuitry coupled to the non-inverting output and inverting output results in a stable output that operates close to the optimal 50% duty cycle independent of frequency and across a wide range of frequencies. In an alternative embodiment, the VCO further includes an output differential amplifier having its non-inverting input coupled to the non-inverting output and its inverting input coupled to the inverting output. The VCO according to this embodiment exhibits higher gain and a stable output that operates close to the optimal 50% duty cycle independent of frequency and across a wide range of frequencies.

Abstract: An output stage for a differential amplifier is presented. If the differential amplifier is a matched current differential amplifier where the non-inverted and inverted differentials have the same current, the output stages of the present invention may provide optimum gain to the differentials in a single output voltage.