Patents by Inventor Jed D. Griffin

Jed D. Griffin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020084861
    Abstract: A VCO includes a non-inverting output and an inverting output coupled to symmetrical circuitry configured to produce an oscillating output at the outputs. The symmetrical circuitry can include, for example, matched devices such as voltage-controlled resistors (VCRs) and capacitors. The symmetrical circuitry coupled to the non-inverting output and inverting output results in a stable output that operates close to the optimal 50% duty cycle independent of frequency and across a wide range of frequencies. In an alternative embodiment, the VCO further includes an output differential amplifier having its non-inverting input coupled to the non-inverting output and its inverting input coupled to the inverting output. The VCO according to this embodiment exhibits higher gain and a stable output that operates close to the optimal 50% duty cycle independent of frequency and across a wide range of frequencies.
    Type: Application
    Filed: December 29, 2000
    Publication date: July 4, 2002
    Inventor: Jed D. Griffin
  • Patent number: 6137317
    Abstract: A CMOS input/output driver having constant output impedance, the driver comprising a drive pMOSFET and a drive nMOSFET for driving an output node HIGH and LOW, an pMOSFET having a drain coupled to the output node and switchable so that its gate is coupled to the output node when the drive pMOSFET is driving the output node HIGH, and an nMOSFET having a drain coupled to the output node and switchable so that its gate is coupled to the output node when the drive nMOSFET is driving the output node LOW. The betas of the drive pMOSFET, the drive nMOSFET, the pMOSFET, and the nMOSFET are matched so that the output impedance of the drive is approximately independent of the output node voltage.
    Type: Grant
    Filed: July 1, 1998
    Date of Patent: October 24, 2000
    Assignee: Intel Corporation
    Inventor: Jed D. Griffin