Patents by Inventor Jeff McKee

Jeff McKee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090169153
    Abstract: A device and method for providing an optical guide of a pixel to guide incoming light to/from a photo-conversion device of the pixel to improve the optical crosstalk immunity. The optical guide includes an optically reflecting barrier formed as a trench filled with a material which produces reflection. The trench fill material may have an index of refraction that is less than the index of refraction of the material used for the trench surrounding layers to provide a light reflective structure or the trench fill material may provide a reflection surface.
    Type: Application
    Filed: February 26, 2009
    Publication date: July 2, 2009
    Inventors: Ji Soo Lee, Jeff A. Mckee, Chandra Mouli
  • Patent number: 7531379
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: May 12, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Howard Rhodes, Jeff Mckee
  • Patent number: 7525134
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: April 28, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Howard Rhodes, Jeff McKee
  • Patent number: 7511257
    Abstract: A device and method for providing an optical guide of a pixel to guide incoming light to/from a photo-conversion device of the pixel to improve the optical crosstalk immunity. The optical guide includes an optically reflecting barrier formed as a trench filled with a material which produces reflection. The trench fill material may have an index of refraction that is less than the index of refraction of the material used for the trench surrounding layers to provide a light reflective structure or the trench fill material may provide a reflection surface.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: March 31, 2009
    Assignee: Aptina Imaging Corporation
    Inventors: Ji Soo Lee, Jeff A. Mckee, Chandra Mouli
  • Publication number: 20090004794
    Abstract: The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. By exposing the etched gate stack to elevated temperatures and a dilute steam ambient, additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. In the preferred embodiment, the interface is formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability due to enhanced charge transfer along grain boundaries. At the same time, oxide in an upper storage dielectric layer (oxide-nitride-oxide or ONO) is enhanced in the dilute steam oxidation.
    Type: Application
    Filed: September 4, 2008
    Publication date: January 1, 2009
    Applicant: Micron Technology, Inc.
    Inventors: Ronald A. Weimer, Don C. Powell, John T. Moore, Jeff A. McKee
  • Patent number: 7432546
    Abstract: The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. By exposing the etched gate stack to elevated temperatures and a dilute steam ambient, additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. In the preferred embodiment, the interface is formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability due to enhanced charge transfer along grain boundaries. At the same time, oxide in an upper storage dielectric layer (oxide-nitride-oxide or ONO) is enhanced in the dilute steam oxidation.
    Type: Grant
    Filed: August 17, 2005
    Date of Patent: October 7, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Ronald A. Weimer, Don C. Powell, John T. Moore, Jeff A. McKee
  • Publication number: 20080011942
    Abstract: A photodiode has a photodiode gate structure on the surface of the substrate. The photodiode may be located in a pixel sensor cell comprising a substrate having a first surface level. The photodiode has a first doped region of a first conductivity type and a second doped region of a second conductivity type located beneath the first surface level of the substrate. A photodiode gate is formed of a first dielectric substance layer formed over the first surface of the substrate, thereby forming a second surface, and a second polysilicon layer formed over the second surface of the first layer. A transistor is located adjacent to the photodiode. The photodiode gate improves charge transfer from the photodiode to the transfer gate and floating diffusion region. The improved charge transfer minimizes image lag and leakage and reduces energy barriers.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 17, 2008
    Inventors: Sungkwon Hong, Jeff McKee
  • Publication number: 20070272830
    Abstract: An imaging system includes a pixel that does not require a row select transistor. Instead, an operating voltage is selectively provided to the pixel's readout circuitry, and the readout circuitry provides output signals based on charge or voltage of a storage node. The operating voltage can be selectively provided to each row of a pixel array by a row driver. Each pixel includes a source follower transistor that provides an output signal on a column output line for readout. An anti-blooming transistor may be linked to each pixel's photosensor to provide an overflow path for electrons during charge integration, prior to transfer of charge to the pixel's storage node by a transfer transistor. Electrons not produced by an image are introduced to the photosensor prior to image acquisition, filling traps in the photosensor to reduce image degradation.
    Type: Application
    Filed: August 3, 2007
    Publication date: November 29, 2007
    Inventors: Peter Altice, Jeffrey Bruce, Jeff McKee, Joey Shah, Richard Mauritzson
  • Patent number: 7253392
    Abstract: A photodiode has a photodiode gate structure on the surface of the substrate. The photodiode may be located in a pixel sensor cell comprising a substrate having a first surface level. The photodiode has a first doped region of a first conductivity type and a second doped region of a second conductivity type located beneath the first surface level of the substrate. A photodiode gate is formed of a first dielectric substance layer formed over the first surface of the substrate, thereby forming a second surface, and a second polysilicon layer formed over the second surface of the first layer. A transistor is located adjacent to the photodiode. The photodiode gate improves charge transfer from the photodiode to the transfer gate and floating diffusion region. The improved charge transfer minimizes image lag and leakage and reduces energy barriers.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: August 7, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Sungkwon (Chris) Hong, Jeff A. McKee
  • Publication number: 20070102624
    Abstract: An imaging system includes a pixel that does not require a row select transistor. Instead, an operating voltage is selectively provided to the pixel's readout circuitry, and the readout circuitry provides output signals based on charge or voltage of a storage node. The operating voltage can be selectively provided to each row of a pixel array by a row driver. Each pixel includes a source follower transistor that provides an output signal on a column output line for readout. An anti-blooming transistor may be linked to each pixel's photosensor to provide an overflow path for electrons during charge integration, prior to transfer of charge to the pixel's storage node by a transfer transistor. Electrons not produced by an image are introduced to the photosensor prior to image acquisition, filling traps in the photosensor to reduce image degradation.
    Type: Application
    Filed: December 22, 2006
    Publication date: May 10, 2007
    Inventors: Peter Altice, Jeffrey Bruce, Jeff McKee, Joey Shah, Richard Mauritzson
  • Patent number: 7196304
    Abstract: An imaging system includes a pixel that does not require a row select transistor. Instead, an operating voltage is selectively provided to the pixel's readout circuitry, and the readout circuitry provides output signals based on charge or voltage of a storage node. The operating voltage can be selectively provided to each row of a pixel array by a row driver. Each pixel includes a source follower transistor that provides an output signal on a column output line for readout. An anti-blooming transistor may be linked to each pixel's photosensor to provide an overflow path for electrons during charge integration, prior to transfer of charge to the pixel's storage node by a transfer transistor. Electrons not produced by an image are introduced to the photosensor prior to image acquisition, filling traps in the photosensor to reduce image degradation.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: March 27, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Peter P. Altice, Jr., Jeffrey Bruce, Jeff A. Mckee, Joey Shah, Richard A. Mauritzson
  • Publication number: 20070045680
    Abstract: Imager devices having an array of photosensors, each photosensor having at least two doped regions. The two doped regions are each independently tailored to a particular wavelength.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 1, 2007
    Inventors: John Ladd, Inna Patrick, Gennadiy Agranov, Jeff McKee
  • Publication number: 20070045511
    Abstract: A device and method for providing an optical guide of a pixel to guide incoming light to/from a photo-conversion device of the pixel to improve the optical crosstalk immunity. The optical guide includes an optically reflecting barrier formed as a trench filled with a material which produces reflection. The trench fill material may have an index of refraction that is less than the index of refraction of the material used for the trench surrounding layers to provide a light reflective structure or the trench fill material may provide a reflection surface.
    Type: Application
    Filed: August 24, 2005
    Publication date: March 1, 2007
    Inventors: Ji Lee, Jeff Mckee, Chandra Mouli
  • Patent number: 7176434
    Abstract: An imaging system includes a pixel that does not require a row select transistor. Instead, an operating voltage is selectively provided to the pixel's readout circuitry, and the readout circuitry provides output signals based on charge or voltage of a storage node. The operating voltage can be selectively provided to each row of a pixel array by a row driver. Each pixel includes a source follower transistor that provides an output signal on a column output line for readout. An anti-blooming transistor may be linked to each pixel's photosensor to provide an overflow path for electrons during charge integration, prior to transfer of charge to the pixel's storage node by a transfer transistor. Electrons not produced by an image are introduced to the photosensor prior to image acquisition, filling traps in the photosensor to reduce image degradation.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: February 13, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Peter P. Altice, Jr., Jeffrey Bruce, Jeff A. Mckee, Joey Shah, Richard A. Mauritzson
  • Publication number: 20060273352
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Application
    Filed: July 19, 2006
    Publication date: December 7, 2006
    Inventors: Howard Rhodes, Jeff McKee
  • Patent number: 7102180
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: September 5, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Howard Rhodes, Jeff McKee
  • Publication number: 20060065814
    Abstract: An imaging system includes a pixel that does not require a row select transistor. Instead, an operating voltage is selectively provided to the pixel's readout circuitry, and the readout circuitry provides output signals based on charge or voltage of a storage node. The operating voltage can be selectively provided to each row of a pixel array by a row driver. Each pixel includes a source follower transistor that provides an output signal on a column output line for readout. An anti-blooming transistor may be linked to each pixel's photosensor to provide an overflow path for electrons during charge integration, prior to transfer of charge to the pixel's storage node by a transfer transistor. Electrons not produced by an image are introduced to the photosensor prior to image acquisition, filling traps in the photosensor to reduce image degradation.
    Type: Application
    Filed: November 3, 2005
    Publication date: March 30, 2006
    Inventors: Peter Altice, Jeffrey Bruce, Jeff Mckee, Joey Shah, Richard Mauritzson
  • Publication number: 20060011969
    Abstract: The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in contact with a silicon layer, defining an oxide-silicon interface therebetween. By exposing the etched gate stack to elevated temperatures and a dilute steam ambient, additional oxide material is formed substantially uniformly along the oxide-silicon interface. Polysilicon grain boundaries at the interface are thereby passivated after etching. In the preferred embodiment, the interface is formed between a tunnel oxide and a floating gate, and passivating the grain boundaries reduces erase variability due to enhanced charge transfer along grain boundaries. At the same time, oxide in an upper storage dielectric layer (oxide-nitride-oxide or ONO) is enhanced in the dilute steam oxidation.
    Type: Application
    Filed: August 17, 2005
    Publication date: January 19, 2006
    Inventors: Ronald Weimer, Don Powell, John Moore, Jeff McKee
  • Publication number: 20050258457
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Application
    Filed: June 24, 2005
    Publication date: November 24, 2005
    Inventors: Howard Rhodes, Jeff McKee
  • Patent number: 6960796
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: November 1, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Howard Rhodes, Jeff McKee