Patents by Inventor Jeff Nause

Jeff Nause has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070126015
    Abstract: A semi-insulating zinc-oxide (ZnO) single crystal. The crystal has resistivity of at least 1.5×103 ohm-centimeter (?-cm). The ZnO crystal can be produced from a melt contained by solid-phase ZnO to prevent introduction of undesired impurities into the crystal. The crystal can be a bulk single crystal that is cut and processed into wafer form of specified thickness. A dopant in a concentration ranging from 1×1015 atoms per cubic centimeter (atoms/cc) to 5×1021 atoms/cc can increase resistivity of the crystal relative to intrinsic ZnO. The dopant can be lithium (Li), sodium (Na), copper (Cu), nitrogen (N), phosphorus (P), and/or manganese (Mn).
    Type: Application
    Filed: February 6, 2007
    Publication date: June 7, 2007
    Applicant: Cermet, Inc.
    Inventors: Jeff Nause, William Nemeth
  • Publication number: 20070102723
    Abstract: A light-emitting zinc oxide based compound semiconductor device of a double-heterostructure. The double-heterostructure includes a light-emitting layer formed of a low-resistivity Mg1-x-yCdxZnyO; 0?x<1, 0<y?1, and x+y=0.1 to 1 compound semiconductor doped with p-type and/or n-type impurity. A first clad layer is joined to one surface of the light-emitting layer and formed of an n-type zinc oxide compound semiconductor having a composition different from the light-emitting layer. A second clad layer is joined to another surface of the light-emitting layer and formed of a low-resistivity, p-type zinc oxide based semiconductor having a composition different from the light-emitting layer.
    Type: Application
    Filed: December 29, 2006
    Publication date: May 10, 2007
    Applicant: CERMET, INC.
    Inventors: Jeff Nause, Shanthi Ganesan
  • Patent number: 7105868
    Abstract: A zinc oxide (ZnO) field effect transistor exhibits large input amplitude by using a gate insulating layer. A channel layer and the gate insulating layer are sequentially laminated on a substrate. A gate electrode is formed on the gate insulating layer. A source contact and a drain contact are disposed at the both sides of the gate contact and are electrically connected to the channel layer via openings. The channel layer is formed from n-type ZnO. The gate insulating layer is made from aluminum nitride/aluminum gallium nitride (AlN/AlGaN) or magnesium zinc oxide (MgZnO), which exhibits excellent insulation characteristics, thus increasing the Schottky barrier and achieving large input amplitude. If the FET is operated in the enhancement mode, it is operable in a manner similar to a silicon metal oxide semiconductor field effect transistor (Si-MOS-type FET), resulting in the formation of an inversion layer.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: September 12, 2006
    Assignee: Cermet, Inc.
    Inventors: Jeff Nause, Shanthi Ganesan
  • Publication number: 20060049425
    Abstract: A light-emitting zinc oxide based compound semiconductor device of a double-heterostructure. The double-heterostructure includes a light-emitting layer formed of a low-resistivity Mg1-x-y Cdx Zny O; 0?x<1, 0<y?1, and x+y=0.1 to 1 compound semiconductor doped with p-type and/or n-type impurity. A first clad layer is joined to one surface of the light-emitting layer and formed of an n-type zinc oxide compound semiconductor having a composition different from the light-emitting layer. A second clad layer is joined to another surface of the light-emitting layer and formed of a low-resistivity, p-type zinc oxide based semiconductor having a composition different from the light-emitting layer.
    Type: Application
    Filed: May 13, 2005
    Publication date: March 9, 2006
    Applicant: Cermet, Inc.
    Inventors: Jeff Nause, Shanthi Ganesan
  • Publication number: 20060018816
    Abstract: A new diluted magnetic semiconductor-spintronics material and method for its production are disclosed. The material can be in bulk or thin film form. The material comprises zinc oxide (ZnO) which includes a transition element or a rare earth lanthanide, or both, in an amount sufficient to change the material from non-magnetic state to room temperature ferromagnetic state. The bulk crystal is grown by high pressure melt technique. A new method for growing transition metal doped ZnO thin films is presented. A metalorganic chemical vapor deposition (MOCVD) technique is used to grow thin films of transition metal doped ZnO and organic compounds have been used as source materials.
    Type: Application
    Filed: February 18, 2005
    Publication date: January 26, 2006
    Inventors: Jeff Nause, Varatharajan Rengarajan, William Nemeth
  • Publication number: 20050269565
    Abstract: A semi-insulating zinc-oxide (ZnO) single crystal. The crystal has resistivity of at least 1.5×103 ohm-centimeter (?-cm). The ZnO crystal can be produced from a melt contained by solid-phase ZnO to prevent introduction of undesired impurities into the crystal. The crystal can be a bulk single crystal that is cut and processed into wafer form of specified thickness. A dopant in a concentration ranging from 1×1015 atoms per cubic centimeter (atoms/cc) to 5×1021 atoms/cc can increase resistivity of the crystal relative to intrinsic ZnO. The dopant can be lithium (Li), sodium (Na), copper (Cu), nitrogen (N), phosphorus (P), and/or manganese (Mn).
    Type: Application
    Filed: July 25, 2005
    Publication date: December 8, 2005
    Inventors: Jeff Nause, William Nemeth
  • Patent number: 6936101
    Abstract: A semi-insulating zinc-oxide (ZnO) single crystal. The crystal has resistivity of at least 1.5×103 ohm-centimeter (?-cm). The ZnO crystal can be produced from a melt contained by solid-phase ZnO to prevent introduction of undesired impurities into the crystal. The crystal can be a bulk single crystal that is cut and processed into wafer form of specified thickness. A dopant in a concentration ranging from 1×1015 atoms per cubic centimeter (atoms/cc) to 5×1021 atoms/cc can increase resistivity of the crystal relative to intrinsic ZnO. The dopant can be lithium (Li), sodium (Na), copper (Cu), nitrogen (N), phosphorus (P), and/or manganese (Mn).
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: August 30, 2005
    Assignee: Cermet, Inc.
    Inventors: Jeff Nause, William Michael Nemeth
  • Publication number: 20040055526
    Abstract: A semi-insulating zinc-oxide (ZnO) single crystal. The crystal has resistivity of at least 1.5×103 ohm-centimeter (&OHgr;-cm). The ZnO crystal can be produced from a melt contained by solid-phase ZnO to prevent introduction of undesired impurities into the crystal. The crystal can be a bulk single crystal that is cut and processed into wafer form of specified thickness. A dopant in a concentration ranging from 1×1015 atoms per cubic centimeter (atoms/cc) to 5×1021 atoms/cc can increase resistivity of the crystal relative to intrinsic ZnO. The dopant can be lithium (Li), sodium (Na), copper (Cu), nitrogen (N), phosphorus (P), and/or manganese (Mn).
    Type: Application
    Filed: June 23, 2003
    Publication date: March 25, 2004
    Applicant: Cermet, Inc.
    Inventors: Jeff Nause, William Michael Nemeth
  • Publication number: 20040056273
    Abstract: A zinc oxide (ZnO) field effect transistor exhibits large input amplitude by using a gate insulating film. A channel layer and a gate insulating film are sequentially n laminated on a substrate. A gate electrode is formed on the gate insulating film. A source electrode and a drain electrode are disposed at the both sides of the gate electrode and are electrically connected to the channel layer via openings. The channel layer is formed from n-type ZnO. The gate insulating film is made from aluminum nitride/aluminum gallium nitride (AlN/AlGaN) or magnesium zinc oxide (MgZnO), which exhibits excellent insulation characteristics, thus increasing the Schottky barrier and achieving large input amplitude. If the FET is operated in the enhancement mode, it is operable in a manner similar to a silicon metal oxide semiconductor field effect transistor (Si-MOS-type FET), resulting in the formation of an inversion layer.
    Type: Application
    Filed: June 24, 2003
    Publication date: March 25, 2004
    Applicant: Cermet, Inc.
    Inventors: Jeff Nause, Shanthi Ganesan