Semi-Insulating Bulk Zinc Oxide Single Crystal
A semi-insulating zinc-oxide (ZnO) single crystal. The crystal has resistivity of at least 1.5×103 ohm-centimeter (Ω-cm). The ZnO crystal can be produced from a melt contained by solid-phase ZnO to prevent introduction of undesired impurities into the crystal. The crystal can be a bulk single crystal that is cut and processed into wafer form of specified thickness. A dopant in a concentration ranging from 1×1015 atoms per cubic centimeter (atoms/cc) to 5×1021 atoms/cc can increase resistivity of the crystal relative to intrinsic ZnO. The dopant can be lithium (Li), sodium (Na), copper (Cu), nitrogen (N), phosphorus (P), and/or manganese (Mn).
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This application is a continuation of U.S. application Ser. No. 11/189,218, filed Jul. 25, 2005 which is a continuation of U.S. application Ser. No. 10/602,185, filed Jun. 23, 2003, which is hereby incorporated herein by reference in its entirety. These applications further claims priority under Title 35, United States Code § 119(e) to U.S. provisional application No. 60/391,518 filed Jun. 24, 2002, which is further incorporated by reference in its entirety.
BACKGROUND OF THE INVENTION1. Field of the Invention
This invention relates to semi-insulating zinc oxide (ZnO) single crystals. Such crystals can be used as substrates upon which electronic, electro-optic, and/or opto-electronic devices and circuits can be formed.
2. Description of the Related Art
Compound semiconductor single crystals are being used to fabricate various devices such as high electron mobility (HEMT) devices, field effect transistors (FETs), and light emitting diodes (LEDs). These devices are manufactured by depositing several layers of various materials on an initial substrate. Examples of commonly used compound semiconductor substrates are indium phosphide (InP), gallium arsenide (GaAs), and silicon carbide (SiC). Recently, there has been a spike of interest in zinc oxide (ZnO) single crystals for use as a substrate due to its wide band gap (3.3 eV), its stability at device operating temperatures (exciton binding energy of 60 MeV), and its close lattice spacing with gallium nitride (GaN) (there is only a 3% mismatch in lattice spacing between ZnO and GaN).
A semi-insulating substrate is preferred for device fabrication to effectively limit leakage current, thereby isolating individual components of the deposited device. The resistivity value of a semi-insulating material has come into question, and the general definition set forth by Carter et al. U.S. Pat. No. 6,218,680 will be followed, where a semi-insulating material must meet the minimum requirement of 1.5×103 Ω-cm at room temperature. Johnston et al. U.S. Pat. No. 6,211,539 have claimed semi-insulating behavior in InP for resistivity values as high as 1×109 Ω-cm, so this value will be accepted as the maximum semi-insulator resistivity value. It is of interest to note that Bylsma et al., U.S. Pat. No. 4,77,146, claim that resistivity less than 10×106 Ω-cm will exhibit excessive leakage current for GaAs, whereas Carter et al. similarly claim that for device isolation in SiC the resistivity value must be at least 5×104 Ω-cm. This reveals the variation in material electrical properties that will achieve true device isolation, where parasitic currents are avoided.
A semi-insulating substrate is preferred for device fabrication to effectively limit leakage current, thereby isolating individual components of the deposited device. The resistivity value of a semi-insulating material has come into question, and the general definition set forth by Carter et al. U.S. Pat. No. 6,218,680 will be followed, where a semi-insulating material must meet the minimum requirement of 1.5×103 Ω-cm at room temperature. Johnston et al. U.S. Pat. No. 6,211,539 have claimed semi-insulating behavior in InP for resistivity values as high as 1×109 Ω-cm, so this value will be accepted as the maximum semi-insulator resistivity value. It is of interest to note that Bylsma et al. U.S. Pat. No. 4,777,146, claim that resistivity less than 10×106 Ω-cm will exhibit excessive leakage current for GaAs, whereas Carter et al. similarly claim that for device isolation in SiC the resistivity value must be at least 5×104 Ω-cm. This reveals the variation in material electrical properties that will achieve true device isolation, where parasitic currents are avoided.
SUMMARY OF THE INVENTIONThe invention is a semi-insulating zinc oxide (ZnO) bulk single crystal grown with dopants added and processed into a wafer form. The dopants used can be found in Group 1A (Li, Na), Group 1B (Cu), Group 5 (N, P) as well as Group 7B (Mn), ranging in concentration from 10 to 102° atoms per cubic centimeter (atoms/cc). The lowest resistivity that ZnO will still exhibit semi-insulating behavior is 1.5×103 Ω-cm at room temperature, so appropriate dopant concentrations must be effective to achieve at least this resistivity. Increasing the ZnO resistivity can be tailored due to the general trend of increasing dopant concentration with increasing resistivity. This is due to the fact that the additions are acceptors.
ZnO is highly susceptible to two defects, zinc interstitials and oxygen vacancies. Both act as electron donors and thus will decrease resistivity of the bulk crystal. When the overall number of unconfined electrons is lowered, the resistivity will rise. This can be accomplished in two ways. The first is perfecting the structure of the pure ZnO by removing the zinc interstitials and oxygen vacancies. By stoichiometrically bringing the ZnO structure into a refined state by adding more oxygen to the matrix, thereby removing zinc, the resistivity increases. This is highly difficult to accomplish due to the lower confining energy oxygen has in the ZnO matrix with respect to zinc. The second, more easily attainable way to achieve higher resistivity is by adding dopants that act as acceptors of electrons, which subsequently lowers the number of free electrons.
A method for forming a ZnO crystal as described above is also disclosed. The method can comprise forming the ZnO crystal from a melt. During crystal growth, the melt can be contained within solid-phase ZnO so that the ZnO crystal has the purity and composition required to obtain electrical isolation of any device formed thereon.
Additional objects and advantages of the invention are set forth in the description which follows. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
BRIEF DESCRIPTION OF THE DRAWINGSThe accompanying drawings, which are incorporated herein and constitute a part of the specification, illustrate presently preferred embodiments of the invention, and together with the general description given above and the detailed description of the preferred embodiments given below, serve to explain the principles of the invention.
The invention is now described with reference to the accompanying drawings which constitute a part of this disclosure. In the drawings, like numerals are used to refer to like elements throughout the several views.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The crystal growth apparatus, shown in
The apparatus further includes an inductive heating element (4) situated in the vessel, which is coupled to receive radio-frequency (rf) power externally to the vessel (5). A seed crystal of appropriate orientation can be placed inside the cooling unit (2). A precursor containing a stoichiometric quantity of ZnO, optionally including a resistivity-increasing dopant, is placed inside the cooling unit (2). The element heats the interior portion of the doped ZnO to form a molten interior portion contained by a relatively cool, exterior solid-phase portion of the doped ZnO that is closer relative to the molten interior, to the cooled surfaces of the cooling unit. A gaseous resistivity-raising dopant may be added through a conduit (not shown) extending from a dopant source into the interior of vessel (3). The dopant can comprise atoms from one or more of Group 1A (Li, Na), Group 1B (Cu), Group 5 (N, P) as well as Group 7B (Mn) of the periodic table of elements. Those of ordinary skill in the art well understand how to use this and other components and techniques to introduce a dopant into the vessel (3) for incorporation in the lattice of the ZnO crystal to be grown. Due to the pressure exerted by the gas contained in the vessel, the liquid interior of the doped ZnO becomes congruently melting to prevent its decomposition. The cooling unit is then lowered through element (6) to produce crystal nucleation at the base of the cooling unit and preferential crystal growth through the distance traveled.
In addition to rf power, the heating element receives a coolant flow (7) from a feedthrough that extends through a wall of the pressure vessel. In proximity to the vessel wall, the feedthrough has two coaxial conductors (8) to improve the electric power transfer to the heating element and to reduce heating of the external surfaces of the vessel. The two conductors of the feedthrough are cylindrical in shape, and define two channels for channeling a coolant flow to and from, respectively, the heating element.
After the growth process, the ZnO crystal is extracted from the cooling unit (2). The ZnO crystal is cut into wafer form, and processed by polishing and/or etchant to a predetermined or standard thickness. The ZnO wafer can then be used as a substrate for the formation of one or more integrated devices thereon. The resistivity of the ZnO wafer is at least 1.5×103 Ω-cm at room temperature to ensure proper electrical isolation of the device or devices formed thereon.
Although the methods of the invention have been described herein with reference to specific embodiments and examples, it is not necessarily intended to limit the scope of the invention to the specific embodiments and examples disclosed. Thus, in addition to claiming the subject matter literally defined in the appended claims, all modifications, alterations, and equivalents to which the applicant is entitled by law, are herein expressly reserved by the following claims.
Claims
1. A semi-insulating zinc-oxide (ZnO) bulk single crystal having a resistivity in a range from 1.5×103 to 104 ohm-centimeter (Ω-cm) and 106 Ω-cm to 108 Ω-cm.
2. The crystal of claim 1 wherein the resistivity of the crystal is sufficient to achieve electrical isolation of a device to be formed thereon.
3. The crystal of claim 1 wherein the crystal is produced from a melt so that the semi-insulating ZnO bulk single crystal has a purity and composition required to obtain electrical isolation of a device formed thereon.
4. The crystal in claim 1 wherein the crystal is a substrate that is grown as a bulk single crystal, cut, and processed to a specified thickness.
5. The crystal in claim 1 wherein the crystal contains a dopant that increases the resistivity of the crystal relative to intrinsic ZnO.
6. The crystal of claim 5 wherein the dopant is added to the ZnO single crystal in an atomic concentration ranging from 1×1015 atoms per cubic centimeter (atoms/cc) to 5×1021 atoms/cc.
7. The crystal of claim 5 wherein the dopant comprises lithium (Li).
8. The crystal of claim 5 wherein the dopant comprises sodium (Na).
9. The crystal of claim 5 wherein the dopant comprises copper (Cu).
10. The crystal of claim 5 wherein the dopant comprises nitrogen (N).
11. The crystal of claim 5 wherein the dopant comprises phosphorus (P).
12. The crystal of claim 5 wherein the dopant comprises manganese (Mn).
13. The crystal of claim 1 wherein the resistivity is attained by making the crystal stoichiometric by adding oxygen (O).
Type: Application
Filed: Feb 6, 2007
Publication Date: Jun 7, 2007
Applicant: Cermet, Inc. (Atlanta, GA)
Inventors: Jeff Nause (Marbleton, GA), William Nemeth (Atlanta, GA)
Application Number: 11/671,881
International Classification: H01L 33/00 (20060101);