Abstract: A method and apparatus for accommodating irregular memory write word widths allow for writing to multiple rows in a memory so as to reduce or eliminate holes in the address read space. First and second memory blocks are provided that include a first bitcell selectable by a first write bitline and a second bitcell selectable by a second write bitline. Where a write word width is not equal to a read word width and is not some factor of a power of two times the read word width, the column decode to read out the entire word is not a power of two, and holes in the read address space will exist. When the write address is even, a first range of bits is written to the first block on a first write bitline, a second range of bits is written to the second block on the first write bitline, and a third range of bits is written to the first block on a second write bitline.

Abstract: A sense amplifier includes a voltage supply terminal, first and second differential bit line inputs and a differential amplifier. The differential amplifier has first and second amplifier inputs, which are coupled to the first and second differential bit line inputs, respectively, and has an amplifier output. A first transistor is coupled between the voltage supply terminal and the first bit line input and has a current control terminal coupled to the second bit line input. A second transistor is coupled between the voltage supply terminal and the second bit line input and has a current control terminal coupled to the first bit line input.

Abstract: A circuit in a memory device and a method for precharging at least one bit line in the memory device. The circuit includes a primary precharger and a secondary precharger in communication with the bit line. The secondary precharger gradually precharges the bit line before the primary precharger precharges the bit line between memory operations.

Abstract: A circuit in a memory device for precharging at least one bit line before a data read operation of the memory device is complete. The circuit includes a sense amplifier having at least one input and at least one output. The bit line is connected to the input of the sense amplifier via column decode logic, and a precharge circuit is connected to the bit line. An input keeper is connected to the sense amplifier inputs and is in communication with the precharge circuit and column decode logic. The input keeper holds a content of the bit line at the sense amplifier inputs and causes the precharge circuit to precharge the bit line as the content of the bit line propagates to the output of the sense amplifier.

Abstract: A network in a memory device for selecting a bit line during a data read or a data write. The network includes a first bit line in communication with a bitcell and a second bit line in communication with the bitcell. A charger is in communication with the first and second bit lines, and the charger is configured to charge the first bit line to a first charged level and the second bit line to a second charged level before a data read or a data write. A sensor is connected to the first and second bit lines. The bitcell drives one bit line up and the other bit line down during a data read. The sensor senses a difference between the first and second bit lines to select one of the first and second bit lines during a data read.

Abstract: A device and method for characterizing signal skew between a first signal and a second signal. The device includes a delay chain and a first transition detector in communication with the delay chain. The first transition detector is configured for receiving the first signal and provides a pulse signal to the delay chain upon detecting a transition of the first signal. The device includes a second transition detector which is in communication with a latch and is configured for receiving the second signal. The second transition detector sets the latch upon detecting a transition of the second signal. At least one pass gate is connected to the delay chain and the latch. At least one timing latch is connected to the pass gate for receiving signal skew information between the first and second signals.

Abstract: The grooved shaft for a magnetic-drive centrifugal pump preferably has an axial groove with a semi-elliptical or U-shaped groove cross section. Adjoining the axial groove is a flat area which is tapered tangentially relative to a substantially cylindrical shaft area. The grooved shaft optimally has a front shaft radius and a rear shaft radius, wherein the front shaft radius is smaller than the rear shaft radius such that the front shaft radius may be oriented near an impeller intake to decrease hydraulic flow resistance. Meanwhile, the rear shaft radius provides increased axial and radial load capacity for the grooved shaft. In practice, the grooved shaft is incorporated into a magnetic-drive centrifugal pump and the groove is statically oriented in a position of minimal radial loading.

Abstract: The seal assembly comprises a housing, a shaft, seals, and a reservoir. The housing has a hollow section bounded by a cylindrical surface and a first curved protrusion. The housing has a first channel and a second channel extending from the hollow section. The shaft extends through the hollow section. Seals seal the hollow section with respect to the shaft to form a chamber. The combination of the first curved protrusion and the sleeve cooperatively form a hydraulic pump for conveying a lubricating fluid from the chamber via the first channel to reservoir. The lubricating fluid is circulated from the reservoir to the chamber via a second channel. The seal assembly has a fluid level gauge or an optoelectronic leak detector for detecting leaks in the seals of the seal assembly or leaks in a fluid pump (i.e. a magnetic-drive centrifugal pump) coupled to the seal assembly.