Patents by Inventor Jefferson Amstutz

Jefferson Amstutz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210027416
    Abstract: Systems, apparatuses, and methods may provide for technology to process graphical data, and to modify a runtime environment in a parallel computing platform for a graphic environment.
    Type: Application
    Filed: July 15, 2020
    Publication date: January 28, 2021
    Inventors: Travis T. Schluessler, Abhishek R. Appu, Ankur N. Shah, Joydeep Ray, Altug Koker, Jacek Kwiatkowski, Ingo Wald, Jefferson Amstutz, Johannes Guenther, Gabor Liktor, Elmoustapha Ould-Ahmed-Vall
  • Patent number: 10832371
    Abstract: An apparatus comprising a sorting unit to sort primitives of a graphics image, the primitives to be grouped, each group to form a first level node of a hierarchical acceleration structure; a parallel reconfigurable clustering array to construct the hierarchical acceleration structure, the parallel reconfigurable clustering array comprising a plurality of processing clusters, each cluster comprising: parallel efficiency analysis circuitry to evaluate different groupings of the first level nodes for a next level of the hierarchical acceleration structure to determine efficiency values for the different groupings; and node merge circuitry to merge the first level nodes based on the efficiency values to form second level nodes.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: November 10, 2020
    Assignee: Intel Corporation
    Inventors: Michael Doyle, Travis Schluessler, Gabor Liktor, Atsuo Kuwahara, Jefferson Amstutz
  • Patent number: 10719902
    Abstract: Systems, apparatuses, and methods may provide for technology to process graphical data, and to modify a runtime environment in a parallel computing platform for a graphic environment.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: July 21, 2020
    Assignee: Intel Corporation
    Inventors: Travis T. Schluessler, Abhishek R. Appu, Ankur N. Shah, Joydeep Ray, Altug Koker, Jacek Kwiatkowski, Ingo Wald, Jefferson Amstutz, Johannes Guenther, Gabor Liktor, Elmoustapha Ould-Ahmed-Vall
  • Publication number: 20200218330
    Abstract: An embodiment may include an application processor, persistent storage media coupled to the application processor, and a graphics subsystem coupled to the application processor. The system may further include any of a performance analyzer to analyze a performance of the graphics subsystem to provide performance analysis information, a content-based depth analyzer to analyze content to provide content-based depth analysis information, a focus analyzer to analyze a focus area to provide focus analysis information, an edge analyzer to provide edge analysis information, a frame analyzer to provide frame analysis information, and/or a variance analyzer to analyze respective amounts of variance for the frame. The system may further include a workload adjuster to adjust a workload of the graphics subsystem based on the analysis information. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: March 16, 2020
    Publication date: July 9, 2020
    Inventors: Travis T. Schluessler, Joydeep Ray, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Abhishek R. Appu, Kamal Sinha, James M. Holland, Pattabhiraman K., Sayan Lahiri, Radhakrishnan Venkataraman, Carson Brownlee, Vivek Tiwari, Kai Xiao, Jefferson Amstutz, Deepak S. Vembar, Ankur N. Shah, ElMoustapha Ould-Ahmed-Vall
  • Publication number: 20200211253
    Abstract: Apparatus and method for speculative execution of hit and intersection shaders on programmable ray tracing architectures. For example, one embodiment of an apparatus comprises: single-instruction multiple-data (SIMD) or single-instruction multiple-thread (SIMT) execution units (EUs) to execute shaders; and ray tracing circuitry to execute a ray traversal thread, the ray tracing engine comprising: traversal/intersection circuitry, responsive to the traversal thread, to traverse a ray through an acceleration data structure comprising a plurality of hierarchically arranged nodes and to intersect the ray with a primitive contained within at least one of the nodes; and shader deferral circuitry to defer and aggregate multiple shader invocations resulting from the traversal thread until a particular triggering event is detected, wherein the multiple shaders are to be dispatched on the EUs in a single shader batch upon detection of the triggering event.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 2, 2020
    Inventors: GABOR LIKTOR, KARTHIK VAIDYANATHAN, JEFFERSON AMSTUTZ, ATSUO KUWAHARA, MICHAEL DOYLE, TRAVIS SCHLUESSLER
  • Publication number: 20200211147
    Abstract: An apparatus comprising a sorting unit to sort primitives of a graphics image, the primitives to be grouped, each group to form a first level node of a hierarchical acceleration structure; a parallel reconfigurable clustering array to construct the hierarchical acceleration structure, the parallel reconfigurable clustering array comprising a plurality of processing clusters, each cluster comprising: parallel efficiency analysis circuitry to evaluate different groupings of the first level nodes for a next level of the hierarchical acceleration structure to determine efficiency values for the different groupings; and node merge circuitry to merge the first level nodes based on the efficiency values to form second level nodes.
    Type: Application
    Filed: December 28, 2018
    Publication date: July 2, 2020
    Inventors: MICHAEL DOYLE, TRAVIS SCHLUESSLER, GABOR LIKTOR, ATSUO KUWAHARA, JEFFERSON AMSTUTZ
  • Publication number: 20200202493
    Abstract: Apparatus and method for denoising of images generated by a rendering engine such as a ray tracing engine. For example, one embodiment of a system or apparatus comprises: A system comprising: a plurality of nodes to perform ray tracing operations; a dispatcher node to dispatch graphics work to the plurality of nodes, each node to perform ray tracing to render a region of an image frame; at least a first node of the plurality comprising: a ray-tracing renderer to perform ray tracing to render a first region of the image frame; and a denoiser to perform denoising of the first region using a combination of data associated with the first region and data associated with a region outside of the first region, at least some of the data associated with the region outside of the first region to be retrieved from at least one other node.
    Type: Application
    Filed: December 21, 2018
    Publication date: June 25, 2020
    Inventors: CARSON BROWNLEE, INGO WALD, ATTILA AFRA, JOHANNES GUENTHER, JEFFERSON AMSTUTZ, CARSTEN BENTHIN
  • Patent number: 10591971
    Abstract: An embodiment may include an application processor, persistent storage media coupled to the application processor, and a graphics subsystem coupled to the application processor. The system may further include any of a performance analyzer to analyze a performance of the graphics subsystem to provide performance analysis information, a content-based depth analyzer to analyze content to provide content-based depth analysis information, a focus analyzer to analyze a focus area to provide focus analysis information, an edge analyzer to provide edge analysis information, a frame analyzer to provide frame analysis information, and/or a variance analyzer to analyze respective amounts of variance for the frame. The system may further include a workload adjuster to adjust a workload of the graphics subsystem based on the analysis information. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: March 17, 2020
    Assignee: Intel Corporation
    Inventors: Travis T. Schluessler, Joydeep Ray, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Abhishek R. Appu, Kamal Sinha, James M. Holland, Pattabhiraman K., Sayan Lahiri, Radhakrishnan Venkataraman, Carson Brownlee, Vivek Tiwari, Kai Xiao, Jefferson Amstutz, Deepak S. Vembar, Ankur N. Shah, ElMoustapha Ould-Ahmed-Vall
  • Publication number: 20180300841
    Abstract: Systems, apparatuses, and methods may provide for technology to process graphical data, and to modify a runtime environment in a parallel computing platform for a graphic environment.
    Type: Application
    Filed: April 17, 2017
    Publication date: October 18, 2018
    Inventors: Travis T. Schluessler, Abhishek R. Appu, Ankur N. Shah, Joydeep Ray, Altug Koker, Jacek Kwiatkowski, Ingo Wald, Jefferson Amstutz, Johannes Guenther, Gabor Liktor, Elmoustapha Ould-Ahmed-Vall
  • Publication number: 20180292895
    Abstract: An embodiment of a graphics apparatus may include a facial expression detector to detect a facial expression of a user, and a parameter adjuster communicatively coupled to the facial expression detector to adjust a graphics parameter based on the detected facial expression of the user. The detected facial expression may include one or more of a squinting, blinking, winking, and facial muscle tension of the user. The graphics parameter may include one or more of a frame resolution, a screen contrast, a screen brightness, and a shading rate. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: April 10, 2017
    Publication date: October 11, 2018
    Inventors: Travis T. Schluessler, Joydeep Ray, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Jefferson Amstutz, Carson Brownlee, Vivek Tiwari, Sayan Lahiri, Kai Xiao, Abhishek R. Appu, ElMoustapha Ould-Ahmed-Vall, Deepak S. Vembar, Ankur N. Shah, Balaji Vembu, Josh B. Mastronarde
  • Publication number: 20180284872
    Abstract: An embodiment may include an application processor, persistent storage media coupled to the application processor, and a graphics subsystem coupled to the application processor. The system may further include any of a performance analyzer to analyze a performance of the graphics subsystem to provide performance analysis information, a content-based depth analyzer to analyze content to provide content-based depth analysis information, a focus analyzer to analyze a focus area to provide focus analysis information, an edge analyzer to provide edge analysis information, a frame analyzer to provide frame analysis information, and/or a variance analyzer to analyze respective amounts of variance for the frame. The system may further include a workload adjuster to adjust a workload of the graphics subsystem based on the analysis information. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: April 1, 2017
    Publication date: October 4, 2018
    Inventors: Travis T. Schluessler, Joydeep Ray, John H. Feit, Nikos Kaburlasos, Jacek Kwiatkowski, Abhishek R. Appu, Kamal Sinha, James M. Holland, Pattabhiraman K., Sayan Lahiri, Radhakrishnan Venkataraman, Carson Brownlee, Vivek Tiwari, Kai Xiao, Jefferson Amstutz, Deepak S. Vembar, Ankur N. Shah, ElMoustapha Ould-Ahmed-Vall