Patents by Inventor Jeffery D. Bielefeld

Jeffery D. Bielefeld has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180226289
    Abstract: A helmet layer is deposited on a plurality of conductive features on a first dielectric layer on a substrate. A second dielectric layer is deposited on a first portion of the helmet layer. An etch stop layer is deposited on a second portion the helmet layer.
    Type: Application
    Filed: September 23, 2015
    Publication date: August 9, 2018
    Inventors: Jeffery D. BIELEFELD, Manish CHANDHOK, Asad IQBAL, John D. BROOKS
  • Publication number: 20160307796
    Abstract: Processes of forming an insulated wire into an interlayer dielectric layer (ILD) of a back-end metallization includes thermally treating a metallic barrier precursor under conditions to cause at least one alloying element in the barrier precursor to form a dielectric barrier between the wire and the ILD. The dielectric barrier is therefore a self-forming, self-aligned barrier. Thermal processing is done under conditions to cause the at least one alloying element to migrate from a zone of higher concentration thereof to a zone of lower concentration thereof to further form the dielectric barrier. Various apparatus are made by the process.
    Type: Application
    Filed: June 24, 2016
    Publication date: October 20, 2016
    Inventors: Hui Jae Yoo, Jeffery D. Bielefeld, Sean W. King, Sridhar Balakrishnan
  • Patent number: 9269652
    Abstract: A method including forming a dielectric material including a surface porosity on a circuit substrate including a plurality of devices; chemically modifying a portion of the surface of the dielectric material with a first reactant; reacting the chemically modified portion of the surface with a molecule that, once reacted, will be thermally stable; and forming a film including the molecule. An apparatus including a circuit substrate including a plurality of devices; a plurality of interconnect lines disposed in a plurality of layers coupled to the plurality of devices; and a plurality of dielectric layers disposed between the plurality of interconnect lines, wherein at least one of the dielectric layers comprises a porous material surface relative to the plurality of devices and the surface comprises a pore obstructing material.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: February 23, 2016
    Assignee: Intel Corporation
    Inventors: David J. Michalak, James M. Blackwell, Jeffery D. Bielefeld, James S. Clarke
  • Publication number: 20130320520
    Abstract: A method including forming a dielectric material including a surface porosity on a circuit substrate including a plurality of devices; chemically modifying a portion of the surface of the dielectric material with a first reactant; reacting the chemically modified portion of the surface with a molecule that, once reacted, will be thermally stable; and forming a film including the molecule. An apparatus including a circuit substrate including a plurality of devices; a plurality of interconnect lines disposed in a plurality of layers coupled to the plurality of devices; and a plurality of dielectric layers disposed between the plurality of interconnect lines, wherein at least one of the dielectric layers comprises a porous material surface relative to the plurality of devices and the surface comprises a pore obstructing material.
    Type: Application
    Filed: December 22, 2011
    Publication date: December 5, 2013
    Inventors: David J. Michalak, James M. Blakwell, Jeffery D. Bielefeld, James S. Clarke
  • Patent number: 8461683
    Abstract: Processes of forming an insulated wire into an interlayer dielectric layer (ILD) of a back-end metallization includes thermally treating a metallic barrier precursor under conditions to cause at least one alloying element in the barrier precursor to form a dielectric barrier between the wire and the ILD. The dielectric barrier is therefore a self-forming, self-aligned barrier. Thermal processing is done under conditions to cause the at least one alloying element to migrate from a zone of higher concentration thereof to a zone of lower concentration thereof to further form the dielectric barrier. Various apparatus are made by the process.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: June 11, 2013
    Assignee: Intel Corporation
    Inventors: Hui Jae Yoo, Jeffery D. Bielefeld, Sean W. King, Sridhar Balakrishnan
  • Publication number: 20120248608
    Abstract: Processes of forming an insulated wire into an interlayer dielectric layer (ILD) of a back-end metallization includes thermally treating a metallic barrier precursor under conditions to cause at least one alloying element in the barrier precursor to form a dielectric barrier between the wire and the ILD. The dielectric barrier is therefore a self-forming, self-aligned barrier. Thermal processing is done under conditions to cause the at least one alloying element to migrate from a zone of higher concentration thereof to a zone of lower concentration thereof to further form the dielectric barrier. Various apparatus are made by the process.
    Type: Application
    Filed: April 1, 2011
    Publication date: October 4, 2012
    Inventors: Hui Jae Yoo, Jeffery D. Bielefeld, Sean W. King, Sridhar Balakrishnan
  • Patent number: 7772702
    Abstract: Dielectric spacers for a plurality of metal interconnects and a method to form such dielectric spacers are described. In one embodiment, the dielectric spacers are adjacent to neighboring metal interconnects having flared profiles and are discontiguous from one another. In another embodiment, the dielectric spacers provide a region upon which un-landed vias may effectively land.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: August 10, 2010
    Assignee: Intel Corporation
    Inventors: Jeffery D. Bielefeld, Boyan Boyanov
  • Publication number: 20090001594
    Abstract: A method may comprise assembling a first dielectric ensemble that comprises a first dielectric layer exhibiting a first porosity, a second dielectric layer exhibiting a second porosity and a third dielectric layer exhibiting a third porosity, and fabricating a first metal line in the dielectric ensemble. A chemical may be applied on the third layer to pass through and dissolve a portion of the second layer. The third layer acts to prevent a via that is partially landed on the dielectric from exposing the air gap underneath.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Inventors: Hui Jae Yoo, Makarem A. Hussein, Jeffery D. Bielefeld, Vijayakumar S. Ramachandrarao
  • Publication number: 20080073748
    Abstract: Dielectric spacers for a plurality of metal interconnects and a method to form such dielectric spacers are described. In one embodiment, the dielectric spacers are adjacent to neighboring metal interconnects having flared profiles and are discontiguous from one another. In another embodiment, the dielectric spacers provide a region upon which un-landed vias may effectively land.
    Type: Application
    Filed: September 21, 2006
    Publication date: March 27, 2008
    Inventors: Jeffery D. Bielefeld, Boyan Boyanov
  • Publication number: 20040043555
    Abstract: Carbon doped oxide (CDO) deposition. One method of deposition includes providing a substrate and introducing oxygen to a carbon doped oxide precursor in the presence of the substrate. A carbon doped oxide film is formed on the substrate. In another method the substrate is placed on a susceptor of a chemical vapor deposition apparatus. A background gas is introduced along with the carbon doped oxide precursor and oxygen to form the carbon doped oxide film on the substrate.
    Type: Application
    Filed: September 2, 2003
    Publication date: March 4, 2004
    Inventors: Ebrahim Andideh, Kevin L. Peterson, Jeffery D. Bielefeld
  • Patent number: 6677253
    Abstract: A method for carbon doped oxide (CDO) deposition is described. One method of deposition includes providing a substrate and introducing oxygen to a carbon doped oxide precursor in the presence of the substrate. A carbon doped oxide film is formed on the substrate. In another method the substrate is placed on a susceptor of a chemical vapor deposition apparatus. A background gas is introduced along with the carbon doped oxide precursor and oxygen to form the carbon doped oxide film on the substrate.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: January 13, 2004
    Assignee: Intel Corporation
    Inventors: Ebrahim Andideh, Kevin L. Peterson, Jeffery D. Bielefeld
  • Publication number: 20030077921
    Abstract: Carbon doped oxide (CDO) deposition. One method of deposition includes providing a substrate and introducing oxygen to a carbon doped oxide precursor in the presence of the substrate. A carbon doped oxide film is formed on the substrate. In another method the substrate is placed on a susceptor of a chemical vapor deposition apparatus. A background gas is introduced along with the carbon doped oxide precursor and oxygen to form the carbon doped oxide film on the substrate.
    Type: Application
    Filed: October 5, 2001
    Publication date: April 24, 2003
    Inventors: Ebrahim Andideh, Kevin L. Peterson, Jeffery D. Bielefeld