Abstract: A wireless timer system (10) is shown including a master unit (12) and multiple remote modules (13). The master unit communicates with the slave units through a RF signal. The master unit includes a control circuit for controlling the activation of the remote modules during at least one designated activation time period having a commencement time and a termination time. The designated activation time period including a plurality of on/off cycles. The control circuit changes the selection of which remote module to activate first upon each occurrence of reaching the designated activation time period. The control circuit may also include a variable time range associated with the activation time period. The control circuit may change the commencement time each day to a time within the variable time range from the commencement time.

Abstract: Trench isolation structure and method of forming trench isolation structures. The structures includes a trench in a silicon region of a substrate, the trench extending from a top surface of the substrate into the silicon region; an ion implantation stopping layer over sidewalls of the trench; a dielectric fill material filling remaining space in the trench, the dielectric fill material not including any materials found in the stopping layer; an N-type dopant species in a first region of the silicon region on a first side of the trench; the N-type dopant species in a first region of the dielectric material adjacent to the first side of the trench; a P-type dopant species in a second region of the silicon region on a second side of the trench; and the P-type dopant species in a second region of the dielectric material adjacent to the second side of the trench.

Abstract: Structures and method for forming the same. The semiconductor structure comprises a photo diode that includes a first semiconductor region and a second semiconductor region. The first and second semiconductor regions are doped with a first and second doping polarities, respectively, and the first and second doping polarities are opposite. The semiconductor structure also comprises a transfer gate that comprises (i) a first extension region, (ii) a second extension region, and (iii) a floating diffusion region. The first and second extension regions are in direct physical contact with the photo diode and the floating diffusion region, respectively. The semiconductor structure further comprises a charge pushing region. The charge pushing region overlaps the first semiconductor region and does not overlap the floating diffusion region. The charge pushing region comprises a transparent and electrically conducting material.

Abstract: A structure and method of fabricating lateral diodes. The diodes include Schottky diodes and PIN diodes. The method of fabrication includes forming one or more doped regions and more trenches in a silicon substrate and forming metal silicides on the sidewalls of the trenches. The fabrication of lateral diodes may be integrated with the fabrication of field effect, bipolar and SiGe bipolar transistors.

Abstract: A structure and method of fabricating lateral diodes. The diodes include Schottky diodes and PIN diodes. The method of fabrication includes forming one or more doped regions and more trenches in a silicon substrate and forming metal silicides on the sidewalls of the trenches. The fabrication of lateral diodes may be integrated with the fabrication of field effect, bipolar and SiGe bipolar transistors.

Abstract: A power outage socket device that may be installed on a variety of lamps or light fixtures. The bottom of the device has a male connector adapted to be inserted into the light socket on the lamp or light fixture, in place of the light bulb. A female socket adapted to receive the light bulb is located on the top of the device. The male connector may be recessed. When power is interrupted, emergency power is provided to one or more emergency light sources on the device to provide light. Emergency power is provided by one or more batteries, which may be rechargeable. The device also may include means for connecting a lamp harp, or for allowing a lamp harp to pass through the device. A photoelectric light sensor may be used to detect ambient light and control whether emergency light is provided when normal power is interrupted.

Abstract: An air filter monitor (10) and method of utilizing such to monitor an air filter is disclosed wherein the monitor has a housing (11), an air flow detector (12) with accompanying electrical circuit (13), and a mounting strap (22) which is configured to be secured to a conventional air vent grill of a heating, ventilation and air conditioning system. The air flow detector includes a freely rotating impeller and a sensor (30) which senses the rotational speed of the impeller (29). The electrical circuit also includes a central processing unit (CPU) (32), a battery source (33), a calibrating switch (35), and a light indicator (36). The CPU includes memory for retaining an initial airflow velocity, and means for comparing the current airflow velocity with the initial airflow velocity. The CPU compares the current airflow velocity to the initial airflow velocity and actuates the light should a threshold drop in airflow velocity be reached.

Abstract: A structure and method of fabricating lateral diodes. The diodes include Schottky diodes and PIN diodes. The method of fabrication includes forming one or more doped regions and more trenches in a silicon substrate and forming metal silicides on the sidewalls of the trenches. The fabrication of lateral diodes may be integrated with the fabrication of field effect, bipolar and SiGe bipolar transistors.

Abstract: An epitaxial base bipolar transistor comprising an epitaxial single crystal layer on a single crystal single substrate; a raised emitter on the semiconductor surface; a raised extrinsic base on the surface of the semiconductor substrate; an insulator between the raised emitter and the raised extrinsic base, wherein said insulator is a spacer; and a diffusion from the raised emitter and from the raised extrinsic base to provide an emitter diffusion and an extrinsic base diffusion in said single crystal substrate, wherein said emitter diffusion has an emitter diffusion junction depth, and wherein said emitter extends to said substrate surface and said base extends to said substrate surface, wherein said emitter to base surface height difference is less than 20% of said emitter junction depth is provided as well as methods for fabricating the same.

Abstract: An epitaxial base bipolar transistor comprising an epitaxial single crystal layer on a single crystal single substrate; a raised emitter on the semiconductor surface; a raised extrinsic base on the surface of the semiconductor substrate; an insulator between the raised emitter and the raised extrinsic base, wherein said insulator is a spacer; and a diffusion from the raised emitter and from the raised extrinsic base to provide an emitter diffusion and an extrinsic base diffusion in said single crystal substrate, wherein said emitter diffusion has an emitter diffusion junction depth, and wherein said emitter extends to said substrate surface and said base extends to..said substrate surface, wherein said emitter to base surface height difference is less than 20% of said emitter junction depth is provided as well as methods for fabricating the same.

Abstract: An epitaxial base bipolar transistor including an epitaxial single crystal layer on a single crystal single substrate; a raised emitter on a portion of the single crystal layer; a raised extrinsic base on a surface of the semiconductor substrate; an insulator between the raised emitter and the raised extrinsic base, wherein the insulator is a spacer; and a diffusion from the raised emitter and from the raised extrinsic base to provide an emitter diffusion and an extrinsic base diffusion in the single crystal layer, wherein the emitter diffusion has an emitter diffusion junction depth.

Abstract: An epitaxial base bipolar transistor comprising an epitaxial single crystal layer on a single crystal single substrate; a raised emitter on the semiconductor surface; a raised extrinsic base on the surface of the semiconductor substrate; an insulator between the raised emitter and the raised extrinsic base, wherein said insulator is a spacer; and a diffusion from the raised emitter and from the raised extrinsic base to provide an emitter diffusion and an extrinsic base diffusion in said single crystal substrate, wherein said emitter diffusion has an emitter diffusion junction depth, and wherein said emitter extends to said substrate surface and said base extends to said substrate surface. wherein said emitter to base surface height difference is less than 20% of said emitter junction depth is provided as well as methods for fabricating the same.

Abstract: Disclosed is a method of improved grid generation for semiconductor device simulation. In particular, the invention includes a simple method for locating critical interfaces (e.g., oxide-silicon interfaces) and then utilizing the information to generate finer mesh elements near those boundaries where device behavior is most critical. The method of identifying critical interfaces includes the steps of examining the boundary data for each material region in the device, and then generating normal lines between adjacent boundaries to identify "thin" regions, which are generally associated with the critical interfaces. Once this occurs, a recursive subdivision algorithm may be utilized to generate a grid whose element dimensions are dependent upon their proximity to identified critical regions.

Abstract: A method for generating a computer representation of a two-dimensional or three-dimensional object featuring recursive and anisotropic division of the representation. A bitree approach is provided for successively dividing into two equal parts any portion of the computer representation of the object. Each subdivision into two parts is accomplished by dividing the portion either horizontally or vertically. The method is implemented over a user interface to an information handling system comprised of one or more processors, a memory system, I/O devices, and an operating system program. Each subdivision of the computer representation of the object is comprised of a data structure that is efficiently stored in the memory system and dynamically updated to contain information about its neighboring subdivisions in order that balancing can be effectively achieved.