Patents by Inventor Jeffrey Bernstein

Jeffrey Bernstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8107306
    Abstract: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: January 31, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Benjamin Vigoda, Eric Nestler, Jeffrey Bernstein, David Reynolds, Alexander Alexeyev, Jeffrey Venuti, William Bradley, Vladimir Zlatkovic
  • Publication number: 20110255612
    Abstract: A processor implements a network of functional nodes and communication paths between the nodes. The processor includes a plurality of circuit implementations of the functional nodes of the processor; and a plurality of signal paths implementing the communication paths linking the circuit implementations of the nodes. At least some of the signal paths are configured to pass signal values represented according to temporal patterns of signal levels on the signal paths. The processor also includes a plurality of circuit components for conversion between a signal value represented as a signal level (e.g., voltage or current level) and a signal value represented as a temporal pattern.
    Type: Application
    Filed: February 22, 2011
    Publication date: October 20, 2011
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Jeffrey Bernstein, Benjamin Vigoda, David Reynolds, Alexander Alexeyev, William Bradley
  • Patent number: 7991153
    Abstract: Systems and method of encrypting text using glyphs. Implementations of a first method may include receiving text including one or more characters having an order, altering the order of the one or more characters using a mixer cipher to produce one or more mixed characters, and substituting for the one or more mixed characters one or more encrypted characters using a stochastic cipher. The method may further include generating at least one glyph by associating one or more symbols and a position of the one or more symbols within a perimeter of the at least one glyph with the one or more encrypted characters and writing the at least one glyph to a substrate.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: August 2, 2011
    Assignee: Nanoglyph, LLC
    Inventors: John Rao, Jeffrey Bernstein
  • Publication number: 20100281089
    Abstract: A circuit includes a signal processing circuit for accepting an input and for generating a set of outputs. The input is provided in an input range that has a set of representative values, and each output represents a measure of an association of the input with one or more of the representative values. The signal processing circuit includes a group of output sections, each output section being responsive to the input of the signal processing circuit. Each output section includes one or more sigmoid generators. Each sigmoid generator is responsive to an input of the output section to generate an output that represents a sigmoid function of the input of the output section. Each output section also includes a circuitry for combining the outputs of the one or more sigmoid generators to form one of the set of outputs of the signal processing circuit. An input transformation circuit is coupled to the plurality of output sections.
    Type: Application
    Filed: March 2, 2010
    Publication date: November 4, 2010
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Alexander Alexeyev, Jeffrey Venuti
  • Publication number: 20100246287
    Abstract: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
    Type: Application
    Filed: August 6, 2009
    Publication date: September 30, 2010
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Jeffrey Venuti, David Reynolds, Alexander Alexeyev
  • Publication number: 20100246289
    Abstract: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
    Type: Application
    Filed: August 6, 2009
    Publication date: September 30, 2010
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Jeffrey Venuti, David Reynolds, Alexander Alexeyev
  • Publication number: 20100220514
    Abstract: A storage device includes a storage array having a group of storage elements. Each storage element can written to a discrete set of physical states. A read circuit selects one or more storage elements and generates, for each selected storage element, an analog signal representative of the physical state of the selected storage element. A signal processing circuit processes the analog signal to generate a plurality of outputs, with each output representing a degree of an association of the selected storage element with a different subset of one or more of the discrete set of physical states.
    Type: Application
    Filed: August 6, 2009
    Publication date: September 2, 2010
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Benjamin Vigoda, Jeffrey Bernstein, Jeffrey Venuti, Alexander Alexeyev, Eric Nestler, David Reynolds
  • Publication number: 20100223225
    Abstract: Some general aspects relate to systems and methods of analog computation using numerical representation with uncertainty. For example, a specification of a group of variables is accepted, with each variable having a set of at least N possible values. The group of variables satisfies a set of one or more constraints, and each variable is specified as a decomposition into a group of constituents, with each constituent having a set of M (e.g., M<N) possible constituent values that can be determined based on the variable values. The method also includes forming a specification for configuring a computing device that implements a network representation of the constraints based on the specification of the group of variables. The network representation includes a first set of nodes corresponding to the groups of constituents, a second set of nodes corresponding to the set of constraints, and interconnections between the first and the second sets of nodes for passing continuous-valued data.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 2, 2010
    Applicant: Lyric Semiconductor, Inc.
    Inventors: Benjamin Vigoda, William Bradley, Shawn Hershey, Jeffrey Bernstein
  • Publication number: 20070103581
    Abstract: An imaging system includes a line-scan camera (8) having an image line in an planar imaging beam path and a depth of focus. Line forming optics are arranged between at least two arrays of LEDs (4,6) and the image object so as to form two respective illumination stripes in two planar illumination beam paths (5,7). The planar imaging beam path (9) is located between the two or more planar illumination beam paths (5,7). The planar imaging beam path (9) and the two planar illumination beam paths (5,7) preferably intersect proximate to the far depth of focus of the camera. The image line and illumination stripes are parallel across an image area, which may comprise a transport device, such as a conveyor. The non-coplanar planar illumination beam paths provide maximum overlap at the farthest depth of field where illumination is most needed and diverge closer to the camera.
    Type: Application
    Filed: October 22, 2004
    Publication date: May 10, 2007
    Inventors: John Dwinell, Jeffrey Bernstein
  • Publication number: 20040091886
    Abstract: A novel method for producing recombinant polynucleotides in vitro is provided. This method entails the treatment of heteroduplex DNA sequences with a nuclease (preferably, DNase I) and a polymerase (preferably, DNA polymerase I), the enzymes primarily involved in nick translation. The results achieved using this process are superior to that achieved by previous in vivo recombination efforts utilizing specific DNA repair systems.
    Type: Application
    Filed: March 20, 2003
    Publication date: May 13, 2004
    Inventors: Jeffrey C. Moore, Jeffrey Bernstein, James K. McCarthy
  • Patent number: 6509547
    Abstract: This invention results from the realization that a laser can remove the protective layer(s) from the glass or fused silica optical fiber core and cladding more effectively and more reliably than chemical or mechanical means. This invention teaches methods of using laser beams to remove the protective layers of fibers without significantly damaging the optical and mechanical properties of the fiber and without leaving an excessive amount of residual ablation debris on the fiber while providing careful control of the laser energy. This method thereby allows users to safely strip protective layers off sensitive fibers, such as fibers used for fiber Bragg gratings (FBG). This method allows stripping of the protective layers from single fibers and from multi-fiber ribbon cables. It also allows stripping of the protective layers at an end section of the cable or in a middle section (mid-span).
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: January 21, 2003
    Assignee: Resonetics, Inc.
    Inventors: Jeffrey Bernstein, James Angell, Pascal Miller
  • Patent number: 6501045
    Abstract: A new method and apparatus for moving an excimer laser beam relative to a workpiece to control the wall profile of laser machined features, such as holes and grooves. An excimer laser beam is displaced relative to a workpiece in a substantially circular motion and the substantially circular motion is further displaced relative to the workpiece to correspond to a desired shape.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: December 31, 2002
    Assignees: Resonetics, Inc., Kawamura Sangyo Co., Ltd.
    Inventors: Jeffrey Bernstein, Pascal Miller, Hideyuki Morishita
  • Patent number: 5155594
    Abstract: A method and apparatus for transmitting a sequence of image frames by encoding interframe error data features the steps of compiling a spatially decomposed image of a background of the sequence of image frames, spatially decomposing a warped image of a previous frame, and spatially decomposing a new input image. The spatially decomposed input image is compared with the spatially decomposed background image and with the spatially decomposed warped image. An error signal defining the spatially decomposed input image is generated based on these comparisons.
    Type: Grant
    Filed: May 10, 1991
    Date of Patent: October 13, 1992
    Assignee: PictureTel Corporation
    Inventors: Jeffrey Bernstein, Bernd Girod, Xiancheng Yuan
  • Patent number: 5150209
    Abstract: A method and apparatus for encoding interframe error data in an image transmission system, and in particular in a motion compensated image transmission system for transmitting a sequence of image frames from a transmitter to a receiver, employ hierarchical entropy coded lattice threshold quantization to increase the data compression of the images being transmitted. The method and apparatus decimate an interframe predicted image data and an uncoded current image data, and apply hierarchical entropy coded lattice threshold quantization encoding to the resulting pyramid data structures. Lossy coding is applied on a level-by-level basis for generating the encoded data representation of the image difference between the predicted image data and the uncoded original image. The method and apparatus are applicable to systems transmitting a sequence of image frames (or other pattern data, such as speech) both with and without motion compensation.
    Type: Grant
    Filed: May 10, 1991
    Date of Patent: September 22, 1992
    Assignee: PictureTel Corporation
    Inventors: Richard L. Baker, Jeffrey Bernstein, Bernd Girod, Xiancheng Yuan, Edmund Thompson
  • Patent number: D368478
    Type: Grant
    Filed: January 27, 1995
    Date of Patent: April 2, 1996
    Assignee: PictureTel Corporation
    Inventors: Jeffrey Bernstein, Benjamin Beck