Abstract: An image processing system incorporates a distortion correction (DC) sub-system in order to quickly correct skewed images. The DC sub-system includes a buffer, a processor and a sparse matrix table (SMT). The buffer is sized according to an amount of distortion in an input image. Input image pixels from an input frame are buffered in the buffer, and other input image pixels from the same frame overwrite the buffered input image pixels, reducing latency of the DC sub-system. The SMT is dynamically configurable and provides mapping values for mapping output pixels to input pixels. The processor implements combinational logic, including multipliers, lookup tables and adders. The combinational logic interpolates flow control parameters, pixel coordinate values, and pixel intensity values. The distortion correction values are streamed to a display or provided to a subsequent image processing block for further processing.

Abstract: A microcoded processor that uses microinstructions to reduce power consumption utilizing low power consumption registers to store most recently retrieved data from a high power consumption control store; a control store in combination with an indirect register file to provide the micro-orders necessary for operation of the microcoded processor without extending the size of the microinstruction; and a microcode driven single clock cycle control to turn off circuitry when not needed.

Abstract: A nested hierarchical plurality of microcoded compute engines where each successive compute engine is coupled to a source bus and a sink bus of another microcoded computed engine at a different hierarchical level, where one microcoded compute engine may be a replacement of a scratchpad memory or FIFO from a pre-existing design. A communication scheme for communicating between and within various hierarchical layers of microcoded compute engines and a piano roll of bitmapped barrier objects for synchronizing activities of various microcomputer engines.

Abstract: A present novel and non-trivial system, apparatus, and method for generating HUD image data from synthetic image data is disclosed. Based on a multi-channel pixel intensity data set generated by a synthetic vision system, a single-channel pixel intensity data set representative of a lighted solid image of terrain comprised of a plurality of intensities of one color may be generated. The single-channel pixel intensity image data set may be determined as a function of multi-channel pixel intensity data set and channel weighting, where channel weighting may be based on sky and/or terrain colors employed by an SVS. Based on the multi-channel pixel intensity data set, a three-dimensional perspective scene outside the aircraft may be presented to the pilot on a HUD combiner. Also, the multi-channel pixel intensity data set may be modified by using at least one chroma key, where such chroma key may be assigned to a specific multi-channel pixel intensity value.

Abstract: In some embodiments, a method for high-performance terrain rendering may include one or more of the following steps: (a) obtaining elevation data, (b) determining slope of a terrain surface, (c) selecting a shading model to apply to the terrain surface based upon the slope of the terrain surface, (d) determining if a vehicle's heading has changed, and (e) aligning the shading model index based upon current heading.

Abstract: Presently disclosed are a method and apparatus for generating graphics in a protected manner by establishing a user graphics partition while in an executive context. Once the user context is established, an operating mode is switched to the user context and then executing a user graphics program while in the user context. The operating mode then reverts to the executive context when the user context expires.

Abstract: Techniques and systems for driving multiple tiled displays from a single digital video source can include a plurality of displays arranged in tiled fashion to form a tiled display, a plurality of display drivers corresponding to the plurality of displays, and a video receiver board coupled to the plurality of display drivers via a communication bus. The video receiver board communicates streams of pixel information to the plurality of display drivers.

Abstract: A network processor with a high performance in computing throughput, size and power density for use in applications such as Software Defined Radio (SDR) mesh topology. The network processor uses a core architecture comprised of a programmable microcoded sequencer to implement state management and control, a data manipulation subsystem controlled by fully decoded microinstructions. To save power, the core architecture employs a fully decoded microcoded control unit, multiplexer based register select/write logic, between 10000 to 20000 gates, a power consumption of less than 10 mW.

Abstract: A cutting tool is provided. The cutting tool includes a tool body having a plurality of slots therein for receiving cutting inserts. An annular ring is fixed to the tool body. The annular ring has a plurality of cooling grooves adjacent the slots for directing air to the cutting insert. The slots are provided at acute angles in two planes to provide air flow to the cutting insert.

Abstract: A rotary cutting tool (10) having a plurality of removable cutting inserts (16) is provided. The rotary cutting tool (10) comprises a rotary tool body (12) for rotation about a central shaft. The tool body includes an outer profile peripheral surface (18). A plurality of slots (24) extend radially inwardly from the outer peripheral edge of the tool body. A plurality of cutting inserts (16) are placed in the slots (24).

Abstract: A rotary cutting tool having a plurality of removable cutting inserts is provided. The rotary cutting tool comprises a rotary tool body for rotation about a central shaft. A plurality of slots extend radially inwardly from the outer peripheral edge of the tool body for supplying a plurality of cutting inserts. Each of the cutting inserts has a geometrical configuration. The geometrical configuration is for engagement with an annular rib on an attachment ring. A pair of attachment rings entrap the tool body and cutting inserts therebetween. The ribs on the attachment rings contact only the insert by way of an interference fit with the geometrical configuration on the tool insert and the geometry of the groove in the tool body thereby locking the tool insert with respect to the tool body.

Abstract: A rotary cutting tool having a plurality of removable cutting inserts is provided. The rotary cutting tool comprises a rotary tool body for rotation about a central shaft. The tool body includes an outer profile peripheral surface. A plurality of slots extend radially inwardly from the outer peripheral edge of the tool body. A plurality of cutting inserts are placed in the slots. Each of the cutting inserts has side edges defining an outermost edge and a geometrical configuration thereon. The geometrical configuration is for engagement with an annular rib on an attachment ring. A pair of attachment rings entrap the tool body and cutting inserts therebetween. The ribs on the attachment rings contact only the insert by way of an interference fit with the geometrical configuration on the tool insert and the geometry of the groove in the tool body thereby locking the tool insert with respect to the tool body.

Abstract: This invention relates to power transmission belts having multiple longitudinally extending ribs, and particularly, to an improved belt with a cross sectional profile that includes a clearance space that connects adjacent ribs, curved opposing surfaces in the pulley contact area, and a curved rib apex. The inventive belts cross sectional profile design maximizes the performance of each region of the rib profile. The invention separates the rib profile design into three critical areas: the belts rib.backslash.pulley contact surfaces; the clearance space that connects adjacent ribs and separates the pulley apex from the root of the rib; and the belt rib apex. The improved power transmission belt overcomes piling and noise problems associated with previous belt designs.

Abstract: Aliasing on a video display resulting from digital sampling and appearing as jagged lines and crawling movement is eliminated by controlling the intensity of video display pixels as a function of distance from the ideal line location. Intensity values are stored in an intensity lookup table as a function of two values. For the middle portion of a line, the two values are the shorter of the distance from a pixel in either the x-direction or y-direction and the smaller of the slope with respect to the x-axis or the y-axis. For line end points, the two values are the distances of the pixel from the end point in the x-direction and the y-direction.

Abstract: An abrading tool (10) particularly well adapted for abrading rubberized components. The tool (10) comprises a hardened steel substrate (12) having a matrix bonding layer (14) thereover. A plurality of hard particles (18) are disposed at least partially within the matrix bonding layer (14). An outer coating (20) of a hard refractory material is deposited simultaneously about the hard particles (18) and matrix bonding layer (14) by utilizing either a physical or chemical vapor deposition technique. The outer coating (20) increases the abrading characteristics and longevity of the tool (10).

Abstract: A multichannel moving map display having a first channel for processing of background geographical data and inputting said process data into a display memory for scanning by a display and a second channel for generating cultural features and storing the same in a second display memory for scanning by the display. A dual bank display memory concept is disclosed for both the first and second display memories.

Abstract: Apparatus as disclosed which comprises a register normally operable in the parallel data in/parallel data out mode but which has control mechanisms for allowing it to be converted to a serial data in/serial data out register. This register comprises part of a register based state machine. When the register is locked in a given mode so that a predefined control bit pattern is maintained within the register while the rest of the state machine operates in a normal manner, the control bit pattern is iteratively executed which in turn allows the use of an oscilloscope to observe signals in the signal transmission path of the state machine.

Abstract: A logical AND and logical OR gate are utilized in conjunction with two signals forming bits to be added for ascertaining the value of generate and propagate signals. The generate signal is passed to the output whenever the carry input is a logic zero and the propagate signal is supplied to the output whenever the carry signal is a logic one. This simplification of the approach to generating ripple carry signals substantially reduces the number of transistor to a value of about one-half that utilized in the prior art.

Abstract: Synchronously clocked gating apparatus is illustrated for time multiplexing signals into and out of a register simultaneously whereby a single pin can be utilized for the two sets of data transfer rather than the two pins required in the prior art.

Abstract: When a state machine such as a computer is inoperative, the flow of data can occur in so many different ways that it is at times difficult to ascertain the portions of the state machine that are causing the problems. Whether the problems are caused by original design or later failure of components, the present invention can determine at least the general area of the problem and often the specific bit introducing the problem, by setting a predefined control bit pattern into a register and ascertaining whether or not the bit pattern returned to the register after a predefined sequence of operations matches design expectations. As illustrated, this may take the form of serially inserting data into a normally parallel operated register to form the predefined control bit pattern, which then is applied to a sequencer whose output address is used to address a word in ROM, and the addressed word as well as the address itself, is loaded into the register.