Patents by Inventor Jeffrey Dyck

Jeffrey Dyck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10331823
    Abstract: A computer-implemented method for quickly analyzing the effect of process, voltage, temperature, and other variations when the variation analysis or circuit structure can be hierarchically composed into nested loops. The method has two main steps: first, it hierarchically generates a set of points and inserts them into a flat list of tuples, where each tuple contains a point from each level in the looping hierarchy. Second, it efficiently identifies and simulates failing tuples with the assistance of modeling to order the tuples to simulate. By using the present method, a designer does not have to simulate the full ECD at each and every statistical process point or PVT corner, which can same considerable time or compute effort.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: June 25, 2019
    Assignee: Mentor Graphics Corporation
    Inventors: Trent Lorne McConaghy, Joel Cooper, Jeffrey Dyck, Megan Marsh
  • Patent number: 9483602
    Abstract: A method and system to estimate failure rates in designs. N Monte Carlo samples are drawn from the random distribution that describes process variation in the design. A subset of these samples is selected, and that subset of Ninit samples are simulated (with a circuit simulator) to measure a performance value for each sample. A model is constructed, using the values of the Ninit process points as training inputs, and the corresponding Ninit performance values as training outputs. The candidate Monte Carlo samples are from the N Monte Carlo samples that have not yet been simulated. Each candidate is simulated on the model to get predicted performance values, and the samples are ordered in ascending (or descending) order of the predicted performance values. Simulation of candidates samples is then begun, in that order. The sampling and simulation will stops once there is sufficient confidence that all failures are found.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: November 1, 2016
    Assignee: SOLIDO DESIGN AUTOMATION INC.
    Inventors: Trent Lorne McConaghy, Joel Cooper, Jeffrey Dyck, Kyle Fisher
  • Publication number: 20160275223
    Abstract: A computer-implemented method for quickly analyzing the effect of process, voltage, temperature, and other variations when the variation analysis or circuit structure can be hierarchically composed into nested loops. The method has two main steps: first, it hierarchically generates a set of points and inserts them into a flat list of tuples, where each tuple contains a point from each level in the looping hierarchy. Second, it efficiently identifies and simulates failing tuples with the assistance of modeling to order the tuples to simulate. By using the present method, a designer does not have to simulate the full ECD at each and every statistical process point or PVT corner, which can same considerable time or compute effort.
    Type: Application
    Filed: October 24, 2014
    Publication date: September 22, 2016
    Inventors: Trent Lorne MCCONAGHY, Joel COOPER, Jeffrey DYCK, Megan MARSH
  • Publication number: 20160024421
    Abstract: The invention provides an ionic liquid composition having the following generic structural formula (1): wherein R1, R2, R3, and R4 are each independently a hydrocarbon group containing at least 4 carbon atoms, and R5 is a branched hydrocarbon group containing 4 to 8 carbon atoms atoms. The invention also provides a lubricant composition containing an ionic liquid dissolved in a base oil.
    Type: Application
    Filed: July 28, 2014
    Publication date: January 28, 2016
    Inventors: Jun Qu, Huimin Luo, Yan Zhou, Jeffrey Dyck, Todd Graham
  • Patent number: 8929872
    Abstract: Growing demand for high-rate wireless data services is increasing the power consumption requirements of mobile devices. In particular, some smart mobile devices or smart phones are configured to allow multiple software applications to run simultaneously. Some of the applications receive and/or pull data from servers in communication with the network. The more frequently these software applications are provided with access to the data channel the greater the demand on the power supply. Accordingly, there lies a challenge to regulate transmissions to and from a mobile device without adversely impacting quality-of-service (QoS). A method of managing power while maintaining a robust quality-of-service (QoS) is provided by managing the frequency at which a paging channel or the like is monitored. Complimentary methods of changing the frequency of transmission of alerts on a paging channel or the like is also provided.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: January 6, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Jeffrey A. Dyck, Gregory R. Lie, Roberto Masciovecchio, Paul R. Johnson
  • Patent number: 8638790
    Abstract: Systems and methodologies are described that facilitate enhanced data service functionality for data services operating in a multi-processor computing environment. As described herein, respective processors and/or other components can be utilized to form a Smart Peripheral Subsystem (SPS). As further described herein, the SPS can operate in association with a modem processor and an application processor at a mobile computing device in order to reduce loading at the application processor and improve memory usage efficiency. In the case of a mobile computing device sharing a network connection with a tethered computing device, the SPS can couple a modem interface associated with the mobile computing device and an interface through which the disparate computing device is tethered to the mobile computing device such that operations such as Layer 2 (L2) framing and/or de-framing, Network Address Translation (NAT), or the like can be offloaded to the SPS under various circumstances.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: January 28, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Idreas Mir, Jeffrey A. Dyck, Gerald J. Chambers, Samson Jim, Steven J. Doerfler, Marcello Lioy, Uppinder S. Babbar
  • Patent number: 8588253
    Abstract: A method and apparatus are provided for efficiently transferring data between a first and second processors having shared memory. A plurality of data packets are aggregated into a packet bundle at the first processor. The packet bundle is then transferred from the first processor to the second processor using the shared memory, wherein the transfer of the packet bundle is performed in a single context switch at the first processor. The packet bundle is then unbundled into individual data packets at the second processor, wherein a processing load of the second processor is reduced due to the aggregation of the data packets into the packet bundle by the first processor.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: November 19, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Jeffrey A. Dyck, Brian F. Costello, Vamsi K. Dokku, Udayakumar U. Menon, Amit M. Singh
  • Patent number: 8589138
    Abstract: A system and method to analyze analog, mixed-signal, and custom digital circuits. The system and method displays to a user characteristic values of a circuit and statistical uncertainty values of the characteristic values early in a sampling or characterization run of the circuit. The characteristic values and their statistical uncertainties are updated as the sampling or characterization run progresses. The user can halt the sampling or characterization run once a desired level of uncertainty is attained. The system can automatically halt the sampling or characterization run, once the statistical uncertainty lie within a pre-determined range.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: November 19, 2013
    Assignee: Solido Design Automation Inc.
    Inventors: Trent Lorne McConaghy, Charles Cazabon, Kristopher Breen, Amit Gupta, Jeffrey Dyck, Jiandong Ge, David Callele, Shawn Rusaw, Joel Cooper, Anthony Arkles, Samer Sallam, Jason Coutu
  • Patent number: 8494670
    Abstract: For application to analog, mixed-signal, and custom digital circuits, a system and method to extract circuit-specific process/environmental corners that is yield-aware and/or specification-aware. Simulation data from previous Monte Carlo-based verification actions can be re-used.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: July 23, 2013
    Assignee: Solido Design Automation Inc.
    Inventors: Trent Lorne McConaghy, Jeffrey Dyck, Jiandong Ge
  • Publication number: 20120259446
    Abstract: For application to analog, mixed-signal, and custom digital circuits, a system and method to extract circuit-specific process/environmental corners that is yield-aware and/or specification-aware. Simulation data from previous Monte Carlo-based verification actions can be re-used.
    Type: Application
    Filed: April 6, 2011
    Publication date: October 11, 2012
    Applicant: SOLIDO DESIGN AUTOMATION INC.
    Inventors: Trent Lorne MCCONAGHY, Jeffrey DYCK, Jiandong GE
  • Patent number: 8281270
    Abstract: A method for proximity-aware circuit design where a set of layout constraint values that satisfy predetermined performance or yield goals is determined in accordance with a layout effect model. One of the layout constraint values is then selected as a constraint input to layout design, and a design layout is performed with the selected layout constraint value to provide a semiconductor circuit design for the semiconductor circuit. The set of layout constraint values can be determined by varying an instance parameter of the layout effect model to determine a set of instance parameters that satisfy the at least one predetermined performance or yield goal in accordance with the layout effect model, and determining layout constraints associated with each instance parameter of the set of instance parameters, thus providing a number of candidates in a design space that can be evaluated according to performance and/or yield tradeoffs.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: October 2, 2012
    Assignee: Solido Design Automation Inc.
    Inventors: Patrick G. Drennan, Ryan Silk, Joel Cooper, Jeffrey Dyck, Samer Sallam, Trent Lome McConaghy
  • Publication number: 20120238284
    Abstract: Growing demand for high-rate wireless data services is increasing the power consumption requirements of mobile devices. In particular, some smart mobile devices or smart phones are configured to allow multiple software applications to run simultaneously. Some of the applications receive and/or pull data from servers in communication with the network. The more frequently these software applications are provided with access to the data channel the greater the demand on the power supply. Accordingly, there lies a challenge to regulate transmissions to and from a mobile device without adversely impacting quality-of-service (QoS). A method of managing power while maintaining a robust quality-of-service (QoS) is provided by managing the frequency at which a paging channel or the like is monitored. Complimentary methods of changing the frequency of transmission of alerts on a paging channel or the like is also provided.
    Type: Application
    Filed: September 15, 2011
    Publication date: September 20, 2012
    Applicant: QUALCOMM Incorporated
    Inventors: Jeffrey A. Dyck, Gregory R. Lie, Roberto Masciovecchio, Paul R. Johnson
  • Patent number: 8074189
    Abstract: For application to analog, mixed-signal, and custom digital circuits, a system and method to begin with a complex problem description that encompasses many variables from statistical manufacturing, the circuit's environment, and the circuit's design parameters, but then apply techniques to prune the scope of the problem to make it manageable for manual design and more efficient automated design, and finally use that pruned problem for more efficient and effective design.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: December 6, 2011
    Assignee: Solido Design Automation Inc.
    Inventors: Trent Lorne McConaghy, Jeffrey Dyck, Samer Sallam, Kristopher Breen, Joel Cooper, Jiandong Ge
  • Patent number: 8024682
    Abstract: For application to analog, mixed-signal, and custom digital circuits, a system and method to do: global statistical optimization (GSO), global statistical characterization (GSC), global statistical design (GSD), and block-specific design. GSO can perform global yield optimization on hundreds of variables, with no simplifying assumptions. GSC can capture and display mappings from design variables to performance, across the whole design space. GSC can handle hundreds of design variables in a reasonable time frame, e.g., in less than a day, for a reasonable number of simulations, e.g., less than 100,000. GSC can capture design variable interactions and other possible nonlinearities, explicitly capture uncertainties, and intuitively display them. GSD can support the user's exploration of design-to-performance mappings with fast feedback, thoroughly capturing design variable interactions in the whole space, and allow for more efficiently created, more optimal designs.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: September 20, 2011
    Assignee: Solido Design Automation Inc.
    Inventors: Trent Lorne McConaghy, Pat Drennan, Joel Cooper, Jeffrey Dyck, David Callele, Shawn Rusaw, Samer Sallam, Jiangdon Ge, Anthony Arkles, Kristopher Breen, Sean Cocks
  • Patent number: 8009588
    Abstract: A system and method for transparent Mobile IP registration within PPP negotiation uses a mobile telephone to relay messages between terminal equipment and a Foreign Agent (FA). An IPCP configuration request message by the terminal equipment requesting the assignment of an IP address is modified by the mobile telephone to delete the IP address request option. Other configuration options are forwarded unchanged by the mobile telephone to the peer/network. The peer/network responds with an acknowledgement of the requested configuration options and flow control between the terminal and the MT is asserted to permit Mobile IP registration. In the course of Mobile IP registration, and IP address is assigned to the mobile unit by the FA. Upon completion of the Mobile IP registration, flow control between the mobile telephone and the terminal is deasserted and the IP address assigned during Mobile IP registration is provided to the terminal equipment.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: August 30, 2011
    Assignee: QUALCOMM Incorporated
    Inventors: Nischal Abrol, Jeffrey Dyck, Marcello Lioy
  • Publication number: 20110055782
    Abstract: A method for proximity-aware circuit design where a set of layout constraint values that satisfy predetermined performance or yield goals is determined in accordance with a layout effect model. One of the layout constraint values is then selected as a constraint input to layout design, and a design layout is performed with the selected layout constraint value to provide a semiconductor circuit design for the semiconductor circuit. The set of layout constraint values can be determined by varying an instance parameter of the layout effect model to determine a set of instance parameters that satisfy the at least one predetermined performance or yield goal in accordance with the layout effect model, and determining layout constraints associated with each instance parameter of the set of instance parameters, thus providing a number of candidates in a design space that can be evaluated according to performance and/or yield tradeoffs.
    Type: Application
    Filed: August 27, 2010
    Publication date: March 3, 2011
    Applicant: Solido Design Automation Inc.
    Inventors: Patrick G. DRENNAN, Ryan Silk, Joel Cooper, Jeffrey Dyck, Samer Sallam, Trent Lorne McCONAGHY
  • Patent number: 7761834
    Abstract: For application to analog, mixed-signal, and custom digital circuits, a system and method to improve the flow of setting up a set of simulations, a characterization, or optimization problem via an interactive circuit schematic. A system and method to visualize circuit simulation data in which at least one of the views is an enhanced, interactive schematic view.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: July 20, 2010
    Assignee: Solido Design Automation Inc.
    Inventors: Trent Lorne McConaghy, Kristopher Breen, Amit Gupta, David Callele, Jeffrey Dyck, Charles Cazabon, Joel Cooper, Shawn Rusaw
  • Patent number: 7710905
    Abstract: A method and system for link latency determination in a Mobile IP network determine an unloaded network delay; set a current estimated delay; initiate a current round trip estimation process; and set a retry timer. If the retry timer expires before the process completes, the method and system update the predetermined backoff period and repeat the preceding two steps. After re-registration, the method and system reset the current estimated delay time. The link latency determination optimizes the re-registration process between a mobile device and an agent device, thereby enhancing mobile device communications, minimizing network loading, and optimizing network traffic levels.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: May 4, 2010
    Assignee: QUALCOMM Incorporated
    Inventors: Jeffrey Dyck, Jayanth Mandayam
  • Patent number: 7707533
    Abstract: A system and method of generating a set of circuit simulation data, applying data mining to for knowledge extraction from the data, and graphically presenting the extracted knowledge in a format that is easy to digest to a designer.
    Type: Grant
    Filed: July 20, 2007
    Date of Patent: April 27, 2010
    Assignee: Solido Design Automation Inc.
    Inventors: Trent Lorne McConaghy, Amit Gupta, Kristopher Breen, Charles Cazabon, Shawn Rusaw, Jeffrey Dyck, Jason Coutu, Joel Cooper, Jiandong Ge, David Callele
  • Publication number: 20100014459
    Abstract: Systems and methodologies are described that facilitate enhanced data service functionality for data services operating in a multi-processor computing environment. As described herein, respective processors and/or other components can be utilized to form a Smart Peripheral Subsystem (SPS). As further described herein, the SPS can operate in association with a modem processor and an application processor at a mobile computing device in order to reduce loading at the application processor and improve memory usage efficiency. In the case of a mobile computing device sharing a network connection with a tethered computing device, the SPS can couple a modem interface associated with the mobile computing device and an interface through which the disparate computing device is tethered to the mobile computing device such that operations such as Layer 2 (L2) framing and/or de-framing, Network Address Translation (NAT), or the like can be offloaded to the SPS under various circumstances.
    Type: Application
    Filed: June 19, 2009
    Publication date: January 21, 2010
    Applicant: QUALCOMM, Incorporated
    Inventors: Idris Mir, Jeffrey A. Dyck, Gerald J. Chambers, JR., Samson Jim, Steven J. Doerfier, Marcello Lioy