Patents by Inventor Jeffrey F. DeNatale
Jeffrey F. DeNatale has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230133753Abstract: A sensor module including a microelectromechanical systems (“MEMS”) gyroscope resonator and an accelerometer positioned adjacent the MEMS gyroscope resonator is disclosed herein. The MEMS gyroscope resonator and accelerometer can be co-fabricated on a sensor die and a control circuit can be electrically coupled to the sensor die. The control circuit can be configured to receive signals from and control the MEMS gyroscope resonator and the accelerometer. An interposer can be positioned between and mechanically coupled to the sensor module and a substrate, wherein the interposer is configured to relieve stresses imposed by an operating environment on the sensor module and the substrate.Type: ApplicationFiled: November 1, 2021Publication date: May 4, 2023Inventors: Jeffrey F. DeNatale, Philip A. Stupar
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Patent number: 10416246Abstract: A physics package apparatus for a compact atomic device includes a container having a plurality of slots and an open end, a first vapor cell carrier slidably seated in one of the plurality of slots, a vapor cell coupled to the first vapor cell carrier; and a lid sealably enclosing the open end so that the vapor cell is sealably enclosed in the container.Type: GrantFiled: April 28, 2017Date of Patent: September 17, 2019Assignee: TELEDYNE SCIENTIFIC & IMAGING, LLCInventors: Jeffrey F. DeNatale, Robert L. Borwick, III, Philip A. Stupar, Viktor Tarashansky
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Patent number: 10325707Abstract: A magnetic field coil assembly includes a plurality of stacked dielectric layers, each of the plurality of stacked dielectric layers having a partial-loop conductive trace on a first side of the layer, a via interconnect in communication with the partial-loop conductive trace and extending from the first side of the layer to a side of the layer opposite from the first side, and a vapor cell reception aperture; and a vapor cell axially extending through the plurality of vapor cell reception apertures so that the plurality of partial-loop conductive traces is electrically connected serially to form a continuous coil disposed around the vapor cell that would create a magnetic field upon application of a current.Type: GrantFiled: April 28, 2017Date of Patent: June 18, 2019Assignee: TELEDYNE SCIENTIFIC & IMAGING, LLCInventors: Jeffrey F. DeNatale, Robert L. Borwick, III, Philip A. Stupar, Viktor Tarashansky
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Publication number: 20180313913Abstract: A physics package apparatus for a compact atomic device includes a container having a plurality of slots and an open end, a first vapor cell carrier slidably seated in one of the plurality of slots, a vapor cell coupled to the first vapor cell carrier; and a lid sealably enclosing the open end so that the vapor cell is sealably enclosed in the container.Type: ApplicationFiled: April 28, 2017Publication date: November 1, 2018Inventors: Jeffrey F. DeNatale, Robert L. Borwick, III, Philip A. Stupar, Viktor Tarashansky
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Publication number: 20180315529Abstract: A magnetic field coil assembly includes a plurality of stacked dielectric layers, each of the plurality of stacked dielectric layers having a partial-loop conductive trace on a first side of the layer, a via interconnect in communication with the partial-loop conductive trace and extending from the first side of the layer to a side of the layer opposite from the first side, and a vapor cell reception aperture; and a vapor cell axially extending through the plurality of vapor cell reception apertures so that the plurality of partial-loop conductive traces is electrically connected serially to form a continuous coil disposed around the vapor cell that would create a magnetic field upon application of a current.Type: ApplicationFiled: April 28, 2017Publication date: November 1, 2018Inventors: Jeffrey F. DeNatale, Robert L. Borwick, III, Philip A. Stupar, Viktor Tarashansky
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Patent number: 10084035Abstract: An arrangement for making electrical contact to a vertical capacitor having top and bottom metal layers separated by a dielectric, and at least one trench. Recesses are formed in an oxide layer over the capacitor to provide access to the top and bottom metal layers. The recesses include contacting portions preferably positioned such that there is no overlap between them and any of the trenches. Metal in the recesses, preferably copper, forms electrical contacts to the vertical capacitor's metal layers and enables reliable bonding to copper metallization on other layers such as an ROIC layer. ‘Dummy’ capacitors may be tiled on portions of the IC where there are no vertical capacitors, preferably with the top surfaces of their top metal at a height approximately equal to that of the top surface of the vertical capacitor's top metal, thereby enabling the IC to be planarized with a uniform planarization thickness.Type: GrantFiled: December 30, 2015Date of Patent: September 25, 2018Assignee: TELEDYNE SCIENTIFIC & IMAGING, LLCInventors: Alexandros P. Papavasiliou, Jeffrey F. DeNatale, David J. Gulbransen, Alan Roll
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Publication number: 20170194418Abstract: An arrangement for making electrical contact to a vertical capacitor having top and bottom metal layers separated by a dielectric, and at least one trench. Recesses are formed in an oxide layer over the capacitor to provide access to the top and bottom metal layers. The recesses include contacting portions preferably positioned such that there is no overlap between them and any of the trenches. Metal in the recesses, preferably copper, forms electrical contacts to the vertical capacitor's metal layers and enables reliable bonding to copper metallization on other layers such as an ROIC layer. ‘Dummy’ capacitors may be tiled on portions of the IC where there are no vertical capacitors, preferably with the top surfaces of their top metal at a height approximately equal to that of the top surface of the vertical capacitor's top metal, thereby enabling the IC to be planarized with a uniform planarization thickness.Type: ApplicationFiled: December 30, 2015Publication date: July 6, 2017Inventors: Alexandros P. Papavasiliou, Jeffrey F. DeNatale, David J. Gulbransen, Alan Roll
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Patent number: 9607748Abstract: A micro-fabricated electromagnetic device is provided for on-circuit integration. The electromagnetic device includes a core. The core has a plurality of electrically insulating layers positioned alternatingly between a plurality of magnetic layers to collectively form a continuous laminate having alternating magnetic and electrically insulating layers. The electromagnetic device includes a coil embedded in openings of the semiconductor substrate. An insulating material is positioned in the cavity and between the coil and an inner surface of the core. A method of manufacturing the electromagnetic device includes providing a semiconductor substrate having openings formed therein. Windings of a coil are electroplated and embedded in the openings. The insulating material is coated on or around an exposed surface of the coil.Type: GrantFiled: September 3, 2014Date of Patent: March 28, 2017Assignee: Teledyne Scientific & Imaging, LLCInventors: Robert E. Mihailovich, Alex P. Papavasiliou, Vivek Mehrotra, Philip A. Stupar, Robert L. Borwick, III, Rahul Ganguli, Jeffrey F. DeNatale
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Patent number: 9409768Abstract: An apparatus for providing localized heating as well as protection for a vibrating MEMS device. A cap over a MEMS gyroscope includes an embedded temperature sensor and a heater. The temperature sensor is a trace made of a material with a known temperature/resistance coefficient, which loops back along itself to reduce electromagnetic interference. The heater is a resistive metal trace which also loops back along itself. The temperature sensor and the heater provide localized temperature stabilization for the MEMS gyroscope to reduce temperature drift in the MEMS gyroscope.Type: GrantFiled: October 28, 2013Date of Patent: August 9, 2016Assignee: Teledyne Scientific & Imaging, LLCInventors: Jeffrey F. DeNatale, Philip A. Stupar
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Publication number: 20160064470Abstract: A micro-fabricated electromagnetic device is provided for on-circuit integration. The electromagnetic device includes a core. The core has a plurality of electrically insulating layers positioned alternatingly between a plurality of magnetic layers to collectively form a continuous laminate having alternating magnetic and electrically insulating layers. The electromagnetic device includes a coil embedded in openings of the semiconductor substrate. An insulating material is positioned in the cavity and between the coil and an inner surface of the core. A method of manufacturing the electromagnetic device includes providing a semiconductor substrate having openings formed therein. Windings of a coil are electroplated and embedded in the openings. The insulating material is coated on or around an exposed surface of the coil.Type: ApplicationFiled: September 3, 2014Publication date: March 3, 2016Inventors: Robert E. Mihailovich, Alex P. Papavasiliou, Vivek Mehrotra, Philip A. Stupar, Robert L. Borwick, III, Rahul Ganguli, Jeffrey F. DeNatale
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Publication number: 20150185416Abstract: The present disclosure discloses silicon waveguides with embedded active circuitry fabricated from silicon wafers utilizing photolithographic microfabrication techniques to define waveguide structures and embedded circuit recesses for receiving integrated circuitry. The method of fabricating the waveguides utilizes a double masking layer, one layer of which at least partially defines at least one waveguide and the other layer of which at least partially defines the at least one waveguide and at least one embedded circuit recess. The photolithographic microfabrication techniques are sufficiently precise for the required small structural features of high frequency waveguides and the double masking layer allows the method to be completed more efficiently. The basic fabrication method may be extended to provide batch arrays to mass produce silicon waveguide devices.Type: ApplicationFiled: March 13, 2015Publication date: July 2, 2015Inventors: Philip A. Stupar, Robert L. Borwick, III, Robert E. Mihailovich, Jeffrey F. DeNatale
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Patent number: 9029259Abstract: A self-aligning hybridization method enabling small pixel pitch hybridizations with self-alignment and run-out protection. The method requires providing a first IC, the surface of which includes at least one electrical contact for connection to a mating IC, depositing an insulating layer on the IC's surface, patterning and etching the insulating layer to provide recesses in the insulating layer above each of the electrical contacts, and depositing a deformable conductive material in each of the recesses. A mating IC is provided which includes conductive pins positioned to align with the deformable conductive material in respective ones of the recesses on the first chip. The first and mating ICs are then hybridized by bringing the conductive pins into contact with the deformable conductive material in the recesses, such that the conductive material deforms and the pins make electrical contact with the first IC's electrical contacts.Type: GrantFiled: December 17, 2012Date of Patent: May 12, 2015Assignee: Teledyne Scientific & Imaging, LLCInventors: Philip A. Stupar, Yu-Hua K. Lin, Donald E. Cooper, Jeffrey F. DeNatale, William E. Tennant
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Publication number: 20150115377Abstract: An apparatus for providing localized heating as well as protection for a vibrating MEMS device. A cap over a MEMS gyroscope includes an embedded temperature sensor and a heater. The temperature sensor is a trace made of a material with a known temperature/resistance coefficient, which loops back along itself to reduce electromagnetic interference. The heater is a resistive metal trace which also loops back along itself. The temperature sensor and the heater provide localized temperature stabilization for the MEMS gyroscope to reduce temperature drift in the MEMS gyroscope.Type: ApplicationFiled: October 28, 2013Publication date: April 30, 2015Inventors: Jeffrey F. DeNatale, Philip A. Stupar
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Patent number: 8995800Abstract: A method of fabricating silicon waveguides with embedded active circuitry from silicon-on-insulator wafers utilizes photolithographic microfabrication techniques to define waveguide structures and embedded circuit recesses for receiving integrated circuitry. The method utilizes a double masking layer, one layer of which at least partially defines at least one waveguide and the other layer of which at least partially defines the at least one waveguide and at least one embedded circuit recess. The photolithographic microfabrication techniques are sufficiently precise for the required small structural features of high frequency waveguides and the double masking layer allows the method to be completed more efficiently. The basic fabrication method may be extended to provide batch arrays to mass produce silicon waveguide devices.Type: GrantFiled: July 6, 2012Date of Patent: March 31, 2015Assignee: Teledyne Scientific & Imaging, LLCInventors: Philip A. Stupar, Robert L. Borwick, III, Robert E. Mihailovich, Jeffrey F. DeNatale
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Patent number: 8937513Abstract: An apparatus includes a chip-scale atomic clock (CSAC) alkali vapor cell seated on a silicon substrate that is suspended in a package by a metalized Parylene strap having Parylene anchors embedded in a silicon frame, the Parylene strap comprising an extended rigidizing structure, and a plurality of electrical pins extending into an interior of the package, the plurality of electrical pins in electrical communication with the CSAC cell through the metalized Parylene strap, where the CSAC cell is mechanically connected to the package and thermally insulated from the package.Type: GrantFiled: May 9, 2013Date of Patent: January 20, 2015Assignee: Teledyne Scientific & Imaging, LLC.Inventors: Jeffrey F. DeNatale, Philip A. Stupar, Yu-Hua Lin, Robert L. Borwick, III, Alexandros P. Papavasiliou
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Patent number: 8847409Abstract: A hybridization method comprises providing a first IC, depositing a first metal layer over electrical contacts on the IC, depositing an insulating layer over the first metal layer and contacts, providing recesses in the insulating layer above each contact, and depositing metal such that the sidewalls of the recesses provide electrical continuity between the top of each recess and the electrical contact it is above. The recesses are backfilled with a sacrificial planarization material and planarized, and a second metal layer is deposited, patterned and etched over each backfilled recess to form openings over each recess and to separate the pixels. The sacrificial planarization material is removed to form compliant structures overhanging the recesses and thereby creating micro-sockets capable of receiving corresponding conductive pins associated with a mating IC. Electrical contact between the first and mating ICs is accomplished through shear between the pins and the micro-sockets.Type: GrantFiled: June 3, 2013Date of Patent: September 30, 2014Assignee: Teledyne Scientific & Imaging, LLCInventors: Jeffrey F. DeNatale, Yu-Hua K. Lin, Philip A. Stupar
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Patent number: 8826514Abstract: Microfabricated inductors with through-wafer vias and including a first wafer and a second wafer, each wafer having a plurality of metal fillings therein, and a plurality of metal conductors connecting the plurality of metal fillings together to form a spiral. A method for producing an inductor including steps of forming a first plurality of vias in a first substrate, filling the first plurality of vias in the first substrate with a first plurality of metal fillings, forming a first plurality of metal conductors, connecting pairs of the first plurality of metal fillings together using the first plurality of metal conductors to form a spiral, performing the foregoing steps similarly on a second substrate formed with a second plurality of vias filled with a second plurality of metal fillings, and bonding the first substrate with the second substrate.Type: GrantFiled: February 14, 2011Date of Patent: September 9, 2014Assignee: Teledyne Scientific & Imaging, LLCInventors: Alexandros Papavasiliou, Jeffrey F. DeNatale, Philip A. Stupar, Robert L. Borwick, III
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Publication number: 20140205231Abstract: A method of fabricating silicon waveguides with embedded active circuitry from silicon-on-insulator wafers utilizes photolithographic microfabrication techniques to define waveguide structures and embedded circuit recesses for receiving integrated circuitry. The method utilizes a double masking layer, one layer of which at least partially defines at least one waveguide and the other layer of which at least partially defines the at least one waveguide and at least one embedded circuit recess. The photolithographic microfabrication techniques are sufficiently precise for the required small structural features of high frequency waveguides and the double masking layer allows the method to be completed more efficiently. The basic fabrication method may be extended to provide batch arrays to mass produce silicon waveguide devices.Type: ApplicationFiled: July 6, 2012Publication date: July 24, 2014Inventors: PHILIP A. STUPAR, Robert L. Borwick, III, Robert E. Mihailovich, Jeffrey F. DeNatale
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Patent number: 8742308Abstract: An imaging array comprises a photodetector layer, a readout IC (ROIC) layer, and a charge storage capacitor layer which is distinct from the photodetector and ROIC layers; the layers are electrically interconnected to form the array. The capacitors within the charge storage capacitor layer are preferably micromachined; the charge storage capacitor layer can be an interposer layer or an outer layer.Type: GrantFiled: December 15, 2010Date of Patent: June 3, 2014Assignee: Teledyne Scientific & Imaging, LLCInventors: Jeffrey F. DeNatale, David J. Gulbransen, William E. Tennant, Alexandros P. Papavasiliou
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Patent number: 8654332Abstract: A method is disclosed for manufacturing a chip-scale optics module for an optical interrogator. The method includes aligning a polarization axis of a linear polarizer to an angle of 45 degrees from a fast axis of a quarter wave plate to enable circular polarization of a beam, when a beam is introduced to the linear polarizer, coupling the linear polarizer to the quarter wave plate after the aligning to form a circular polarizing filter sheet and then dicing the circular polarizing filter sheet to obtain a plurality of chip-scale circular polarizing filters. Each of the chip-scale circular polarizing filters is diced to have an edge that defines a polarization location index for the linear polarizer. A linear polarizer plate face of one of the chip-scale circular polarizing filters is then positioned so that the linear polarizer plate face is aligned with and parallel to an output face of a laser, whereby the polarization axis of the linear polarizer is not orthogonal to a polarization axis of the laser.Type: GrantFiled: June 22, 2011Date of Patent: February 18, 2014Assignee: Teledyne Scientific & Imaging, LLCInventors: Robert L. Borwick, Jeffrey F DeNatale