Patents by Inventor Jeffrey Lee Sonntag

Jeffrey Lee Sonntag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210150027
    Abstract: In one form, an integrated circuit includes a plurality of electromagnetic fault injection (EMFI) sensors and a security management circuit. Each EMFI sensor includes a sense loop having a conductor around a corresponding portion of logic circuitry whose operation is affected by an electromagnetic pulse, and a detector circuit coupled to the sense loop and having an output for providing a pulse detection signal in response to a pulse of at least a predetermined magnitude. The security management circuit performs a protection operation to secure the integrated circuit in response to an activation of a corresponding pulse detection signal of one of the plurality of EMFI sensors.
    Type: Application
    Filed: November 18, 2019
    Publication date: May 20, 2021
    Applicant: Silicon Laboratories Inc.
    Inventors: Jeffrey Lee Sonntag, Timothy Thomas Rueger
  • Patent number: 8503575
    Abstract: A pulse response for a receiver, as an array PR, is found from the receiver's symbol stream. For a continuous stream of arbitrary data, a value of the array PR[k] can be determined from the signal levels of the symbols received. The stream of received data is input to a FIFO. Between the first and last locations of the FIFO is the symbol referred to herein as Dn. Symbols located in the FIFO before Dn are referred to as Dn?x. Symbols located in the FIFO after Dn are referred to as Dn+x. Dn differs from the other FIFO symbols in that its signal level can be measured with an adjustable error slicer. The ISI effect of any Dn?k upon Dn can be measured, and thus any PR[k] measured, by measuring the average signal level of Dn when only certain types of data streams occur in the FIFO.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: August 6, 2013
    Assignee: Synopsys, Inc.
    Inventors: Christopher Scott Jones, Jeffrey Lee Sonntag, John Theodore Stonick, Daniel Keith Weinlader
  • Patent number: 8015539
    Abstract: The DC offset of a differential signal can be changed by differentially shifting the DC offset of each of its signals. Techniques are presented for changing, in a controlled way, the DC offset of a differential signal as received by a receiver of a data transmission system. Several classes of example embodiments, utilizing digitally controllable voltage or current sources, are presented. The classes differ based upon such factors as coupling capacitor arrangement and use of termination resistors. Specific embodiments, within each class, differ based upon such factors as whether voltage or current sources are used and the characteristics of such sources. Once the DC offset of a differential signal has been changed, the effect of such change on a performance metric can be measured. Example applications include the ability to determine a differential signal level that results in BER having a particular level and determination of differential signal margin.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: September 6, 2011
    Assignee: Synopsys, Inc.
    Inventors: Jeffrey Lee Sonntag, Daniel Keith Weinlader, David Andrew Yokoyama-Martin
  • Patent number: 8000917
    Abstract: A periodic broadband signal can be used to determine the S21 measurement for a channel by stimulating the channel across a spectrum of interest. The channel response to such broadband signal can be measured from undersampled data captured at the receiver. The Fourier transform of the broadband signal as received, divided by the Fourier transform of broadband signal as transmitted, constitutes the S21. A physically contiguous IC can integrate both a receiver circuit, at which S21 is to be measured, along with an undersampler for sampling the received broadband signal. To maximize signal to noise, a pattern for the broadband signal can be selected to maximize the minimum power across the spectrum of interest. A pattern generator for the broadband signal can be integrated on the same physically contiguous IC with a multiplexer that can select either the pattern generator, or a typical source of data, for transmission into the channel.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: August 16, 2011
    Assignee: Synopsys Inc.
    Inventor: Jeffrey Lee Sonntag
  • Publication number: 20090290666
    Abstract: A pulse response for a receiver, as an array PR, is found from the receiver's symbol stream. For a continuous stream of arbitrary data, a value of the array PR[k] can be determined from the signal levels of the symbols received. The stream of received data is input to a FIFO. Between the first and last locations of the FIFO is the symbol referred to herein as Dn. Symbols located in the FIFO before Dn are referred to as Dn?x. Symbols located in the FIFO after Dn are referred to as Dn+x. Dn differs from the other FIFO symbols in that its signal level can be measured with an adjustable error slicer. The ISI effect of any Dn?k upon Dn can be measured, and thus any PR[k] measured, by measuring the average signal level of Dn when only certain types of data streams occur in the FIFO.
    Type: Application
    Filed: July 30, 2009
    Publication date: November 26, 2009
    Applicant: SYNOPSYS, INC.
    Inventors: Christopher Scott Jones, Jeffrey Lee Sonntag, John Theodore Stonick, Daniel Keith Weinlader
  • Patent number: 7586998
    Abstract: A pulse response for a receiver, as an array PR, is found from the receiver's symbol stream. For a continuous stream of arbitrary data, a value of the array PR[k] can be determined from the signal levels of the symbols received. The stream of received data is input to a FIFO. Between the first and last locations of the FIFO is the symbol referred to herein as Dn. Symbols located in the FIFO before Dn are referred to as Dn?x. Symbols located in the FIFO after Dn are referred to as Dn+x. Dn differs from the other FIFO symbols in that its signal level can be measured with an adjustable error slicer. The ISI effect of any Dn?k upon Dn can be measured, and thus any PR[k] measured, by measuring the average signal level of Dn when only certain types of data streams occur in the FIFO.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: September 8, 2009
    Assignee: Synopsys, Inc.
    Inventors: Christopher Scott Jones, Jeffrey Lee Sonntag, John Theodore Stonick, Daniel Keith Weinlader
  • Patent number: 7545886
    Abstract: An eye opening measurement technique, that does not interrupt a receiver's normal operation, is used as a metric for optimizing any selected parameters of the receiver's operation. If eye opening size decreases, as a result of a change to a receiver parameter, the polarity for stepwise changes is reversed such that the next change is in the opposite direction. Other types of search procedures can be used. Eye opening size is the difference between the eye's upper and lower edges. Measurement of eye opening size is accomplished using a data and auxiliary slicer that find each “edge” of an eye opening based upon the slicers' level of agreement. Depending upon the level of agreement, and whether symbols of the upper or lower region of the eye are counted, the threshold of the auxiliary slicer can be adjusted in the direction necessary to converge on the eye edge sought.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: June 9, 2009
    Assignee: Synopsys, Inc.
    Inventors: Jeffrey Lee Sonntag, John Theodore Stonick, Daniel Keith Weinlader
  • Publication number: 20080232520
    Abstract: An eye opening measurement technique, that does not interrupt a receiver's normal operation, is used as a metric for optimizing any selected parameters of the receiver's operation. If eye opening size decreases, as a result of a change to a receiver parameter, the polarity for stepwise changes is reversed such that the next change is in the opposite direction. Other types of search procedures can be used. Eye opening size is the difference between the eye's upper and lower edges. Measurement of eye opening size is accomplished using a data and auxiliary slicer that find each “edge” of an eye opening based upon the slicers' level of agreement. Depending upon the level of agreement, and whether symbols of the upper or lower region of the eye are counted, the threshold of the auxiliary slicer can be adjusted in the direction necessary to converge on the eye edge sought.
    Type: Application
    Filed: April 30, 2008
    Publication date: September 25, 2008
    Applicant: SYNOPSYS, INC.
    Inventors: Jeffrey Lee Sonntag, John Theodore Stonick, Daniel Keith Weinlader
  • Patent number: 7424380
    Abstract: Probability distribution functions (PDFs), of a periodic input data signal, can be used to provide eye-diagram information. An advantage of PDFs, over conventional approaches to eye-diagram collection, is that analog-to-digital conversion can be accomplished by the slicer of a receiver, provided the slicer can programmably change its threshold. A cumulative distribution function (CDF), at a particular phase of a desired eye-diagram, can be collected by having a receiver's slicer scan its threshold level. For each threshold level, a fixed number of symbols can be analyzed as follows to produce a CDF value: count the number of times a particular symbol value occurs. The derivative of a CDF can produce its PDF, where each PDF can represent a “slice” of a desired eye-diagram. For a non-periodic input signal, an eye diagram can still be formed so long as the percentage occurrence, of each symbol value, remains at least approximately the same.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: September 9, 2008
    Assignee: Synopsys, Inc.
    Inventors: Jeffrey Lee Sonntag, John Theodore Stonick, Daniel Keith Weinlader
  • Publication number: 20080208529
    Abstract: A periodic broadband signal can be used to determine the S21 measurement for a channel by stimulating the channel across a spectrum of interest. The channel response to such broadband signal can be measured from undersampled data captured at the receiver. The Fourier transform of the broadband signal as received, divided by the Fourier transform of broadband signal as transmitted, constitutes the S21. A physically contiguous IC can integrate both a receiver circuit, at which S21 is to be measured, along with an undersampler for sampling the received broadband signal. To maximize signal to noise, a pattern for the broadband signal can be selected to maximize the minimum power across the spectrum of interest. A pattern generator for the broadband signal can be integrated on the same physically contiguous IC with a multiplexer that can select either the pattern generator, or a typical source of data, for transmission into the channel.
    Type: Application
    Filed: March 28, 2008
    Publication date: August 28, 2008
    Applicant: SYNOPSYS, INC.
    Inventor: Jeffrey Lee Sonntag
  • Patent number: 7400694
    Abstract: An eye opening measurement technique, that does not interrupt a receiver's normal operation, is used as a metric for optimizing any selected parameters of the receiver's operation. If eye opening size decreases, as a result of a change to a receiver parameter, the polarity for stepwise changes is reversed such that the next change is in the opposite direction. Other types of search procedures can be used. Eye opening size is the difference between the eye's upper and lower edges. Measurement of eye opening size is accomplished using a data and auxiliary slicer that find each “edge” of an eye opening based upon the slicers' level of agreement. Depending upon the level of agreement, and whether symbols of the upper or lower region of the eye are counted, the threshold of the auxiliary slicer can be adjusted in the direction necessary to converge on the eye edge sought.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: July 15, 2008
    Assignee: Synopsys, Inc.
    Inventors: Jeffrey Lee Sonntag, John Theodore Stonick, Daniel Keith Weinlader
  • Publication number: 20080144742
    Abstract: The DC offset of a differential signal can be changed by differentially shifting the DC offset of each of its signals. Techniques are presented for changing, in a controlled way, the DC offset of a differential signal as received by a receiver of a data transmission system. Several classes of example embodiments, utilizing digitally controllable voltage or current sources, are presented. The classes differ based upon such factors as coupling capacitor arrangement and use of termination resistors. Specific embodiments, within each class, differ based upon such factors as whether voltage or current sources are used and the characteristics of such sources. Once the DC offset of a differential signal has been changed, the effect of such change on a performance metric can be measured. Example applications include the ability to determine a differential signal level that results in BER having a particular level and determination of differential signal margin.
    Type: Application
    Filed: February 28, 2008
    Publication date: June 19, 2008
    Applicant: SYNOPSYS, INC.
    Inventors: Jeffrey Lee Sonntag, Daniel Keith Weinlader, David Andrew Yokoyama-Martin
  • Patent number: 7382825
    Abstract: A periodic broadband signal can be used to determine the S21 measurement for a channel by stimulating the channel across a spectrum of interest. The channel response to such broadband signal can be measured from undersampled data captured at the receiver. The Fourier transform of the broadband signal as received, divided by the Fourier transform of broadband signal as transmitted, constitutes the S21. A physically contiguous IC can integrate both a receiver circuit, at which S21 is to be measured, along with an undersampler for sampling the received broadband signal. To maximize signal to noise, a pattern for the broadband signal can be selected to maximize the minimum power across the spectrum of interest. A pattern generator for the broadband signal can be integrated on the same physically contiguous IC with a multiplexer that can select either the pattern generator, or a typical source of data, for transmission into the channel.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: June 3, 2008
    Assignee: Synopsys, Inc.
    Inventor: Jeffrey Lee Sonntag
  • Patent number: 7383518
    Abstract: The DC offset of a differential signal can be changed by differentially shifting the DC offset of each of its signals. Techniques are presented for changing, in a controlled way, the DC offset of a differential signal as received by a receiver of a data transmission system. Several classes of example embodiments, utilizing digitally controllable voltage or current sources, are presented. The classes differ based upon such factors as coupling capacitor arrangement and use of termination resistors. Specific embodiments, within each class, differ based upon such factors as whether voltage or current sources are used and the characteristics of such sources. Once the DC offset of a differential signal has been changed, the effect of such change on a performance metric can be measured. Example applications include the ability to determine a differential signal level that results in BER having a particular level and determination of differential signal margin.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: June 3, 2008
    Assignee: Synopsys, Inc.
    Inventors: Jeffrey Lee Sonntag, Daniel Keith Weinlader, David Andrew Yokoyama-Martin
  • Patent number: 7262621
    Abstract: A functional block under test (FBUT), comprising mixed-signal or analog circuits, can be tested by a digital test machine (DTM). A DTM sources test vectors to, and expects to receive certain vectors back from, a DUT. The DUT is a single, physically contiguous, IC upon which is integrated the FBUT, a mixed-signal generate and capture unit (MSGC) and a control system. The test vectors can include computer programs for instructing the control system on how to perform mixed-signal or analog-domain tests of the FBUT using resources of the MSGC (such as DACs and ADCs). The test vectors can also include data that effects the operation of a parameterized test procedure, where the test procedure is part of the control system. The control system, in accordance with the test procedure, uses the MSGC to perform mixed-signal or analog-domain tests of the FBUT. The FBUT can include an analog test bus.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: August 28, 2007
    Assignee: Synopsys, Inc.
    Inventors: Aaron Joseph Caffee, Christopher Scott Jones, Robert Beverly Lefferts, Ross Andrew Segelken, Jeffrey Lee Sonntag, Daniel Keith Weinlader
  • Patent number: 7236550
    Abstract: Subtraction of a signal 111 from a pulse response 110, where signal 111 provides a good approximation of the tail of pulse response 110, can provide a method for canceling the tail of pulse response 110. For continuous data streams, signals X(t), 223 and Y(t) can correspond to, respectively, signals 110, 111 and 112. X(t) differs from 110 in being a continuous data stream. 223 differs from 111 in being the low pass filtering of X(t), such low pass filtering accomplished by a unit LPF 211. Y(t) differs from 112 in being a continuous stream of equalized data, produced by subtracting the signal at 223 from X(t). A measurement unit 213, analysis unit 214 and decision unit 215 can act to continuously adapt LPF 211 such that tail cancellation equalization is continuously achieved. Measurement unit 213 can construct, from Y(t), a set of correlation measurements that can be used to adapt LPF 211.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: June 26, 2007
    Assignee: Synopsys, Inc.
    Inventors: Kannan Krishna, Jeffrey Lee Sonntag, John Theodore Stonick
  • Patent number: 7194365
    Abstract: An undersampling system can comprise an IC that has integrated, on the same physically contiguous IC, both an undersampler circuit and a receiver circuit whose input is to be monitored by undersampling. For a current phase of sample clocks relative to an input signal, the input signal is sampled until a sufficient number of samples are collected in a one dimensional histogram associated with the current phase. The phase of the sample clocks, relative to the input signal, can then be shifted. Such phase shift can be accomplished by a phase mixer. The phase shift can be small enough to provide sufficient resolution in a composite sampled image of the input signal. A mean value can be computed for each one dimensional histogram, resulting in a representation of the undersampled signal as a function of time that is suitable for further processing.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: March 20, 2007
    Assignee: Synopsys, Inc.
    Inventor: Jeffrey Lee Sonntag
  • Patent number: 6826246
    Abstract: A phase-locked loop (PLL) with reduced jitter is provided. The PLL includes dual path voltage-controlled oscillator inputs, with a control voltage from a loop filter sent through a low gain path and an integrated error voltage sent through a high gain path. The error voltage is derived from the difference between a reference value representing averaged control voltage and a predetermined portion of the control voltage.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: November 30, 2004
    Assignee: Agere Systems, Inc.
    Inventors: James E. C. Brown, Jeffrey Lee Sonntag
  • Patent number: 6356132
    Abstract: An integrated circuit has a plurality of signal paths, at least one of which has a delay cell. The delay cell has an input terminal for receiving an signal from the signal path, and a plurality of delay paths for generating a corresponding plurality of delayed signals delayed by different delays from the input signal. At least one of the delay paths employs two different-delay subpaths coupled in parallel to provide a delayed signal delayed by an interpolated delay. A multiplexer (MUX) of the delay cell provides one of the delayed signals as an output signal to the signal path based on a control input signal applied to the multiplexer.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: March 12, 2002
    Assignee: Agere Systems Guardian Corp.
    Inventors: Angelo Rocco Mastrocola, Jeffrey Lee Sonntag
  • Patent number: 6275090
    Abstract: An integrated circuit includes a self-calibrating resistor circuit comprising a resistor string, a comparator, a state machine, a reference voltage source, and a reference current source. The current source typically comprises a voltage reference, typically a bandgap reference, and a temperature-independent resistor having a value REXT. In operation, a reference current IREF flows through the resistor string. During a calibration period, the voltage across the string is compared to the bandgap reference voltage, VBG, by the comparator, which controls the state of the state machine. The outputs of the state machine turn on or off the resistors in the string until the voltage across the string, VR, is approximately equal to the reference voltage. The resistance of the resistor string is then equal to RBG=VBG/IREF, which is proportional to REXT, and thus is typically independent of process and temperature.
    Type: Grant
    Filed: April 9, 1997
    Date of Patent: August 14, 2001
    Assignee: Agere Systems Guardian Corp.
    Inventors: Harley Franklin Burger, Jr., Jeffrey Lee Sonntag, Suharli Tedja