Patents by Inventor Jeffrey Robert Perry

Jeffrey Robert Perry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190102499
    Abstract: A method includes receiving a circuit design including a plurality of components associated with a plurality of component parameters. The method further includes adjusting a value of a particular component parameter of the plurality of component parameters based on a tolerance to generate a modified plurality of component parameters. The method further includes determining, based on inputting the modified plurality of component parameters into a circuit calculator, that an operating value of the circuit design is sensitive to the particular component parameter. The method further includes selecting a simulation of the circuit design to perform based on the particular component parameter. The method further includes performing the simulation to determine whether the circuit design supports one or more design limits.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 4, 2019
    Inventors: Pradeep Kumar CHAWDA, Shrikrishna SRINIVASAN, Mac DIEN, Ning DONG, Makram Monzer MANSOUR, Jeffrey Robert PERRY
  • Publication number: 20190079577
    Abstract: A method includes obtaining a first waveform representing an output characteristic with respect to time of a switched-mode power supply. The method further includes removing a high frequency component from the first waveform to generate a modified waveform and determining a stable value of the modified waveform. The method further includes determining an operating parameter of the switched-mode power supply based on the modified waveform, the stable value, or a combination thereof. The one or parameter includes an overshoot value associated with the switched-mode power supply, an undershoot value associated with the switched-mode power supply, or a settling time associated with the switched-mode power supply. The method further includes outputting an indication of the parameter.
    Type: Application
    Filed: September 7, 2018
    Publication date: March 14, 2019
    Inventors: Pradeep Kumar CHAWDA, Ning DONG, Makram Monzer MANSOUR, Jeffrey Robert PERRY
  • Publication number: 20170024505
    Abstract: A method for compensation network design in a power converter design system is provided that includes computing optimal values for compensation components in a compensation network based on a plurality of loop specifications comprising crossover frequency (Fco), phase margin (PM), Gain Margin (GM), and low frequency gain (LFG), and applying changes to a power converter design comprising the compensation network based on the optimal values.
    Type: Application
    Filed: July 22, 2016
    Publication date: January 26, 2017
    Inventors: Srikanth Pam, Yudhister Satija, Pradeep Kumar Chawda, Makram Mounzer Mansour, Robert Mason Hanrahan, Jeffrey Robert Perry
  • Patent number: 8712741
    Abstract: A system may include a database configured to store information including characteristics of a plurality of components. The system may further include a server in communication with the database and configured to: receive design parameters indicative of a plurality of power supply loads to be powered; determine a plurality of power supply architectures that may be used to provide power supply solutions satisfying the plurality of loads, each power supply architecture including at least one position requiring a component configured to satisfy a load requirement; for each one of at least a subset of the plurality of power supply architectures, determine, based on the characteristics of the plurality of components, at least one component configured to satisfy the corresponding load requirement for each position of the one of the power supply architectures; and generate at least one power supply design in accordance with the power supply architectures and the determined components.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: April 29, 2014
    Assignee: National Semiconductor Corporation
    Inventors: Jeffrey Robert Perry, Martin Garrison, Dien Mac, Khang Nguyen, Ajay Padgaonkar, Phil Gibson, Scott Hung, Werner Berns
  • Patent number: 8332789
    Abstract: A method may include receiving an input from an optimization control that indicates a value along a scale, wherein the value is indicative of a design tradeoff between at least optimization for a first parameter of an electrical design and an optimization for a second parameter of the electrical design, wherein the value places an emphasis on the first parameter and an emphasis on the second parameter such that when the value on the scale is closer to the first parameter a larger emphasis is placed on the first parameter of the electrical design and when the value on the scale is closer to the second parameter a larger emphasis is placed on the second parameter of the electrical design. The method may further include choosing components for the electrical design based on the value indicated using the optimization control, the emphases affecting the components selected for the electrical design.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: December 11, 2012
    Assignee: National Semiconductor Corporation
    Inventors: Jeffrey Robert Perry, Malcolm Humphrey, Mark Davidson, Dien Mac, Denislav D. Petkov
  • Publication number: 20110320175
    Abstract: A system may include a database configured to store information including characteristics of a plurality of components. The system may further include a server in communication with the database and configured to: receive design parameters indicative of a plurality of power supply loads to be powered; determine a plurality of power supply architectures that may be used to provide power supply solutions satisfying the plurality of loads, each power supply architecture including at least one position requiring a component configured to satisfy a load requirement; for each one of at least a subset of the plurality of power supply architectures, determine, based on the characteristics of the plurality of components, at least one component configured to satisfy the corresponding load requirement for each position of the one of the power supply architectures; and generate at least one power supply design in accordance with the power supply architectures and the determined components.
    Type: Application
    Filed: June 27, 2011
    Publication date: December 29, 2011
    Inventors: Jeffrey Robert Perry, Martin Garrison, Dien Mac, Khang Nguyen, Ajay Padgaonkar, Phil Gibson, Scott Hung, Werner Berns
  • Publication number: 20110276938
    Abstract: A method may include receiving an input from an optimization control that indicates a value along a scale, wherein the value is indicative of a design tradeoff between at least optimization for a first parameter of an electrical design and an optimization for a second parameter of the electrical design, wherein the value places an emphasis on the first parameter and an emphasis on the second parameter such that when the value on the scale is closer to the first parameter a larger emphasis is placed on the first parameter of the electrical design and when the value on the scale is closer to the second parameter a larger emphasis is placed on the second parameter of the electrical design. The method may further include choosing components for the electrical design based on the value indicated using the optimization control, the emphases affecting the components selected for the electrical design.
    Type: Application
    Filed: May 10, 2011
    Publication date: November 10, 2011
    Inventors: Jeffrey Robert Perry, Malcolm Humphrey, Mark Davidson, Dien Mac, Denislav D. Petkov
  • Patent number: 7966588
    Abstract: A user may optimize a circuit design using a control presented within an Internet browser. The user can change the optimization value of the circuit that in turn places more or less emphasis on a parameter (e.g. foot print vs. efficiency). Once optimized for the values, the list of components matching the design as well as the optimization operating values are presented to the user.
    Type: Grant
    Filed: January 26, 2008
    Date of Patent: June 21, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Jeffrey Robert Perry, Malcolm Humphrey, Mark Davidson, Dien Mac, Denislav D. Petkov
  • Patent number: 7441219
    Abstract: The present invention enables a user to create, modify, simulate and save an electrical circuit using an Internet browser over an Internet connection. The user can change the connectivity of the circuit as well as add and/or remove components in a free form manner. The schematic is displayed within a web page on the user's machine with which the user may interact. Block symbols may be used to represent at least a portion of the schematic.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: October 21, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Jeffrey Robert Perry, Martin Garrison, Khang Nguyen, Richard Levin, Wanda Carol Garrett, Phillip Gibson, Benjamin H. Lee
  • Patent number: 6931369
    Abstract: A method and apparatus for thermally simulating a circuit over a network is provided. Techniques are provided for designing a circuit that satisfies user-specified functional requirements received over a network. Based on the specified requirements, components and a topology for constructing the circuit are automatically determined. The components determined during this operation have operational values such that, when the components are arranged according to the topology to form the circuit, the circuit satisfies the user-specified functional requirements. One or more web pages that identify the components are then delivered to the browser over the network. The component and topology information may be used to generate a schematic diagram that is delivered in a web page to the user over the network. The user may thermally simulate the designed circuit. Many characteristics of the board may be adjusted to provide an accurate thermal simulation.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: August 16, 2005
    Assignee: National Semiconductor Corporation
    Inventors: Jeffrey Robert Perry, Martin Garrison, Rex L. Allison, III, Richard Levin, Phil Gibson, Vandana A. Sojrani, Khang Nguyen, Wanda Carol Garrett, John D. Perzow
  • Patent number: 6877033
    Abstract: Techniques are provided for designing a circuit that satisfies user-specified functional requirements without the user having to obtain additional education or possess specialized software. According to one embodiment, user-specified functional requirements are received over a network from a client executing a browser. The network may be, for example, the Internet. Based on the user-specified requirements, components and a topology for constructing the circuit are automatically determined. The components determined during this operation have operational values such that, when the components are arranged according to the topology to form the circuit, the circuit satisfies the user-specified functional requirements. One or more web pages that identify the components are then delivered to the browser over the network. According to one aspect of the invention, the component and topology information is used to generate a schematic diagram that is delivered in a web page to the user over the network.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: April 5, 2005
    Assignee: National Semiconductor Corporation
    Inventors: Wanda Carol Garrett, Martin Garrison, Jeffrey Robert Perry, Rex Liebert Allison, III, Richard Joel Levin, Vandana Sojorani
  • Publication number: 20040268283
    Abstract: The present invention enables a user to create, modify, simulate and save an electrical circuit using an Internet browser over an Internet connection. The user can change the connectivity of the circuit as well as add and/or remove components in a free form manner. The schematic is displayed within a web page on the user's machine with which the user may interact. Block symbols may be used to represent at least a portion of the schematic.
    Type: Application
    Filed: June 24, 2003
    Publication date: December 30, 2004
    Applicant: NATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Jeffrey Robert Perry, Martin Garrison, Khang Nguyen, Richard Levin, Wanda Carol Garrett, Phillip Gibson, Benjamin H. Lee
  • Patent number: 6678877
    Abstract: A method and apparatus for PCB layout of a circuit simulated over a network is provided. Techniques are provided for designing a circuit that satisfies user-specified functional requirements received over a network. Based on the specified requirements, components and a topology for constructing the circuit are automatically determined. The components determined during this operation have operational values such that, when the components are arranged according to the topology to form the circuit, the circuit satisfies the user-specified functional requirements. The components are placed on a PC board having landing areas designed to accommodate all of the anticipated component sizes for the type of circuit being designed. The PC board may be cropped to the desired size. The PCB may be cropped automatically or manually by the user. The component and topology information may be used to generate a schematic diagram that is delivered in a web page to the user over the network.
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: January 13, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Jeffrey Robert Perry, Martin Garrison, Rex L. Allison, III, Richard Levin, Phil Gibson, Vandana A. Sojrani, Khang Nguyen, Wanda Carol Garrett
  • Patent number: 5705419
    Abstract: In the manufacture of memory cells, horizontal etching is controlled in a manner which prevents the formation of stringers between adjacent cells without undercutting the sidewalls of a memory cell.
    Type: Grant
    Filed: July 27, 1994
    Date of Patent: January 6, 1998
    Assignee: National Semiconductor Corp.
    Inventors: Jeffrey Robert Perry, S. M. Reza Sadjadi, Kristen Ann Luttinger