Patents by Inventor Jeffrey Scott Brown

Jeffrey Scott Brown has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6144086
    Abstract: A method and structure for improving the latch-up characteristic of semiconductor devices is provided. A dual depth STI is used to isolate the wells from each other. The trench has a first substantially horizontal surface at a first depth and a second substantially horizontal surface at a second depth which is deeper than the first depth. The n- and p-wells are formed on either side of the trench. A highly doped region is formed in the substrate underneath the second substantially horizontal surface of the trench. The highly doped region abuts both the first and the second wells and extends the isolation of the trench.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: November 7, 2000
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey Scott Brown, Robert J. Gauthier, Jr., Randy William Mann, Steven Howard Voldman
  • Patent number: 6097068
    Abstract: A semiconductor device and method of fabrication for such device in which a P- epitaxial layer is positioned above a P++ substrate. A P++ buried layer implant is positioned within the device between the P++ substrate and the P- epitaxial layer. A connecting p+ implant is placed within the epitaxial layer above the buried p+ blanket layer implant. In one exemplary embodiment, the device includes a shallow P-well with the P+ connecting implant in a position within the epitaxial layer connecting the shallow P-well and the buried P+ blanket implant layer.
    Type: Grant
    Filed: January 22, 1998
    Date of Patent: August 1, 2000
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey Scott Brown, Stephen Scott Furkay, Robert John Gauthier, Jr., Xiaowei Tian, Minh Ho Tong, Steven Howard Voldman
  • Patent number: 6057184
    Abstract: A semiconductor device and method of fabrication for such device in which a P- epitaxial layer is positioned above a P++ substrate. A P++ buried layer implant is positioned within the device between the P++ substrate and the P- epitaxial layer. A connecting p+ implant is placed within the epitaxial layer above the buried p+ blanket layer implant. In one exemplary embodiment, the device includes a shallow P-well with the P+ connecting implant in a position within the epitaxial layer connecting the shallow P-well and the buried P+ blanket implant layer.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: May 2, 2000
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey Scott Brown, Stephen Scott Furkay, Robert John Gauthier, Jr., Xiaowei Tian, Minh Ho Tong, Steven Howard Voldman