Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.

Abstract: A device is manufactured by providing a semiconductor fin protruding from a major surface of a silicon substrate comprising silicon. A liner and a shallow trench isolation (STI) region are formed adjacent the semiconductor fin. A silicon cap is deposited over the semiconductor fin. The resulting cap consists of crystalline silicon in the portion over the semiconductor fin and consists of amorphous silicon in the portions over the liner and STI region. An HCl etch bake process is performed to remove the portions of amorphous silicon over the liner and the STI region.

Abstract: The present invention discloses a refrigeration dehumidifier with compensation and controlling method thereof. The refrigeration dehumidifier with compensation comprises an environment-adjusting unit, a temperature-detecting unit, a humidity-detecting unit, a temperature-adjusting unit and a control unit. The temperature-adjusting unit is used to derive a plurality of adjusted temperature values by calculating or searching from a temperature table, then the real moisture values corresponding to the indoor space. The control unit is used to adjust the environment-adjusting unit based on the plurality of moisture values, in order to shorten the time achieving a target-moisture value.

Abstract: A method is provided for operating a system of an aircraft. During this method, rotation of a propulsor rotor is driven using mechanical power output by a powerplant. The powerplant includes a first drive device and a second drive device. The first drive device generates a first portion of the mechanical power. The second drive device generates a second portion of the mechanical power. A ratio between the first portion of the mechanical power and the second portion of the mechanical power is adjusted to control vibrations of the powerplant.

Abstract: A power supply system includes a plurality of power modules for supplying power to a load, and each power module provides an output current according to a modulation signal, and provides the output current to a power bus through an output end and supply the output current to the load through the power bus. Each power module is connected to a common-connected point of a signal bus to generate a second voltage level, acquires a first ratio according to a full-load output power of the conversion circuit corresponding to the controller and the full-load output power of the power module capable of outputting the maximum power, adjusts the first voltage level according to the first ratio and the second voltage level to adjust the amplified signal by adjusting the first voltage level, and adjusts the output current to a target value corresponding to the first ratio by adjusting the amplified signal.

Abstract: Apparatus and methods are provided for robust front end selection control. In one novel aspect, multi-stage head selection is provided. In one embodiment, the UE monitors one or more head-selection triggers, performs a UE Rx wide beam measurement to select at least one deactivated head as at least one standby head based on one or more coarse-beam selection criteria upon detecting at least one head-selection trigger, performs a UE Rx fine beam selection on the active head and the selected standby head, and switches the standby head as the active head based on a result of the fine Rx beam selection and head selection criteria. One or more operations are used for the multi-stage head selection, including multi-head operation, multi-CC measurement, and joint RRM and head selection operation.

Abstract: A conductive gate over a semiconductor fin is cut into a first conductive gate and a second conductive gate. An oxide is removed from sidewalls of the first conductive gate and a dielectric material is applied to the sidewalls. Spacers adjacent to the conductive gate are removed to form voids, and the voids are capped with a dielectric material to form air spacers.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a fin disposed over a semiconductor substrate, and the fin has a first width. The structure further includes an isolation region disposed around the fin, a gate electrode disposed over the fin and the isolation region, and a fill material disposed in the gate electrode. The fill material is in contact with a top surface of a portion of the semiconductor substrate, the top surface has at least a portion having a substantially flat cross-section, and the portion of the top surface has a second width substantially greater than the first width.

Abstract: A radome is provided for covering an antenna. The radome is disposed in a transmission path of a radiation from the antenna and modifies a radiation pattern of the antenna when the radiation from the antenna penetrates therethrough. The radome has a first surface and a second surface opposite to the first surface and facing the antenna, and includes a plurality of through holes penetrating through the first and second surfaces and having first and second openings on the first and second surfaces, respectively. The first openings of the through holes are allocated in at least a central area of the first surface, an inner annular area of the first surface surrounding the central area, and/or an outer annular area of the first surface surrounding the inner annular area in a manner that an area-averaged permittivity is increasing radially outwards from the central area toward the outer annular area.

Abstract: The present application provides a method for determining a gene alteration, such as a gene fusion. The present application also provides a kit for determining a gene alteration. The present application further provides a method for treating a subject by determining whether a subject is at risk for a particular cancer type or genotype and administering proper treatment.

Abstract: A semiconductor device includes: first and second active regions extending in a first direction and separated by a gap relative to a second direction; and gate structures correspondingly over the first and second active regions, the gate structures extending in the second direction; and for each active region, a portion of each of some but not all of the gate structures (gate extension) extending partially into the gap; and when viewing the gate structures as a group, the group having a notched profile relative to the second direction, where notches in the notched profile correspond to ones of the gate structures which are substantially free of extending into the gap.

Abstract: Microcapsules including a polymeric shell and an internal phase including a non-photopolymerizable reactive diluent are provided for use in microcapsule imaging sheets. Imaging sheets including microcapsules which include a non-photopolymerizable reactive diluent, and which exhibit improvements in color development (Dmax), discoloration (yellowing) resistance, mechanical properties (e.g., peel strength), and temperature latitude of imaging sheets including leuco dyes.

Abstract: A method for fabricating a semiconductor device includes the steps of forming a gate structure on a substrate, forming an epitaxial layer adjacent to the gate structure, and then forming a first cap layer on the epitaxial layer. Preferably, a top surface of the first cap layer includes a curve concave upward and a bottom surface of the first cap layer includes a planar surface higher than a top surface of the substrate.

Abstract: Compound of formula (I): wherein A1, A2, Ra, Rb, Rc, Rd, R3, R4, X, Y and G are as defined in the description, and their use in the manufacture of medicaments.

Abstract: An integrated circuit includes a front-side horizontal conducting line in a first metal layer, a front-side vertical conducting line in a second metal layer, a front-side fuse element, and a backside conducting line. The front-side horizontal conducting line is directly connected to the drain terminal-conductor of a transistor through a front-side terminal via-connector. The front-side vertical conducting line is directly connected to the front-side horizontal conducting line through a front-side metal-to-metal via-connector. The front-side fuse element having a first fuse terminal conductively connected to the front-side vertical conducting line. The backside conducting line is directly connected to the source terminal-conductor of the transistor through a backside terminal via-connector.

Abstract: In an embodiment, an apparatus includes a first pyrometer and a second pyrometer configured to monitor thermal radiation from a first point and a second point on a backside of a wafer, respectively, a first heating source in a first region and a second heating source in a second region of an epitaxial growth chamber, respectively, where a first controller adjusts an output of the first heating source and the second heating source based upon the monitored thermal radiation from the first point and the second point, respectively, a third pyrometer and a fourth pyrometer configured to monitor thermal radiation from a third point and a fourth point on a frontside of the wafer, respectively, where a second controller adjusts a flow rate of one or more precursors injected into the epitaxial growth chamber based upon the monitored thermal radiation from the first, second, third, and fourth points.

Abstract: A semiconductor structure includes first and second active regions extending in a first direction. The semiconductor structure further includes gate electrodes extending in a second direction perpendicular to the first direction. Each of the gate electrodes includes a first segment over at least one of the first active region or the second active region; a gate extension extending beyond each of the first active region and the second active region, wherein the gate extension has a uniform width in the first direction, and a conductive element, wherein a width of the conductive element in the first direction increases as a distance from the gate extension increases along an entirety of the conductive element in the second direction.

Abstract: In a method, a first dielectric layer is formed over semiconductor fins, a second dielectric layer is formed over the first dielectric layer, the second dielectric layer is recessed below a top of each of the semiconductor fins, a third dielectric layer is formed over the recessed second dielectric layer, and the third dielectric layer is recessed below the top of the semiconductor fin, thereby forming a wall fin. The wall fin includes the recessed third dielectric layer and the recessed second dielectric layer disposed over the recessed third dielectric layer. The first dielectric layer is recessed below a top of the wall fin, a fin liner layer is formed, the fin liner layer is recessed and the semiconductor fins are recessed, and source/drain epitaxial layers are formed over the recessed semiconductor fins, respectively. The source/drain epitaxial layers are separated by the wall fin from each other.

Abstract: A voltage regulator for providing a word line voltage is provided. The voltage regulator includes a voltage divider, a comparator, a boost circuit and a bypass transistor. The voltage divider is coupled between the word line voltage and a low reference voltage. The voltage divider includes resistive elements connected in series at intermediate nodes. The comparator provides an enable signal according to a divided voltage value on a divided intermediate node among the intermediate nodes. The boost circuit boosts the word line voltage in response to the enable signal. A source terminal of the bypass transistor is connected to a first intermediate node among the intermediate nodes. A drain terminal of the bypass transistor is connected to a second intermediate node among the intermediate nodes. The bypass transistor is turned-off in response to the control signal having an intermediate voltage value on the first intermediate node.

Abstract: An antifuse circuit includes a current generator and an antifuse sense unit. The current generator has at least one electronic device. The antifuse sense unit is electrically connected to the current generator, and the antifuse sense unit has at least one copied electronic device. An electronic device specification of the at least one electronic device of the antifuse sense unit is equal to an electronic device specification of the at least one copied electronic device of the current generator. The current generator supplies a current to the antifuse sense unit that senses an antifuse.