Abstract: A semiconductor structure includes an inductive metal line located in a dielectric material layer that overlies a semiconductor substrate and laterally encloses a first area; and an array of first ferromagnetic plates including a first ferromagnetic material and overlying or underlying the inductive metal line. For any first point that is selected within volumes of the first ferromagnetic plates, a respective second point exists within a horizontal surface of the inductive metal line such that a line connecting the first point and the second point is vertical or has a respective first taper angle that is less than 20 degrees with respective to a vertical direction. The magnetic field passing through the first ferromagnetic plates is applied generally along a hard direction of magnetization and the hysteresis effect is minimized.

Abstract: An optical system is provided. The optical system includes an immovable part, a second movable part, a second drive mechanism, and a second circuit mechanism. The second movable part is used for connecting to a second optical element. The second movable part is movable relative to the immovable part. The second drive mechanism is used for driving the second movable part to move relative to the immovable part. The second circuit mechanism is electrically connected to the second drive mechanism.

Abstract: A haptic feedback system is provided, including a sensing unit, a haptic feedback module, and a circuit assembly. The sensing unit is configured to detect contact with an object. The haptic feedback module is configured to transfer the contact force to the sensing unit. The circuit assembly is electrically connected to the sensing unit and the haptic feedback module.

Abstract: A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the firs surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed by the first package body.

Abstract: An optical system is provided, including a movable part, a fixed part, a first sensor, a second sensor, and a control unit, wherein an optical element is disposed on the movable part. The first and second sensors detect the movement of the movable part relative to the fixed part in a first dimension and a second dimension, and thus they respectively generate a first sensing value and a second sensing value. The control unit generates an error value according to the first sensing value and an error curve, and then calibrates the second sensing value according to the error value.

Abstract: Exemplary methods of packaging a substrate may include rotationally aligning a substrate to a predetermined angular position. The methods may include transferring the substrate to a metrology station. The methods may include measuring a topology of the substrate at the metrology station. The methods may include applying a first chucking force to the substrate to flatten the substrate. The methods may include generating a mapping of a die pattern on an exposed surface of the substrate. The methods may include transferring the substrate to a printing station. The methods may include applying a second chucking force to the substrate to flatten the substrate against a surface of the printing station. The methods may include adjusting a printing pattern based on the mapping of the die pattern. The methods may include printing the printing pattern on the exposed surface of the substrate.

Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a carrier, a base, and a first driving assembly. The carrier holds an optical element with an optical axis. The carrier is movably connected to the base. The first driving assembly drives the carrier to move relative to the base. The first driving assembly includes a driving coil disposed on the carrier, and the direction of the winding axis of the driving coil is different from the direction of the optical axis. The carrier has an abutting surface, which faces and is in direct contact with the driving coil. The maximum size of the abutting surface is greater than the maximum size of the driving coil in the direction of the optical axis.

Abstract: A composition for improving the solubility of poorly soluble substances is provided. The composition for improving the solubility of poorly soluble substances includes 60-97% by weight of cyclodextrin and/or a derivative thereof, 0.5-4% by weight of at least one water-soluble polymer and 0.4-30% by weight of at least one water-soluble stabilizer, wherein the at least one water-soluble stabilizer includes caffeine, and wherein the poorly soluble substance is a tyrosine kinase inhibitor.

Abstract: A video residual decoding apparatus is used for applying residual decoding to a transform block that is divided into sub-blocks, and includes a residual decoding circuit and a storage device. The residual decoding circuit enters a coefficient loop for decoding one or more syntax elements at each of coefficient positions within a sub-block that has at least one non-zero coefficient level. The coefficient loop includes one decoding pass and at least one other decoding pass. During the at least one other decoding pass, the residual decoding circuit records side information in the storage device, where the side information is indicative of specific coefficient positions at which specific syntax elements need to be decoded in the one decoding pass. During the one decoding pass, the residual decoding circuit refers to the side information for decoding the specific syntax elements at the specific coefficient positions, respectively.

Abstract: A newly developed algorithm and software can effectively and accurately predict the collisions for the accelerator, phantom, and patient setups, and can help physicians to choose the noncolliding and optimized beam sets efficiently via offering the ideal hits of planning target volume (PTV) and constraints of organ at risks (OARs).

Abstract: A MOS transistor includes a substrate, a first region, a second region, a source region, a drain region, an active gate stack, and a dummy gate stack. The substrate has a first conductivity. The first region having the first conductivity is formed in the substrate. The second region having a second conductivity is formed in the substrate and is adjacent to the first region. The source region with the second conductivity is formed in the first region. The drain region with the second conductivity is formed in the second region. The active gate stack is disposed on the first region. The dummy gate stack is disposed on the second region, and the dummy gate stack is electrically coupled to a variable voltage.

Abstract: A RRAM device includes a bottom electrode, a resistive material layer, a high work function layer, a top electrode, a hard mask and high work function sidewall parts. The bottom electrode, the resistive material layer, the high work function layer, the top electrode and the hard mask are sequentially stacked on a substrate. The high work function sidewall parts cover sidewalls of the top electrode and sidewalls of the hard mask, thereby constituting a RRAM cell. A method of forming said RRAM device is also provided.

Abstract: A system of collaboratively processing occurrences of events is configured to perform the following operations: transmits information of the occurrence to Asteroid_Clump_on_Duty (ACOD) and some clumps; perform a format verification, a Tally_sufficiency verification, a validation on the occurrence; each clump that performs the validation successfully claims and notifies the ACOD, Asteroid_Clump_of_Backup (ACB), and all clumps on a transmission path; performs a check on the validation; writes the occurrence data to a Satellite_Globule_Cluster (SGC) globule data structure in response to checking that the number of the passing count based on the types of clump is greater than a required threshold, wherein the SGC globule data gradually forms a Satellite_Globule_Cluster data structure. Some ACOD compete in a contest in order to write the occurrence data in Satellite_Globule_Cluster to Cardinal_Globule_Cluster(CGC).

Abstract: An integrated circuit layout includes a first standard cell and a second standard cell. The first standard cell includes first gate lines arranged along a first direction and extending along a second direction. The second standard cell abuts to one side of the first standard cell along the second direction and includes second gate lines arranged along the first direction and extending along the second direction. A first gate line width of the first gate lines and a second gate line width of the second gate lines are different. A first cell width of the first standard cell and a second cell width of the second standard cell are integral multiples of a default gate line pitch of the first gate lines and the second gate lines. At least some of the second gate lines and at least some of the first gate lines are aligned along the second direction.

Abstract: Provided is a resistive random-access memory device, including a dielectric layer located on a substrate, a first electrode which is a column located on the dielectric layer, a second electrode covering a top surface and a sidewall of the first electrode, and a variable resistance layer sandwiched between the top surface of the first electrode and the second electrode and between the sidewall of the first electrode and the second electrode and located between the second electrode and the dielectric layer.

Abstract: A flexible optical element adopting liquid crystals (LCs) as the materials for realizing electrically tunable optics is foldable. A method for manufacturing the flexible element includes patterned photo-polymerization. The LC optics can include a pair of LC layers with orthogonally aligned LC directors for polarizer-free properties, flexible polymeric alignment layers, flexible substrates, and a module for controlling the electric field. The lens power of the LC optics can be changed by controlling the distribution of electric field across the optical zone.

Abstract: A Deep Trench Isolation (DTI) structure is disclosed. A DTI structure formed in a semiconductor substrate. The DIT structure includes an isolation layer and filling material. The isolation layer is formed from a p-type semiconductor material. Sidewall portions of the isolation layer are in contact with the semiconductor substrate. A bottom portion of the isolation layer is in contact with a connection feature, which is connected to an interconnect structure and configured to apply a bias to the isolation layer of the DTI structure to achieve a controllable passivation in the semiconductor substrate.

Abstract: A MOS transistor includes a substrate, a first region, a second region, a source region, a drain region, an active gate stack, and a dummy gate stack. The substrate has a first conductivity. The first region having the first conductivity is formed in the substrate. The second region having a second conductivity is formed in the substrate and is adjacent to the first region. The source region with the second conductivity is formed in the first region. The drain region with the second conductivity is formed in the second region. The active gate stack is disposed on the first region. The dummy gate stack is disposed on the second region, and the dummy gate stack is electrically coupled to a variable voltage.

Abstract: A first conductive layer is patterned and trimmed to form a sub 30 nm conductive via on a first bottom electrode. The conductive via is encapsulated with a first dielectric layer and planarized to expose a top surface of the conductive via. A second conductive layer is deposited over the first dielectric layer and the conductive via. The second conductive layer is patterned to form a sub 60 nm second conductive layer wherein the conductive via and second conductive layer together form a T-shaped second bottom electrode. MTJ stacks are deposited on the T-shaped second bottom electrode and on the first bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and planarized to expose a top surface of the MTJ stack on the T-shaped second bottom electrode. A top electrode contacts the MTJ stack on the T-shaped second bottom electrode plug.

Abstract: A transistor device and method of making the same are disclosed. The transistor device includes one or more air gaps in one or more sidewall spacers. The one or more air gaps may be located adjacent the gate and/or above the source or drain regions of the device. Various embodiments may include different combinations of air gaps formed in one or both sidewall spacers. Various embodiments may include air gaps formed in one or both sidewall spacers adjacent to the gate and/or above the source or drain regions of the device. The formation of the air gaps may reduce unwanted parasitic and/or fringing capacitance.