Abstract: A semiconductor device includes a substrate, a first conductive feature over a portion of the substrate, and an etch stop layer over the substrate and the first conductive feature. The etch stop layer includes a silicon-containing dielectric (SCD) layer and a metal-containing dielectric (MCD) layer over the SCD layer. The semiconductor device further includes a dielectric layer over the etch stop layer, and a second conductive feature in the dielectric layer. The second conductive feature penetrates the etch stop layer and electrically connects to the first conductive feature.

Abstract: A method for forming a semiconductor device structure is provided. The method includes successively forming a first multi-layer etch stop structure and an insulating layer over a first conductive feature. The insulating layer and the first multi-layer etch stop structure are successively etched to form an opening substantially aligned to the first conductive feature. A second conductive feature is formed in the opening. The formation of the first multi-layer etch stop structure and the second multi-layer etch stop structure includes forming a first metal-containing dielectric layer, forming a silicon-containing dielectric layer over the first metal-containing dielectric layer, and forming a second metal-containing dielectric layer over the silicon-containing dielectric layer. The second metal-containing dielectric layer has a material that is different from the material of the first metal-containing dielectric layer.

Abstract: A weight training device, comprising a holding element, a first counterweight element, and a first fastening element. The holding element has a locking member on one end, and one side of the holding element is provided with at least one first upper positioning member. The first counterweight element has a first locking member and a first position limiting slot on one end, wherein the first locking member is for locking the locking member of the holding element. One end of the first fastening element is position limited in the first position limiting slot in an elastic manner, and another end of the first fastening element has a first stopper for fixing the first upper positioning member to prevent a relative rotation between the holding element and the first counterweight element, so that a stable connection can be formed between the holding element and the first counterweight element for easy use, and the safety use can be ensured.

Abstract: A foldable basketball stand has at least one hoop on a rear surface of a backboard on an upper half of an upper portion of a front frame. A middle portion of left/right front rod of the front frame has a first and a second left/right joints respectively. Rear/front ends of a left-top rod and a left-bottom rod of a left frame are connected to a left-middle rod/the left-front rod respectively. Rear/front ends of a right-top rod and a right-bottom rod of a right frame are connected to a right-middle rod/the right-front rod respectively. Two ends of left/right supporting rod are connected to a middle portion of the left/right top rod and the left/right front rod respectively. An upper portion of a rear frame has a stop portion. Left/right sides of the rear frame are connected to the left/right middle rods through left/right connecting rods respectively.

Abstract: A semiconductor device includes a substrate, a first conductive feature over a portion of the substrate, and an etch stop layer over the substrate and the first conductive feature. The etch stop layer includes a silicon-containing dielectric (SCD) layer and a metal-containing dielectric (MCD) layer over the SCD layer. The semiconductor device further includes a dielectric layer over the etch stop layer, and a second conductive feature in the dielectric layer. The second conductive feature penetrates the etch stop layer and electrically connects to the first conductive feature.

Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a metal cap layer over an upper surface of the first conductive feature distal from the substrate; selectively forming a dielectric cap layer over an upper surface of the first dielectric layer and laterally adjacent to the metal cap layer, wherein the metal cap layer is exposed by the dielectric cap layer; and forming an etch stop layer stack over the metal cap layer and the dielectric cap layer, wherein the etch stop layer stack comprises a plurality of etch stop layers.

Abstract: A foldable basketball stand has at least one first hoop on a rear end surface of a backboard on an upper half portion of a front frame. A middle portion of first left/right rod of the front frame has two first left/right joints respectively. One end and the other end of left top/bottom rod of a left frame are connected to a left-rear rod/the first left rod respectively. One end and the other end of right top/bottom rod of a right frame are connected to a right-rear rod/the first right rod respectively. A middle portion of left/right rear rod has first/second rear joints respectively. An upper half portion of a rear frame has a stop portion. Left/right sides of the rear frame are connected to left/right rear rods through left/right connecting rods respectively.

Abstract: A semiconductor device structure is provided. The structure includes a conductive feature formed in an insulating layer. The structure also includes a first metal-containing dielectric layer formed over the insulating layer and covering the top surface of the conductive feature. The structure further includes a silicon-containing dielectric layer formed over the first metal-containing dielectric layer. In addition, the structure includes a second metal-containing dielectric layer formed over the silicon-containing dielectric layer. The second metal-containing dielectric layer includes a material that is different than the material of the first metal-containing dielectric layer.

Abstract: A foldable basketball stand has at least one hoop on a rear end surface of a backboard on an upper half portion of a front frame. A middle portion of left/right front rod of the front frame has two first left/right joints respectively. Rear/front ends of a left-top rod and a left-bottom rod of a left frame are connected to a left-middle rod/the left-front rod respectively. Rear/front ends of a right-top rod and a right-bottom rod of a right frame are connected to a right-middle rod/the right-front rod respectively. Two ends of left/right supporting rod are connected to a middle portion of the left/right top rod and the left/right front rod respectively. An upper half portion of a rear frame has a stop portion. Left/right sides of the rear frame are connected to the left/right middle rods through left/right connecting rods respectively.

Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.

Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.

Abstract: Interconnect structures exhibiting reduced accumulation of copper vacancies along interfaces between contact etch stop layers (CESLs) and interconnects, along with methods for fabrication, are disclosed herein. A method includes forming a copper interconnect in a dielectric layer and depositing a metal nitride CESL over the copper interconnect and the dielectric layer. An interface between the metal nitride CESL and the copper interconnect has a first surface nitrogen concentration, a first nitrogen concentration and/or a first number of nitrogen-nitrogen bonds. A nitrogen plasma treatment is performed to modify the interface between the metal nitride CESL and the copper interconnect.

Abstract: A foldable basketball stand has at least one first hoop on a rear end surface of a backboard on an upper half portion of a front frame. A middle portion of first left/right rod of the front frame has two first left/right joints respectively. One end and the other end of left top/bottom rod of a left frame are connected to a left-rear rod/the first left rod respectively. One end and the other end of right top/bottom rod of a right frame are connected to a right-rear rod/the first right rod respectively. A middle portion of left/right rear rod has first/second rear joints respectively. An upper half portion of a rear frame has a stop portion. Left/right sides of the rear frame are connected to left/right rear rods through left/right connecting rods respectively.

Abstract: A weight training device, comprising a holding element, a first counterweight element, and a first fastening element. The holding element has a locking member on one end, and one side of the holding element is provided with at least one first upper positioning member. The first counterweight element has a first locking member and a first position limiting slot on one end, wherein the first locking member is for locking the locking member of the holding element. One end of the first fastening element is position limited in the first position limiting slot in an elastic manner, and another end of the first fastening element has a first stopper for fixing the first upper positioning member to prevent a relative rotation between the holding element and the first counterweight element, so that a stable connection can be formed between the holding element and the first counterweight element for easy use, and the safety use can be ensured.

Abstract: A method for manufacturing an integrated circuit includes patterning a plurality of photomask layers over a substrate, partially backfilling the patterned plurality of photomask layers with a first material using atomic layer deposition, completely backfilling the patterned plurality of photomask layers with a second material using atomic layer deposition, removing the plurality of photomask layers to form a masking structure comprising at least one of the first and second materials, and transferring a pattern formed by the masking structure to the substrate and removing the masking structure. The first material includes a silicon dioxide, silicon carbide, or carbon material, and the second material includes a metal oxide or metal nitride material.

Abstract: A semiconductor structure includes a conductive feature, a first metal-based etch-stop layer over the underlying structure, a metal-free etch-stop layer over the first metal-based etch-stop layer, a second metal-based etch-stop layer over the metal-free etch-stop layer, an interlayer dielectric layer over the second metal-based etch-stop layer, and an interconnect structure extending through the first metal-based etch-stop layer, metal-free etch-stop layer, and the second metal-based etch-stop layer, wherein a bottom portion of the conductive interconnect structure directly contacts the conductive feature. The first metal-based etch-stop layer may include a first metallic component having one of aluminum, tantalum, titanium, or hafnium, and the second metal-based etch-stop layer may include a second metallic component the same as or different from the first metallic component. The first metal-based etch-stop layer and the second metal-based etch-stop layer may both be free of silicon.

Abstract: A semiconductor device structure is provided. The structure includes a conductive feature formed in an insulating layer. The structure also includes a first metal-containing dielectric layer formed over the insulating layer and covering the top surface of the conductive feature. The structure further includes a silicon-containing dielectric layer formed over the first metal-containing dielectric layer. In addition, the structure includes a second metal-containing dielectric layer formed over the silicon-containing dielectric layer. The second metal-containing dielectric layer includes a material that is different than the material of the first metal-containing dielectric layer.

Abstract: A hard mask formed over a patterned photoresist layer in a tri-layer photoresist and a method for patterning a target layer using the same are disclosed. In an embodiment, a method includes depositing a photoresist layer over a first hard mask layer; patterning the photoresist layer to form a plurality of openings in the photoresist layer; depositing a second hard mask layer over the photoresist layer, the second hard mask layer filling the plurality of openings, the second hard mask layer having a first etch selectivity relative to the first hard mask layer, the photoresist layer having a second etch selectivity relative to the first hard mask layer, the first etch selectivity being greater than the second etch selectivity; planarizing the second hard mask layer; removing the photoresist layer; and etching the first hard mask layer using the second hard mask layer as a mask.

Abstract: A method of manufacturing a semiconductor device includes depositing a dielectric layer over a substrate, performing a first patterning to form an opening in the dielectric layer, and depositing an oxide film over and contacting the dielectric layer and within the opening in the dielectric layer. The oxide film is formed from multiple precursors that are free of O2, and depositing the oxide film includes forming a plasma of a first precursor of the multiple precursors.