Patents by Inventor Jeng Ping Lu

Jeng Ping Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7733397
    Abstract: A method of making a curved sensor is described. The method involves projecting portions of a curved three dimensional structure such as a hemisphere onto a two dimensional substrate in an outline pattern. The outline pattern typically serves as a perimeter of a sensor. After forming a sensor in the shape of the outline pattern, the two dimensional substrate is flexed to form a three dimensional sensor structure.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: June 8, 2010
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jeng Ping Lu, Christopher L. Chua
  • Patent number: 7681738
    Abstract: Various traveling wave grid configurations are disclosed. The grids and systems are well suited for transporting, separating, and classifying small particles dispersed in liquid or gaseous media. Also disclosed are various separation strategies and purification cells utilizing such traveling wave arrays and strategies.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: March 23, 2010
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Meng H. Lean, Jeng Ping Lu, Scott J. Limb, Jürgen H. Daniel, Armin R. Völkel, Huangpin Ben Hsieh, Scott E. Solberg, Bryan T. Preas
  • Publication number: 20090322845
    Abstract: An addressable imaging belt for use in printing applications having embedded anisotropically conductive addressable islands configured for electric contact on a first side of the belt by a write head consisting of an array of compliant cantilevered fingers with contact pads/points to which a voltage can be applied. The conductive addressable islands electrically isolated from one another and extending substantially through the thickness of the belt in order to allow charge to flow through the belt towards a second side of the belt, in order to form a latent electrostatic image on the second side and develop this latent image by attracting colorized toner or other electrically charged particles to the second side.
    Type: Application
    Filed: June 25, 2008
    Publication date: December 31, 2009
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Timothy D. Stowe, Chu-heng Liu, Jeng Ping Lu, Eugene Chow, Gregory B. Anderson, Armin Volkel, Eric Peeters
  • Publication number: 20090218260
    Abstract: A xerographic micro-assembler system, method and apparatus that includes a sorting unit that is adapted to receive a plurality of micro-objects. The micro-objects can also be sorted and oriented on the sorting unit and then transferred to a substrate. The system, method and apparatus can also include a device for detecting errors in at least one of the micro-objects on the sorting unit and a protection means for preventing an improper micro-object from being transferred to the substrate. The system, method and apparatus can also include an organized micro-object feeder assembly that can transfer at least one of a plurality of micro-objects to the sorting unit or directly to the substrate.
    Type: Application
    Filed: March 3, 2008
    Publication date: September 3, 2009
    Applicant: PALO ALTO RESEARCH CENTER, INCORPORATED
    Inventors: Eugene M. CHOW, Jeng Ping LU, Meng H. LEAN, David K. BIEGELSEN
  • Patent number: 7524768
    Abstract: A method to pattern films into dimensions smaller than the printed pixel mask size. A printed mask is deposited on a thin film on a substrate. The second mask layer is selectively deposited onto the film, but not to the printed mask. A third mask is then printed onto the substrate to pattern a portion of the second mask. Certain solvents are then used to remove the printed mask but not the mask layer on the thin film. The mask layer is then used to form a pattern on the thin film in combination with etching. The features formed in the thin film are smaller than the smallest dimension of the printed mask. The coated mask layer can be a self-assembled mono-layer or other material that selectively binds to the thin film.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: April 28, 2009
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Eugene M. Chow, William S. Wong, Michael Chabinyc, Jeng Ping Lu, Ana Claudia Arias
  • Publication number: 20090047558
    Abstract: An improved fuel cell is described. The invention addresses the problem of mechanical failure in thin electrolytes. One embodiment varies the thickness of the electrolyte and positions at least either the anode or cathode in the recessed region to provide a short travel distance for ions traveling from the anode to the cathode or from the cathode to the anode. A second embodiment uses a uniquely shaped manifold cover to allow close positioning of the anode to the cathode. Using the described structures results in a substantial improvement in fuel cell reliability and performance.
    Type: Application
    Filed: October 24, 2008
    Publication date: February 19, 2009
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Raj B. Apte, David G. Duff, Christian G. Van de Walle, Jeng Ping Lu, Alberto Salleo, Stephen D. White
  • Patent number: 7459225
    Abstract: An improved fuel cell is described. The invention addresses the problem of mechanical failure in thin electrolytes. One embodiment varies the thickness of the electrolyte and positions at least either the anode or cathode in the recessed region to provide a short travel distance for ions traveling from the anode to the cathode or from the cathode to the anode. A second embodiment uses a uniquely shaped manifold cover to allow close positioning of the anode to the cathode. Using the described structures results in a substantial improvement in fuel cell reliability and performance.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: December 2, 2008
    Inventors: Raj B. Apte, David G. Duff, Christian G. Van de Walle, Jeng Ping Lu, Alberto Salleo, Stephen D. White
  • Patent number: 7453339
    Abstract: In one aspect, an electromechanical switching device is illustrated. The electromechanical switching device includes a relay with at least one first conductive portion, at least one second conductive portion, and at least one actuation component that moves the at least one first conductive portion and the at least one second conductive portion into and out of conductive contact. The at least one first conductive portion includes a conductive stationary end coupled to a substrate and a conductive free-floating end. The at least one actuation component includes an actuation stationary end coupled to the substrate and an actuation free-floating end. The actuation free floating end, when the at least one actuation component is not energized, curls, which curls the conductive free floating end into or out of conductive contact with the at least one second conductive portion.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: November 18, 2008
    Assignee: Palo Alto Research Center Incorporated
    Inventors: David K. Fork, Thomas Hantschel, Koenraad F. Van Schuylenbergh, Jeng Ping Lu
  • Patent number: 7425734
    Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: September 16, 2008
    Assignee: Palo Alto Research Center Incorporated
    Inventors: William S. Wong, Jeng Ping Lu, Alberto Salleo, Michael L. Chabinyc, Raj B. Apte, Robert A. Street
  • Patent number: 7410882
    Abstract: According to various exemplary embodiments of this invention, a method of producing a semiconductor structure is provided that includes providing a layered structure on a first substrate, the layered structure including a silicon layer that is provided over a first dielectric layer, a first dielectric layer that is provided over an etch-stop layer, the etch-stop layer provided over a buffer layer, the buffer layer provided over a sacrificial layer, and a sacrificial layer provided over a first substrate. Moreover, various exemplary embodiments of the methods of this invention provide for a second substrate over the layered structure, separating the first substrate and the sacrificial layer from the buffer layer, separating the buffer layer and the etch-stop layer from the first dielectric layer and providing a drain electrode and a source electrode over the layered structure.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: August 12, 2008
    Assignee: Palo Alto Research Center Incorporated
    Inventors: William S. Wong, Jeng-Ping Lu, Robert A. Street
  • Publication number: 20080151089
    Abstract: A method of making a curved sensor is described. The method involves projecting portions of a curved three dimensional structure such as a hemisphere onto a two dimensional substrate in an outline pattern. The outline pattern typically serves as a perimeter of a sensor. After forming a sensor in the shape of the outline pattern, the two dimensional substrate is flexed to form a three dimensional sensor structure.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Inventors: Robert A. Street, Sanjiv Sambandan, Jeng Ping Lu
  • Publication number: 20080151084
    Abstract: A method of making a curved sensor is described. The method involves projecting portions of a curved three dimensional structure such as a hemisphere onto a two dimensional substrate in an outline pattern. The outline pattern typically serves as a perimeter of a sensor. After forming a sensor in the shape of the outline pattern, the two dimensional substrate is flexed to form a three dimensional sensor structure.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Inventors: Jeng Ping Lu, Christopher L. Chua
  • Publication number: 20080089705
    Abstract: Xerographic micro-assembler systems and methods are disclosed. The systems and methods involve manipulating charge-encoded micro-objects. The charge encoding identifies each micro-object and specifies its orientation for sorting. The micro-objects are sorted in a sorting unit so that they have defined positions and orientations. The sorting unit has the capability of electrostatically and magnetically manipulating the micro-objects based on their select charge encoding. The sorted micro-objects are provided to an image transfer unit. The image transfer unit is adapted to receive the sorted micro-objects, maintain them in their sorted order and orientation, and deliver them to a substrate. Maintaining the sorted order as the micro-objects are delivered to the substrate may be accomplished through the use of an electrostatic image, as is done in xerography.
    Type: Application
    Filed: December 18, 2007
    Publication date: April 17, 2008
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Jeng Ping Lu, Eugene Chow
  • Patent number: 7358530
    Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: April 15, 2008
    Assignee: Palo Alto Research Center Incorporated
    Inventors: William S. Wong, Jeng Ping Lu, Alberto Salleo, Michael L. Chabinyc, Raj B. Apte, Robert A. Street
  • Patent number: 7338833
    Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: March 4, 2008
    Assignee: Xerox Corporation
    Inventors: Jeng Ping Lu, Ping Mei, Francesco Lemmi, Robert A. Street, James B. Boyce
  • Patent number: 7332361
    Abstract: Xerographic micro-assembler systems and methods are disclosed. The systems and methods involve manipulating charge-encoded micro-objects. The charge encoding identifies each micro-object and specifies its orientation for sorting. The micro-objects are sorted in a sorting unit so that they have defined positions and orientations. The sorting unit has the capability of electrostatically and magnetically manipulating the micro-objects based on their select charge encoding. The sorted micro-objects are provided to an image transfer unit. The image transfer unit is adapted to receive the sorted micro-objects, maintain them in their sorted order and orientation, and deliver them to a substrate. Maintaining the sorted order as the micro-objects are delivered to the substrate may be accomplished through the use of an electrostatic image, as is done in xerography.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: February 19, 2008
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jeng Ping Lu, Eugene M. Chow
  • Patent number: 7309410
    Abstract: Various traveling wave grids and related systems are disclosed that are particularly beneficial for the separation, transport, and focusing of biomolecules or other charged species. An implementation of a vertically integrated traveling wave module is described which allows for scalability to arbitrary gel dimensions through tiling. In addition, several unique traveling wave algorithms are also described which when used in conjunction with the traveling wave grids, impart selective motion to biomolecules or other charged species.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: December 18, 2007
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Meng H. Lean, Jeng Ping Lu, Jackson Ho, Chinwen Shih, Armin R. Völkel, Huangpin Ben Hsieh, Jurgen Daniel
  • Patent number: 7284324
    Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: October 23, 2007
    Assignee: Xerox Corporation
    Inventors: Christopher L. Chua, Francesco Lemmi, Koenraad F. Van Schuylenbergh, Jeng Ping Lu, David K. Fork, Eric Peeters, Decai Sun, Donald L. Smith, Linda T. Romano
  • Patent number: 7139024
    Abstract: An imager circuit includes an array of pixels, each pixel including a sensor (photodiode) connected to an input terminal of a comparator. The comparators of each pixel row have output terminals connected to a latch. A counter generates a sequence of digital values that are transmitted to a digital-to-analog converter (DAC) and to the latch of each row. The DAC generates a ramp voltage that is transmitted to a second input terminal of each pixel's comparator. The comparators of a selected pixel column are enabled to generate output signals when the ramp voltage equals each pixel's voltage, causing the associated latches to capture the current digital values. The comparators are formed such that each pixel row shares a cascode mirror circuit that detects differential currents in data line pairs connected to each pixel in that row.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: November 21, 2006
    Assignee: Xerox Corporation
    Inventors: Jeng Ping Lu, Koenraad F. Van Schuylenbergh
  • Publication number: 20060068563
    Abstract: According to various exemplary embodiments of this invention, a method of producing a semiconductor structure is provided that includes providing a layered structure on a first substrate, the layered structure including a silicon layer that is provided over a first dielectric layer, a first dielectric layer that is provided over an etch-stop layer, the etch-stop layer provided over a buffer layer, the buffer layer provided over a sacrificial layer, and a sacrificial layer provided over a first substrate. Moreover, various exemplary embodiments of the methods of this invention provide for a second substrate over the layered structure, separating the first substrate and the sacrificial layer from the buffer layer, separating the buffer layer and the etch-stop layer from the first dielectric layer and providing a drain electrode and a source electrode over the layered structure.
    Type: Application
    Filed: September 28, 2004
    Publication date: March 30, 2006
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: William Wong, Jeng-Ping Lu, Robert Street