Patents by Inventor Jeng Ping Lu
Jeng Ping Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7733397Abstract: A method of making a curved sensor is described. The method involves projecting portions of a curved three dimensional structure such as a hemisphere onto a two dimensional substrate in an outline pattern. The outline pattern typically serves as a perimeter of a sensor. After forming a sensor in the shape of the outline pattern, the two dimensional substrate is flexed to form a three dimensional sensor structure.Type: GrantFiled: December 22, 2006Date of Patent: June 8, 2010Assignee: Palo Alto Research Center IncorporatedInventors: Jeng Ping Lu, Christopher L. Chua
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Patent number: 7681738Abstract: Various traveling wave grid configurations are disclosed. The grids and systems are well suited for transporting, separating, and classifying small particles dispersed in liquid or gaseous media. Also disclosed are various separation strategies and purification cells utilizing such traveling wave arrays and strategies.Type: GrantFiled: September 12, 2005Date of Patent: March 23, 2010Assignee: Palo Alto Research Center IncorporatedInventors: Meng H. Lean, Jeng Ping Lu, Scott J. Limb, Jürgen H. Daniel, Armin R. Völkel, Huangpin Ben Hsieh, Scott E. Solberg, Bryan T. Preas
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Publication number: 20090322845Abstract: An addressable imaging belt for use in printing applications having embedded anisotropically conductive addressable islands configured for electric contact on a first side of the belt by a write head consisting of an array of compliant cantilevered fingers with contact pads/points to which a voltage can be applied. The conductive addressable islands electrically isolated from one another and extending substantially through the thickness of the belt in order to allow charge to flow through the belt towards a second side of the belt, in order to form a latent electrostatic image on the second side and develop this latent image by attracting colorized toner or other electrically charged particles to the second side.Type: ApplicationFiled: June 25, 2008Publication date: December 31, 2009Applicant: Palo Alto Research Center IncorporatedInventors: Timothy D. Stowe, Chu-heng Liu, Jeng Ping Lu, Eugene Chow, Gregory B. Anderson, Armin Volkel, Eric Peeters
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Publication number: 20090218260Abstract: A xerographic micro-assembler system, method and apparatus that includes a sorting unit that is adapted to receive a plurality of micro-objects. The micro-objects can also be sorted and oriented on the sorting unit and then transferred to a substrate. The system, method and apparatus can also include a device for detecting errors in at least one of the micro-objects on the sorting unit and a protection means for preventing an improper micro-object from being transferred to the substrate. The system, method and apparatus can also include an organized micro-object feeder assembly that can transfer at least one of a plurality of micro-objects to the sorting unit or directly to the substrate.Type: ApplicationFiled: March 3, 2008Publication date: September 3, 2009Applicant: PALO ALTO RESEARCH CENTER, INCORPORATEDInventors: Eugene M. CHOW, Jeng Ping LU, Meng H. LEAN, David K. BIEGELSEN
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Patent number: 7524768Abstract: A method to pattern films into dimensions smaller than the printed pixel mask size. A printed mask is deposited on a thin film on a substrate. The second mask layer is selectively deposited onto the film, but not to the printed mask. A third mask is then printed onto the substrate to pattern a portion of the second mask. Certain solvents are then used to remove the printed mask but not the mask layer on the thin film. The mask layer is then used to form a pattern on the thin film in combination with etching. The features formed in the thin film are smaller than the smallest dimension of the printed mask. The coated mask layer can be a self-assembled mono-layer or other material that selectively binds to the thin film.Type: GrantFiled: March 24, 2006Date of Patent: April 28, 2009Assignee: Palo Alto Research Center IncorporatedInventors: Eugene M. Chow, William S. Wong, Michael Chabinyc, Jeng Ping Lu, Ana Claudia Arias
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Publication number: 20090047558Abstract: An improved fuel cell is described. The invention addresses the problem of mechanical failure in thin electrolytes. One embodiment varies the thickness of the electrolyte and positions at least either the anode or cathode in the recessed region to provide a short travel distance for ions traveling from the anode to the cathode or from the cathode to the anode. A second embodiment uses a uniquely shaped manifold cover to allow close positioning of the anode to the cathode. Using the described structures results in a substantial improvement in fuel cell reliability and performance.Type: ApplicationFiled: October 24, 2008Publication date: February 19, 2009Applicant: Palo Alto Research Center IncorporatedInventors: Raj B. Apte, David G. Duff, Christian G. Van de Walle, Jeng Ping Lu, Alberto Salleo, Stephen D. White
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Patent number: 7459225Abstract: An improved fuel cell is described. The invention addresses the problem of mechanical failure in thin electrolytes. One embodiment varies the thickness of the electrolyte and positions at least either the anode or cathode in the recessed region to provide a short travel distance for ions traveling from the anode to the cathode or from the cathode to the anode. A second embodiment uses a uniquely shaped manifold cover to allow close positioning of the anode to the cathode. Using the described structures results in a substantial improvement in fuel cell reliability and performance.Type: GrantFiled: November 24, 2003Date of Patent: December 2, 2008Inventors: Raj B. Apte, David G. Duff, Christian G. Van de Walle, Jeng Ping Lu, Alberto Salleo, Stephen D. White
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Patent number: 7453339Abstract: In one aspect, an electromechanical switching device is illustrated. The electromechanical switching device includes a relay with at least one first conductive portion, at least one second conductive portion, and at least one actuation component that moves the at least one first conductive portion and the at least one second conductive portion into and out of conductive contact. The at least one first conductive portion includes a conductive stationary end coupled to a substrate and a conductive free-floating end. The at least one actuation component includes an actuation stationary end coupled to the substrate and an actuation free-floating end. The actuation free floating end, when the at least one actuation component is not energized, curls, which curls the conductive free floating end into or out of conductive contact with the at least one second conductive portion.Type: GrantFiled: December 2, 2005Date of Patent: November 18, 2008Assignee: Palo Alto Research Center IncorporatedInventors: David K. Fork, Thomas Hantschel, Koenraad F. Van Schuylenbergh, Jeng Ping Lu
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Patent number: 7425734Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.Type: GrantFiled: July 25, 2005Date of Patent: September 16, 2008Assignee: Palo Alto Research Center IncorporatedInventors: William S. Wong, Jeng Ping Lu, Alberto Salleo, Michael L. Chabinyc, Raj B. Apte, Robert A. Street
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Patent number: 7410882Abstract: According to various exemplary embodiments of this invention, a method of producing a semiconductor structure is provided that includes providing a layered structure on a first substrate, the layered structure including a silicon layer that is provided over a first dielectric layer, a first dielectric layer that is provided over an etch-stop layer, the etch-stop layer provided over a buffer layer, the buffer layer provided over a sacrificial layer, and a sacrificial layer provided over a first substrate. Moreover, various exemplary embodiments of the methods of this invention provide for a second substrate over the layered structure, separating the first substrate and the sacrificial layer from the buffer layer, separating the buffer layer and the etch-stop layer from the first dielectric layer and providing a drain electrode and a source electrode over the layered structure.Type: GrantFiled: September 28, 2004Date of Patent: August 12, 2008Assignee: Palo Alto Research Center IncorporatedInventors: William S. Wong, Jeng-Ping Lu, Robert A. Street
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Publication number: 20080151089Abstract: A method of making a curved sensor is described. The method involves projecting portions of a curved three dimensional structure such as a hemisphere onto a two dimensional substrate in an outline pattern. The outline pattern typically serves as a perimeter of a sensor. After forming a sensor in the shape of the outline pattern, the two dimensional substrate is flexed to form a three dimensional sensor structure.Type: ApplicationFiled: December 22, 2006Publication date: June 26, 2008Inventors: Robert A. Street, Sanjiv Sambandan, Jeng Ping Lu
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Publication number: 20080151084Abstract: A method of making a curved sensor is described. The method involves projecting portions of a curved three dimensional structure such as a hemisphere onto a two dimensional substrate in an outline pattern. The outline pattern typically serves as a perimeter of a sensor. After forming a sensor in the shape of the outline pattern, the two dimensional substrate is flexed to form a three dimensional sensor structure.Type: ApplicationFiled: December 22, 2006Publication date: June 26, 2008Inventors: Jeng Ping Lu, Christopher L. Chua
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Publication number: 20080089705Abstract: Xerographic micro-assembler systems and methods are disclosed. The systems and methods involve manipulating charge-encoded micro-objects. The charge encoding identifies each micro-object and specifies its orientation for sorting. The micro-objects are sorted in a sorting unit so that they have defined positions and orientations. The sorting unit has the capability of electrostatically and magnetically manipulating the micro-objects based on their select charge encoding. The sorted micro-objects are provided to an image transfer unit. The image transfer unit is adapted to receive the sorted micro-objects, maintain them in their sorted order and orientation, and deliver them to a substrate. Maintaining the sorted order as the micro-objects are delivered to the substrate may be accomplished through the use of an electrostatic image, as is done in xerography.Type: ApplicationFiled: December 18, 2007Publication date: April 17, 2008Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Jeng Ping Lu, Eugene Chow
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Patent number: 7358530Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.Type: GrantFiled: December 12, 2003Date of Patent: April 15, 2008Assignee: Palo Alto Research Center IncorporatedInventors: William S. Wong, Jeng Ping Lu, Alberto Salleo, Michael L. Chabinyc, Raj B. Apte, Robert A. Street
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Patent number: 7338833Abstract: A structure and method for suppressing lateral leakage current in full fill factor image arrays includes dual dielectric passivation layer. A first passivation layer includes a material that is an insulator, has a low dielectric constant to minimize capacitive coupling between the contacts, and is low stress to prevent cracking. A second passivation layer includes a thin oxide or nitride layer over the first passivation layer.Type: GrantFiled: February 7, 2002Date of Patent: March 4, 2008Assignee: Xerox CorporationInventors: Jeng Ping Lu, Ping Mei, Francesco Lemmi, Robert A. Street, James B. Boyce
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Patent number: 7332361Abstract: Xerographic micro-assembler systems and methods are disclosed. The systems and methods involve manipulating charge-encoded micro-objects. The charge encoding identifies each micro-object and specifies its orientation for sorting. The micro-objects are sorted in a sorting unit so that they have defined positions and orientations. The sorting unit has the capability of electrostatically and magnetically manipulating the micro-objects based on their select charge encoding. The sorted micro-objects are provided to an image transfer unit. The image transfer unit is adapted to receive the sorted micro-objects, maintain them in their sorted order and orientation, and deliver them to a substrate. Maintaining the sorted order as the micro-objects are delivered to the substrate may be accomplished through the use of an electrostatic image, as is done in xerography.Type: GrantFiled: December 14, 2004Date of Patent: February 19, 2008Assignee: Palo Alto Research Center IncorporatedInventors: Jeng Ping Lu, Eugene M. Chow
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Patent number: 7309410Abstract: Various traveling wave grids and related systems are disclosed that are particularly beneficial for the separation, transport, and focusing of biomolecules or other charged species. An implementation of a vertically integrated traveling wave module is described which allows for scalability to arbitrary gel dimensions through tiling. In addition, several unique traveling wave algorithms are also described which when used in conjunction with the traveling wave grids, impart selective motion to biomolecules or other charged species.Type: GrantFiled: December 3, 2003Date of Patent: December 18, 2007Assignee: Palo Alto Research Center IncorporatedInventors: Meng H. Lean, Jeng Ping Lu, Jackson Ho, Chinwen Shih, Armin R. Völkel, Huangpin Ben Hsieh, Jurgen Daniel
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Patent number: 7284324Abstract: An out-of-plane micro-structure which can be used for on-chip integration of high-Q inductors and transformers places the magnetic field direction parallel to the substrate plane without requiring high aspect ratio processing. The photolithographically patterned coil structure includes an elastic member having an intrinsic stress profile. The intrinsic stress profile biases a free portion away from the substrate forming a loop winding. An anchor portion remains fixed to the substrate. The free portion end becomes a second anchor portion which may be connected to the substrate via soldering or plating. A series of individual coil structures can be joined via their anchor portions to form inductors and transformers.Type: GrantFiled: August 4, 2005Date of Patent: October 23, 2007Assignee: Xerox CorporationInventors: Christopher L. Chua, Francesco Lemmi, Koenraad F. Van Schuylenbergh, Jeng Ping Lu, David K. Fork, Eric Peeters, Decai Sun, Donald L. Smith, Linda T. Romano
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Patent number: 7139024Abstract: An imager circuit includes an array of pixels, each pixel including a sensor (photodiode) connected to an input terminal of a comparator. The comparators of each pixel row have output terminals connected to a latch. A counter generates a sequence of digital values that are transmitted to a digital-to-analog converter (DAC) and to the latch of each row. The DAC generates a ramp voltage that is transmitted to a second input terminal of each pixel's comparator. The comparators of a selected pixel column are enabled to generate output signals when the ramp voltage equals each pixel's voltage, causing the associated latches to capture the current digital values. The comparators are formed such that each pixel row shares a cascode mirror circuit that detects differential currents in data line pairs connected to each pixel in that row.Type: GrantFiled: July 26, 2002Date of Patent: November 21, 2006Assignee: Xerox CorporationInventors: Jeng Ping Lu, Koenraad F. Van Schuylenbergh
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Publication number: 20060068563Abstract: According to various exemplary embodiments of this invention, a method of producing a semiconductor structure is provided that includes providing a layered structure on a first substrate, the layered structure including a silicon layer that is provided over a first dielectric layer, a first dielectric layer that is provided over an etch-stop layer, the etch-stop layer provided over a buffer layer, the buffer layer provided over a sacrificial layer, and a sacrificial layer provided over a first substrate. Moreover, various exemplary embodiments of the methods of this invention provide for a second substrate over the layered structure, separating the first substrate and the sacrificial layer from the buffer layer, separating the buffer layer and the etch-stop layer from the first dielectric layer and providing a drain electrode and a source electrode over the layered structure.Type: ApplicationFiled: September 28, 2004Publication date: March 30, 2006Applicant: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: William Wong, Jeng-Ping Lu, Robert Street